* testsuite/gas/mips/r5900.s: Extend the R5900 short loop fix
test with border cases.
* testsuite/gas/mips/r5900.d: Add extra expected disassembly.
* config/tc-mips.c (can_swap_branch_p): Clarify the R5900 short
loop hardware bug conditions. Correct note on the R5900
instruction count short loop fix.
This simple patch fixes the segfault reported on PR cli/23785, which
happens when using the "restore FILE binary" command with a
non-existent file. We just have to check if the file handler returned
by "gdb_fopen_cloexec" is not NULL, and error out if it is.
A test has also been added to gdb.base/restore.exp in order to
exercise this scenario.
No regressions introduced.
gdb/ChangeLog:
2018-10-18 Sergio Durigan Junior <sergiodj@redhat.com>
PR cli/23785
* cli/cli-dump.c (restore_binary_file): Check if "file" is
NULL.
gdb/testsuite/ChangeLog:
2018-10-18 Sergio Durigan Junior <sergiodj@redhat.com>
PR cli/23785
* gdb.base/restore.exp: New test to check if "restore" with an
invalid file doesn't segfault.
At https://sourceware.org/gdb/wiki/GDBTestcaseCookbook\
#Follow_the_test_name_convention we find:
..
Test names should start with a lower case and don't need to end with a period
(they are not sentences).
...
Fix some capitalized test names.
Tested on x86_64-linux.
2018-10-18 Tom de Vries <tdevries@suse.de>
* gdb.ada/bp_inlined_func.exp: Fix capitalized test name.
* gdb.ada/excep_handle.exp: Same.
* gdb.ada/mi_string_access.exp: Same.
* gdb.ada/mi_var_union.exp: Same.
* gdb.arch/arc-analyze-prologue.exp: Same.
* gdb.arch/arc-decode-insn.exp: Same.
* gdb.base/readnever.exp: Same.
* gdb.fortran/printing-types.exp: Same.
* gdb.guile/scm-lazy-string.exp: Same.
gdb/ChangeLog:
* fbsd-nat.c (fbsd_nat_target::info_proc) Use
fbsd_info_proc_mappings_header and fbsd_info_proc_mappings_entry.
* fbsd-tdep.c (fbsd_vm_map_entry_flags): Mark static.
(fbsd_info_proc_mappings_header, fbsd_info_proc_mappings_entry):
New functions.
(fbsd_core_info_proc_mappings): Use fbsd_info_proc_mappings_header
and fbsd_info_proc_mappings_header.
* fbsd-tdep.h (fbsd_vm_map_entry_flags): Remove.
(fbsd_info_proc_mappings_header, fbsd_info_proc_mappings_entry):
New.
This patch improves dynobj selection. This allows the testcase in the
PR to proceed further before segfaulting due to other bugs in the
sparc backend.
../ld/ld-new --eh-frame-hdr -m elf_x86_64 -shared -o bug.so.5 bug.o ./libc.so.6 ./crtendS.o
../ld/ld-new: sparc architecture of input file `bug.o' is incompatible with i386:x86-64 output
../ld/ld-new: bug.o: in function `a':
bug.c:(.text+0x4): undefined reference to `_GLOBAL_OFFSET_TABLE_'
../ld/ld-new: bug.c:(.text+0x8): undefined reference to `_GLOBAL_OFFSET_TABLE_'
Segmentation fault
PR 23653
* elflink.c (_bfd_elf_link_create_dynstrtab): Match elf_object_id
too when choosing dynobj.
There are two problems with the current catch-follow-exec.exp:
- INTERNAL_GDBFLAGS (containing the datadir setting) is not used
- remote host testing doesn't work
Fix the former by using gdb_spawn_with_cmdline_opts. Fix the latter by
requiring gdb-native.
Build on x86_64-linux with and without ubsan, and tested.
2018-10-16 Tom de Vries <tdevries@suse.de>
PR gdb/23730
* gdb.base/catch-follow-exec.c: Add copyright notice.
* gdb.base/catch-follow-exec.exp: Rewrite to use
gdb_spawn_with_cmdline_opts. Require gdb-native.
Committed on behalf of Matthew Malcomson:
The SIMD UDOT instruction assembly has an unusual operand that selects a single
32 bit element with the mnemonic 4B.
This unusual mnemonic is handled by a special operand qualifier and associated
qualifier data in `aarch64_opnd_qualifiers`.
The current qualifier data describes 4 1-byte elements with the structure
{1, 4, 0x0, "4b", OQK_OPD_VARIANT}
This makes sense, as the instruction does work on 4 1-byte elements, however
some logic in the `operand_general_constraint_met_p` makes assumptions about
the range of index allowed when selecting a SIMD_ELEMENT depending on element
size.
That function reasons that e.g. in order to select a byte-sized element in a 16
byte V register an index must allow selection of one of the 16 elements and
hence its range will be in [0,15].
This reasoning breaks with the above description of a 4 part selection of 1
byte elements and allows an index outside the valid [0,3] range, triggering an
assert later on in the program in `aarch64_ins_reglane`.
vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
as-new: ../../binutils-gdb/opcodes/aarch64-asm.c:134: aarch64_ins_reglane: Assertion `reglane_index < 4' failed.
{standard input}: Assembler messages:
{standard input}:1: Internal error (Aborted).
Please report this bug.
This patch changes the operand qualifier data so that it describes a single
32 bit element.
{4, 1, 0x0, "4b", OQK_OPD_VARIANT}
Hence the calculation in `operand_general_constraint_met_p` provides the
correct answer and the usual error checking machinery is used.
vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
{standard input}: Assembler messages:
{standard input}:1: Error: register element index out of range 0 to 3 at operand 3 -- `udot v0.2s,v1.8b,v2.4b[4]'
The negative size check can be rolled into the "exceeds space left in
section" check if that is done using an unsigned comparison. We know
that "addr - section->vma" is never larger than section->size since
the section is found by find_section_by_vma.
* peXXigen.c (_bfd_XX_bfd_copy_private_bfd_data_common): Simplify
PE_DEBUG_DATA size checks.
This patch performs a run-time test that a shared libbfd.so has been
compiled with the same size bfd_vma as that of apps using the library.
On a 32-bit host it is easily possible to have one libbfd.so compiled
to support 64-bit targets (or configured with --enable-64-bit-bfd)
while another only supports 32-bit targets. The two libraries will
have differently sized bfd_vma types, and if the wrong one is loaded
all sorts of weird behaviour might be seen.
bfd/
PR 23534
* init.c (BFD_INIT_MAGIC): Define.
(bfd_init): Return BFD_INIT_MAGIC.
bfd-in2.h: Regenerate.
binutils/
PR 23534
* addr2line.c (main): Exit with fatal error if bfd_init
returns an unexpected value.
* ar.c (main): Likewise.
* dlltool.c (identify_dll_for_implib): Likewise.
* nm.c (main): Likewise.
* objcopy.c (main): Likewise.
* objdump.c (main): Likewise.
* size.c (main): Likewise.
* strings.c (main): Likewise.
* windmc.c (main): Likewise.
* windres.c (main): Likewise.
gas/
PR 23534
* as.c (main): Exit with fatal error if bfd_init returns an
unexpected value.
ld/
PR 23534
* ldmain.c (main): Exit with fatal error if bfd_init returns
an unexpected value.
This PR shows a fuzzed binary triggering a segfault via a bad
relocation in .debug_line. It turns out that unlike normal
relocations applied to a section, the linker applies those with
symbols from discarded sections via _bfd_clear_contents without
checking that the relocation is within the section bounds. The same
thing now happens when reading debug sections since commit
a4cd947aca23, the PR23425 fix.
PR 23770
PR 23425
* reloc.c (_bfd_clear_contents): Replace "location" param with
"buf" and "off". Bounds check "off". Return status.
* cofflink.c (_bfd_coff_generic_relocate_section): Update
_bfd_clear_contents call.
* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Likewise.
* elf32-arc.c (elf_arc_relocate_section): Likewise.
* elf32-i386.c (elf_i386_relocate_section): Likewise.
* elf32-metag.c (metag_final_link_relocate): Likewise.
* elf32-nds32.c (nds32_elf_get_relocated_section_contents): Likewise.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
* elf32-visium.c (visium_elf_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elf64-x86-64.c *(elf_x86_64_relocate_section): Likewise.
* libbfd-in.h (_bfd_clear_contents): Update prototype.
* libbfd.h: Regenerate.
When trying to run gdb.trace/tspeed.exp, I get:
ERROR: can't read "ipalib": no such variable
while executing
"gdb_load_shlib $ipalib"
(procedure "prepare_for_trace_test" line 5)
This problem seems to come from commit
c708f4d256f ("gdb: Don't call gdb_load_shlib unless GDB is running")
which moved the gdb_load_shlib call in prepare_for_trace_test. In order
to access the ipalib variable, we need to declare "global ipalib" first.
Then, this test uses nowarnings, for no good reason I could find. We
can remove that and fix the two trivial warnings that appear:
/home/emaisin/src/binutils-gdb/gdb/testsuite/gdb.trace/tspeed.c: In function 'main':
/home/emaisin/src/binutils-gdb/gdb/testsuite/gdb.trace/tspeed.c:87:16: warning: too many arguments for format [-Wformat-extra-args]
printf ("Negative times, giving up\n", max_iters);
^
/home/emaisin/src/binutils-gdb/gdb/testsuite/gdb.trace/tspeed.c:99:7: warning: implicit declaration of function 'sleep' [-Wimplicit-function-declaration]
sleep (1); /* set post-run breakpoint here */
^
gdb/testsuite/ChangeLog:
* gdb.trace/tspeed.exp: Remove nowarnings.
(prepare_for_trace_test): Declare "global ipalib".
* gdb.trace/tspeed.c: Include unistd.h.
(main): Remove superfluous printf argument.
2018-10-11 Sandra Loosemore <sandra@codesourcery.com>
gdb/testsuite/
* gdb.base/solib-vanish.exp: Fix regexp not to require a POSIX
directory prefix on the filename.
This is the result of an email thread starting here:
https://sourceware.org/ml/binutils/2018-09/msg00031.html
The main point of the thread is this observation:
* Supposing we had an object file with two globals, SomeGlobal and
SomeOtherGlobal, if one were to do "--globalize-symbol SomeGlobal
--keep-global-symbol SomeOtherGlobal", you might expect that both
SomeGlobal and SomeOtherGlobal are global in the output file... but it
isn't. Because --keep-global-symbol is set and doesn't include
SomeGlobal, SomeGlobal will be demoted to a local symbol. And because
the check to see if we should apply the --globalize-symbol flag checks
"flags" (the original flag set), and not "sym->flags", it decides not
to do anything, so SomeGlobal remains a local symbol. Although this is
a weird edge case, should this be changed so that --keep-global-symbol
implicitly keeps anything also specified via --globalize-symbol? (The
code seems technically correct with respect to the documentation, but
IMO the behavior is counter-intuitive).
binutils* objcopy.c (copy_main): Issue a fata error if the
--keep-global-symbol(s) and the --globalize-symbol(s) options are
used together.
* doc/binutils.texi: Document that the two options are
incompatible.
* testsuite/binutils-all/copy-5.d: New test.
* testsuite/binutils-all/objcopy.exp: Run the new test.
This commit fixes a resource leak found by Coverity, where interp's
constructor allocated memory for m_name that interp's destructor did
not free.
gdb/ChangeLog:
* interps.h (interp::m_name): Make private and mutable.
* interps.c (interp::~interp): Free m_name.
This is a follow-up of:
https://sourceware.org/ml/gdb-patches/2018-08/msg00347.html
Instead of going throttle and always enabling our selftests (even in
non-development builds), this patch is a bit more conservative and
introduces a configure option ("--enable-unit-tests") that allows the
user to choose whether she wants unit tests in the build or not. Note
that the current behaviour is retained: if no option is provided, GDB
will have selftests included in a development build, and will *not*
have selftests included in a non-development build.
The rationale for having this option is still the same: due to the
many racy testcases and random failures we see when running the GDB
testsuite, it is unfortunately not possible to perform a full test
when one is building a downstream package. As the Fedora GDB
maintainer and one of the Debian GDB uploaders, I feel like this
situation could be improved by, at least, executing our selftests
after the package has been built.
This patch introduces no regressions to our build.
OK?
gdb/ChangeLog:
2018-10-10 Sergio Durigan Junior <sergiodj@redhat.com>
Simon Marchi <simark@simark.ca>
* README (`configure' options): Add documentation for new
"--enable-unit-tests" option.
* acinclude.m4: Include "selftest.m4".
* configure: Regenerate.
* configure.ac: Use "GDB_AC_SELFTEST".
* maint.c (maintenance_selftest): Update message informing
that selftests have been disabled.
(maintenance_info_selftests): Likewise.
* selftest.m4: New file.
gdb/gdbserver/ChangeLog:
2018-10-10 Sergio Durigan Junior <sergiodj@redhat.com>
Simon Marchi <simark@simark.ca>
* acinclude.m4: Include "../selftest.m4".
* configure: Regenerate.
* configure.ac: Use "GDB_AC_SELFTEST".
* configure.srv: Use "$enable_unittests" instead of
"$development" when checking whether unit tests have been
enabled.
* server.c (captured_main): Update message informing that
selftests have been disabled.
gdb/testsuite/ChangeLog:
2018-10-10 Sergio Durigan Junior <sergiodj@redhat.com>
* gdb.gdb/unittest.exp: Update expected message informing that
selftests have been disabled.
* gdb.server/unittest.exp: Likewise.
squash! Add parameter to allow enabling/disabling selftests via configure
This commit adds a missing va_end found by Coverity.
gdb/ChangeLog:
* remote.c (remote_target::remote_send_printf): Add
missing va_end found by Coverity.
Some versions of _Unwind_RaiseException, e.g. on Fedora 28, use an
indirect jump to return to the exception handler.
This messes up the output of "record function-call-history /c" since the
return is interpreted as cross-function goto. It had been detected by
gdb.btrace/exception.exp.
Add a heuristic for "_Unwind_*" functions to interpret an indirect jump
that ends in one of our caller functions as return to the first instance
of that function in our call stack.
gdb/
* btrace.c (ftrace_update_function): Add indirect jump heuristic.
.PARISC.unwind has 32-bit addresses in both 32-bit ELF and 64-bit ELF.
Well, strictly speaking, the 32-bit "start" and "end" fields are
segment relative offsets. (The 64-bit ABI says so, while the 32-bit
ABI says they are addresses but it appears they are segment relative
offsets in practice. Likely the 32-bit ABI lacks an update.)
* readelf.c (hppa_process_unwind): Don't use eh_addr_size to
calculate number of entries.
(slurp_hppa_unwind_table): Don't use eh_addr_size here either.
This fixes he @pxref in Inferior.architecture to point to the "Frames
In Python" node, as originally intended; somewhat reverting an earlier
build fix. The initial patch had typod the "In".
Tested by "make info".
gdb/doc/ChangeLog
2018-10-09 Tom Tromey <tom@tromey.com>
* python.texi (Inferiors In Python): Link to "Frames In Python",
not "Unwinding Frames in Python".
There have been a few undefined behavior failures reported, and Pedro
suggested that the sanitizer be disabled by default. This patch
implements this.
gdb/ChangeLog
2018-10-09 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* sanitize.m4 (AM_GDB_UBSAN): Default to no.
* NEWS: Update --enable-ubsan documentation.
gdb/doc/ChangeLog
2018-10-09 Tom Tromey <tom@tromey.com>
* gdb.texinfo (Configure Options): Update --enable-ubsan
documentation.
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds support for the mitigation for Spectre Variant 4 by
adding the PSTATE bit SSBS which are accessible using MSR and MRS
instructions. Although this is a mandatory addition to the ARMv8.5-A,
it is permitted to be added to any version of the ARMv8 architecture.
This is enabled using the command line option of +ssbs for older
versions.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (operand_general_constraint_met_p): Add
SSBS in the check for one-bit immediate.
(aarch64_sys_regs): New entry for SSBS.
(aarch64_sys_reg_supported_p): New check for above.
(aarch64_pstatefields): New entry for SSBS.
(aarch64_pstatefield_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): Add new "ssbs".
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/ssbs-illegal1.d: New test.
* testsuite/gas/aarch64/ssbs-illegal1.l: New test.
* testsuite/gas/aarch64/ssbs-illegal2.d: New test.
* testsuite/gas/aarch64/ssbs-illegal2.l: New test.
* testsuite/gas/aarch64/ssbs.s: New test.
* testsuite/gas/aarch64/ssbs1.d: Test with +ssbs
* testsuite/gas/aarch64/ssbs2.d: Test with armv8.5-a.
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds the new system registers SCXTNUM_ELx and ID_PFR2_EL1.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
(AARCH64_FEATURE_ID_PFR2): New.
(AARCH64_ARCH_V8_5): Add both by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs): New entries for
scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
(aarch64_sys_reg_supported_p): New checks for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/sysreg-4.s: Test registers
scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/bti-branch-target-identification)
The Branch Target Identification instructions (BTI) are allocated to
existing HINT space, using HINT numbers 32, 34, 36, 38, such that
bits[7:6] of the instruction identify the compatibility of the BTI
instruction to different branches.
BTI {<targets>}
where <targets> one of the following, specifying which type of
indirection is allowed:
j : Can be a target of any BR Xn isntruction.
c : Can be a target of any BLR Xn and BR {X16|X17}.
jc: Can be a target of any free branch.
A BTI instruction without any <targets> is the strictest of all and
can not be a target of nay free branch.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
(aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
(HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
define HINT #imm values.
(HINT_OPD_JC, HINT_OPD_NULL): Likewise.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.h (HINT_OPD_NOPRINT, HINT_ENCODE): New.
(HINT_FLAG, HINT_VALUE): New macros to encode NO_PRINT flag
with the hint immediate.
* aarch64-opc.c (aarch64_hint_options): New entries for
c, j, jc and default (with HINT_OPD_F_NOPRINT flag) for BTI.
(aarch64_print_operand): Add case for AARCH64_OPND_BTI_TARGET
while checking for HINT_OPD_F_NOPRINT flag.
* aarch64-dis.c (aarch64_ext_hint): Use new HINT_VALUE to
extract value.
* aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): New.
(aarch64_opcode_table): Add entry for BTI.
(AARCH64_OPERANDS): Add new description for BTI targets.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (parse_bti_operand): New.
(process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
(parse_operands): Likewise.
* testsuite/gas/aarch64/system.d: Update for BTI.
* testsuite/gas/aarch64/bti.s: New.
* testsuite/gas/aarch64/bti.d: New.
* testsuite/gas/aarch64/illegal-bti.d: New.
* testsuite/gas/aarch64/illegal-bti.l: New.
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds the following:
MSR Xn, RNDR
MSR Xn, RNDRRS
These are optional instructions in ARMv8.5-A and hence the new
+rng is added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs): New entries for
rndr and rndrrs.
(aarch64_sys_reg_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): New "rng" option.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/dc-data-cache-operation-an-alias-of-sys)
This patch adds the DC CVADP instruction. Since this has a separate
identification mechanism a new feature bit is added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs_dc): New entry for cvadp.
(aarch64_sys_ins_reg_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/sysreg-4.s: Test instruction.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
