102525 Commits

Author SHA1 Message Date
260cd341da x86: Add support for Intel AMX instructions
gas/

	* doc/c-i386.texi: Document amx_int8, amx_bf16 and amx_tile.
	* config/tc-i386.c (i386_error): Add invalid_sib_address.
	(cpu_arch): Add .amx_int8, .amx_bf16 and .amx_tile.
	(cpu_noarch): Add noamx_int8, noamx_bf16 and noamx_tile.
	(match_simd_size): Add tmmword check.
	(operand_type_match): Add tmmword.
	(type_names): Add rTMM.
	(i386_error): Add invalid_tmm_register_set.
	(check_VecOperands): Handle invalid_sib_address and
	invalid_tmm_register_set.
	(match_template): Handle invalid_sib_address.
	(build_modrm_byte): Handle non-vector SIB and zmmword.
	(i386_index_check): Disallow RegIP for non-vector SIB.
	(check_register): Handle zmmword.
	* testsuite/gas/i386/i386.exp: Add AMX new tests.
	* testsuite/gas/i386/intel-regs.d: Add tmm.
	* testsuite/gas/i386/intel-regs.s: Add tmm.
	* testsuite/gas/i386/x86-64-amx-intel.d: New.
	* testsuite/gas/i386/x86-64-amx-inval.l: New.
	* testsuite/gas/i386/x86-64-amx-inval.s: New.
	* testsuite/gas/i386/x86-64-amx.d: New.
	* testsuite/gas/i386/x86-64-amx.s: New.
	* testsuite/gas/i386/x86-64-amx-bad.d: New.
	* testsuite/gas/i386/x86-64-amx-bad.s: New.

opcodes/

	* i386-dis.c (TMM): New.
	(EXtmm): Likewise.
	(VexTmm): Likewise.
	(MVexSIBMEM): Likewise.
	(tmm_mode): Likewise.
	(vex_sibmem_mode): Likewise.
	(REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
	(MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
	(MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
	(MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
	(MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
	(MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
	(MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
	(MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
	(RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
	(PREFIX_VEX_0F3849_X86_64): Likewise.
	(PREFIX_VEX_0F384B_X86_64): Likewise.
	(PREFIX_VEX_0F385C_X86_64): Likewise.
	(PREFIX_VEX_0F385E_X86_64): Likewise.
	(X86_64_VEX_0F3849): Likewise.
	(X86_64_VEX_0F384B): Likewise.
	(X86_64_VEX_0F385C): Likewise.
	(X86_64_VEX_0F385E): Likewise.
	(VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
	(VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
	(VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
	(VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
	(VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
	(VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_W_0F3849_X86_64_P_0): Likewise.
	(VEX_W_0F3849_X86_64_P_2): Likewise.
	(VEX_W_0F3849_X86_64_P_3): Likewise.
	(VEX_W_0F384B_X86_64_P_1): Likewise.
	(VEX_W_0F384B_X86_64_P_2): Likewise.
	(VEX_W_0F384B_X86_64_P_3): Likewise.
	(VEX_W_0F385C_X86_64_P_1): Likewise.
	(VEX_W_0F385E_X86_64_P_0): Likewise.
	(VEX_W_0F385E_X86_64_P_1): Likewise.
	(VEX_W_0F385E_X86_64_P_2): Likewise.
	(VEX_W_0F385E_X86_64_P_3): Likewise.
	(names_tmm): Likewise.
	(att_names_tmm): Likewise.
	(intel_operand_size): Handle void_mode.
	(OP_XMM): Handle tmm_mode.
	(OP_EX): Likewise.
	(OP_VEX): Likewise.
	* i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
	CpuAMX_BF16 and CpuAMX_TILE.
	(operand_type_shorthands): Add RegTMM.
	(operand_type_init): Likewise.
	(operand_types): Add Tmmword.
	(cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
	(cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
	* i386-opc.h (CpuAMX_INT8): New.
	(CpuAMX_BF16): Likewise.
	(CpuAMX_TILE): Likewise.
	(SIBMEM): Likewise.
	(Tmmword): Likewise.
	(i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
	(i386_opcode_modifier): Extend width of fields vexvvvv and sib.
	(i386_operand_type): Add tmmword.
	* i386-opc.tbl: Add AMX instructions.
	* i386-reg.tbl: Add AMX registers.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2020-07-10 05:18:34 -07:00
af2b318648 [readelf] Fix end_seq entry in -wL. Specifically stop the display of a line number and is_statement/has-view fields for the End of Sequence operator, as these have no meaning.
binutils* dwarf.c (display_debug_lines_decoded): Don't emit meaningless
	information in the end_sequence row.
	* testsuite/binutils-all/dw5.W: Update.
	* testsuite/binutils-all/objdump.WL: Update.

gas	* testsuite/gas/elf/dwarf2-11.d: Update expected output from
	readelf's line table decoding.
	* testsuite/gas/elf/dwarf2-12.d: Likewise.
	* testsuite/gas/elf/dwarf2-13.d: Likewise.
	* testsuite/gas/elf/dwarf2-14.d: Likewise.
	* testsuite/gas/elf/dwarf2-15.d: Likewise.
	* testsuite/gas/elf/dwarf2-16.d: Likewise.
	* testsuite/gas/elf/dwarf2-17.d: Likewise.
	* testsuite/gas/elf/dwarf2-18.d: Likewise.
	* testsuite/gas/elf/dwarf2-19.d: Likewise.
	* testsuite/gas/elf/dwarf2-5.d: Likewise.
	* testsuite/gas/elf/dwarf2-6.d: Likewise.
	* testsuite/gas/elf/dwarf2-7.d: Likewise.
2020-07-10 11:25:44 +01:00
d882c98893 Document powerpc64 ld options
* ld.texi (PowerPC64 ELF64): Document --no-inline-optimize,
	--power10-stubs and --no-power10-stubs.
2020-07-10 16:59:50 +09:30
d3b10ee787 PowerPC64 ld --no-power10-stubs
Needed for libraries that use ifuncs or other means to support
cpu-optimized versions of functions, some power10, some not, and those
functions make calls using linkage stubs.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params): Add power10_stubs.
	* elf64-ppc.c (struct ppc_link_hash_table): Delete
	power10_stubs.
	(ppc64_elf_check_relocs): Adjust setting of power10_stubs.
	(plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust
	uses of power10_stubs.
ld/
	* emultempl/ppc64elf.em (params): Init new field.
	(enum ppc64_opt): Add OPTION_POWER10_STUBS and OPTION_NO_POWER10_STUBS.
	(PARSE_AND_LIST_LONGOPTS): Support --power10-stubs and
	--no-power10-stubs.
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
	* testsuite/ld-powerpc/callstub-3.d: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2020-07-10 11:14:38 +09:30
bf7682fdf7 Automatic date update in version.in 2020-07-10 00:00:09 +00:00
f37e5866aa Don't compare the pid returned from 'wait' against inferior_ptid.
'inf_ptrace::wait' needs to discard termination events reported by
detached child processes.  Previously it compared the returned pid
against the pid in inferior_ptid to determine if a termination event
should be discarded or reported.  The multi-target changes cleared
inferior_ptid to null_ptid in 'wait' target methods, so this was
always failing and never reporting exit events.  Instead, report
termination events whose pid matches any inferior belonging to the
current target.

Several tests started failing on FreeBSD after the multi-target
changes and pass again after this change.

gdb/ChangeLog:

	* inf-ptrace.c (inf_ptrace_target::wait): Don't compare against
	inferior_ptid.
2020-07-09 12:40:40 -07:00
39776b1117 x86: Properly set YMM/ZMM features
Since VEX/EVEX vector instructions will always update the full YMM/ZMM
registers, set YMM/ZMM features for VEX/EVEX vector instructions.

	* config/tc-i386.c (output_insn): Set YMM/ZMM features for
	VEX/EVEX vector instructions.
	* testsuite/gas/i386/property-4.d: New file.
	* testsuite/gas/i386/property-4.s: Likewise.
	* testsuite/gas/i386/property-5.d: Likewise.
	* testsuite/gas/i386/property-5.s: Likewise.
	* testsuite/gas/i386/x86-64-property-4.d: Likewise.
	* testsuite/gas/i386/x86-64-property-5.d: Likewise.
2020-07-09 10:33:43 -07:00
fc238d4a06 Support several new ELF auxiliary vector types on FreeBSD.
FreeBSD's kernel recently added several ELF auxiliary vector entries
to describe the arguments passed to new executable images during
exec().  The AT_FREEBSD_ARGC and AT_FREEBSD_ARGV entries give the
length and address of the process argument array.  AT_FREEBSD_ENVC and
AT_FREEBSD_ENVV entries give the length and address of the initial
process environment.  AT_FREEBSD_PS_STRINGS gives the address of the
'struct ps_strings' object.

include/ChangeLog:

	* elf/common.h (AT_FREEBSD_ARGC, AT_FREEBSD_ARGV, AT_FREEBSD_ENVC)
	(AT_FREEBSD_ENVV, AT_FREEBSD_PS_STRINGS): Define.

gdb/ChangeLog:

	* fbsd-tdep.c (fbsd_print_auxv_entry): Handle AT_FREEBSD_ARGC,
	AT_FREEBSD_ARGV, AT_FREEBSD_ENVC, AT_FREEBSD_ENVV,
	AT_FREEBSD_PS_STRINGS.
2020-07-09 09:39:05 -07:00
939b95c77b Linux/x86: Configure gas with --enable-x86-used-note by default
* configure.ac: Configure with --enable-x86-used-note by default
	for Linux/x86.
	* configure: Regenerated.
2020-07-09 08:29:25 -07:00
fe49679d51 Remove powerpc PE support
Plus some leftover powerpc lynxos support.

bfd/
	* coff-ppc.c: Delete.
	* pe-ppc.c: Delete.
	* pei-ppc.c: Delete.
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Remove PE PPC.
	* coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Remove
	PPCMAGIC code.
	(coff_write_object_contents): Remove PPC_PE code.
	* config.bfd: Move powerpcle-pe to removed targets.
	* configure.ac: Remove powerpc PE entries.
	* libcoff-in.h (ppc_allocate_toc_section): Delete.
	(ppc_process_before_allocation): Delete.
	* peXXigen.c: Remove POWERPC_LE_PE code and comments.
	* targets.c: Remove powerpc PE vectors.
	* po/SRC-POTFILES.in: Regenerate.
	* libcoff.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
binutils/
	* dlltool.c: Remove powerpc PE support and comments.
	* configure.ac: Remove powerpc PE dlltool config.
	* configure: Regenerate.
gas/
	* config/obj-coff.h: Remove TE_PE support.
	* config/tc-ppc.c: Likewise.
	* config/tc-ppc.h: Likewise.
	* configure.tgt: Remove powerpc PE and powerpc lynxos.
	* testsuite/gas/cfi/cfi.exp (cfi-common-6): Remove powerpc PE
	condition.
	* testsuite/gas/macros/macros.exp: Don't xfail powerpc PE.
include/
	* coff/powerpc.h: Delete.
ld/
	* emulparams/ppcpe.sh: Delete.
	* scripttempl/ppcpe.sc: Delete.
	* emulparams/ppclynx.sh: Delete.
	* Makefile.am (ALL_EMULATION_SOURCES): Remove ppc PE and lynxos.
	* configure.tgt: Likewise.
	* emultempl/beos.em: Remove powerpc PE support.
	* emultempl/pe.em: Likewise.
	* po/BLD-POTFILES.in: Regenerate.
	* Makefile.in: Regenerate.
2020-07-09 22:58:16 +09:30
c560184eb2 powerpc garbage collect test
ld's garbage collection test on powerpc64 catered for old compilers
(pre -mcmodel=medium support), setting options that caused the test to
fail.  Which meant the test wasn't really testing anything.  Get rid
of that old compiler support, and avoid -fPIE fails on ppc32.

	* testsuite/ld-gc/gc.exp: Don't set -mminimal-toc for powerpc64,
	and remove powerpc64 xfail.  Use -fno-PIE for ppc32.
2020-07-09 22:58:16 +09:30
470cd0faa7 pr18841 tests on powerpc64
The PR18841 test does cross-module calls from within an ifunc
resolver, which is nasty, and not supported in general since the
called function may not be relocated.  In this case the called
function (zoo) is just a stub so doesn't need relocating, but on ppc64
the function descriptor for zoo in the executable won't be relocated
at the time the shared library ifunc resolver runs.  That means the
test will fail if your compiler generates PIEs by default.

	PR 18841
	* testsuite/ld-ifunc/ifunc.exp: Run pr18841 tests non-pie.
2020-07-09 22:58:16 +09:30
efe497e587 Update Turkish translation in the gprof sub-directory 2020-07-09 14:25:11 +01:00
7646efdf5d Update French translation in the bfd sub-directory 2020-07-09 14:20:58 +01:00
d90171dec1 Update the Windows Resource compiler (windres) to support the OWNERDRAW and BITMAP menuitem flags.
binutils* rclex.c: Add OWNERDRAW keyword.
	* rcparse.y: Add OWNERDRAW token.
	(menuitem_flag) Add BITMAP and OWNERDRAW entries.
	* resrc.c (write_rc_menuitems): Add support for OWNERDRAW and
	BITMAP flags.
	* windres.c (extended_menuitems): Likewise.
	* testsuite/binutils-all/windres/menuitem_flags.rc: New test.
2020-07-09 13:45:01 +01:00
e3fdc001d3 asan: readelf: heap buffer overflow in slurp_hppa_unwind_table
This one isn't just a weird corner case requiring multiple
.PARISC.unwind sections in an object file to trigger the buffer
overflow, it's also a simple bug that would prevent relocations being
applied in the normal case of a single .PARISC.unwind section.

	* readelf (slurp_hppa_unwind_table): Set table_len before use
	in relocation sanity checks.
2020-07-09 13:50:27 +09:30
a6978338d9 Automatic date update in version.in 2020-07-09 00:00:10 +00:00
6e2469ff7a Handle Windows drives in auto-load script paths
Fixes this testsuite fail on Windows:
FAIL: gdb.base/auto-load.exp: print $script_loaded

Converts the debugfile path from c:/dir/file to /c/dir/file, so it can be
appended to the auto-load path.

gdb/ChangeLog:

2020-07-08  Hannes Domani  <ssbssa@yahoo.de>

	* auto-load.c (auto_load_objfile_script_1): Convert drive part
	of debugfile path on Windows.

gdb/doc/ChangeLog:

2020-07-08  Hannes Domani  <ssbssa@yahoo.de>

	* gdb.texinfo: Document Windows drive conversion of
	'set auto-load scripts-directory'.
2020-07-08 20:50:43 +02:00
d1076c4151 Rename the 'obfd' argument to fbsd_nat_target::find_memory_regions.
The argument is passed as a generic cookie value to the supplied
callback and is not necessarily a pointer to a bfd.

gdb/ChangeLog:

	* fbsd-nat.c (fbsd_nat_target::find_memory_regions): Rename 'obfd'
	argument to 'data'.
2020-07-08 08:55:39 -07:00
15f3b07769 Use read_memory in ada_exception_message_1
Testing using the internal AdaCore test suite showed a regression from
the target string reading changes.  In particular, now
ada_exception_message_1 can get the wrong answer in some cases.  In
particular, when an Ada exception catchpoint is hit, sometimes the
exception name will be incorrect.  The case I was seeing changed from
the correct:

    Catchpoint 2, CONSTRAINT_ERROR (catch C_E) at [...]

to:

    Catchpoint 2, CONSTRAINT_ERROR (catch C_EE) at [...]

I was not able to reproduce this failure with the Fedora gnat.
Perhaps it is related to some local change to gnat; I do not know.

Meanwhile, because ada_exception_message_1 knows the length of the
string to read, we can use read_memory here.  This fixes the bug.

I've updated the test suite to at least exercise this code path.
However, as mentioned above, the new test does not actually provoke
the failure.

gdb/ChangeLog
2020-07-08  Tom Tromey  <tromey@adacore.com>

	* ada-lang.c (ada_exception_message_1): Use read_memory.

gdb/testsuite/ChangeLog
2020-07-08  Tom Tromey  <tromey@adacore.com>

	* gdb.ada/catch_ex/foo.adb: Pass string to raise.
	* gdb.ada/catch_ex.exp: Examine catchpoint text.
2020-07-08 07:16:59 -06:00
a7f987e837 Commit: Fix GOLD testsuite failures for 2.35 branch.
* testsuite/script_test_7.sh: Adjust expected address of the .bss
	section.
	* testsuite/script_test_9.sh: Do not expect the .init section to
	immediately follow the .text section in the mapping of sections to
	segments.
2020-07-08 11:08:05 +01:00
467bbef07f x86: various XOP insns lack L and/or W bit decoding
While some insns support both XOP.W based operand swapping and 256-bit
operation (XOP.L=1), many others don't support one or both.

For {L,S}LWPCB also fix the so far not decoded ModRM.mod == 3
restriction.

Take the opportunity and replace the custom OP_LWP_E() and OP_LWPCB_E()
routines by suitable other, non-custom operanbd specifiers.
2020-07-08 11:20:09 +02:00
6384fd9e1d x86: FMA4 scalar insns ignore VEX.L
Just like other VEX-encoded scalar insns do.

Besides a testcase for this behavior also introduce one to verify that
XOP scalar insns don't honor -mavxscalar=256, as they don't ignore
XOP.L.
2020-07-08 11:19:26 +02:00
e6123d0c61 x86: re-work operand swapping for XOP shift/rotate insns
There's no need for custom operand handling here, except for the VEX.W
controlled operand swapping.
2020-07-08 11:03:07 +02:00
93abb1468e x86: re-work operand handling for 5-operand XOP insns
There's no need for custom operand handling here, except for the VEX.W
controlled operand swapping and the printing of the remaining 4-bit
immediate. VEX.W can be handled just like 4-operand insns.

Also take the opportunity and drop the stray indirection through
vex_w_table[].
2020-07-08 11:02:40 +02:00
b13b1bc054 x86: re-work operand swapping for FMA4 and 4-operand XOP insns
There's no need for custom operand handling here, except for the VEX.W
controlled operand swapping. The latter can be easily integrated into
OP_REG_VexI4().
2020-07-08 11:02:08 +02:00
babcb2ea89 powerpc-aix5.2 tests
git commit bbd0c8e20472 broke many of these tests, and there have been
other changes that caused failures too.

	* testsuite/lib/ld-lib.exp (ar_simple_create): Pass options before
	ar command.
	* testsuite/ld-powerpc/aix52.exp: Run for rs6000-aix5.2.  Update
	match files.
	* testsuite/ld-powerpc/aix-abs-branch-1.dd: Update.
	* testsuite/ld-powerpc/aix-core-sec-1.hd: Update.
	* testsuite/ld-powerpc/aix-gc-1-32.dd: Update.
	* testsuite/ld-powerpc/aix-gc-1-64.dd: Update.
	* testsuite/ld-powerpc/aix-glink-1-32.dd: Update.
	* testsuite/ld-powerpc/aix-glink-1-64.dd: Update.
	* testsuite/ld-powerpc/aix-glink-2-32.dd: Update.
	* testsuite/ld-powerpc/aix-glink-2-64.dd: Update.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-rel.rd: Update.
	* testsuite/ld-powerpc/aix-ref-1-32.od: Update.
	* testsuite/ld-powerpc/aix-ref-1-64.od: Update.
	* testsuite/ld-powerpc/aix-toc-1-32.dd: Update.
	* testsuite/ld-powerpc/aix-toc-1-64.dd: Update.
	* testsuite/ld-powerpc/aix-weak-3-32.dd: Update.
	* testsuite/ld-powerpc/aix-weak-3-64.dd: Update.
	* testsuite/ld-powerpc/aix-abs-branch-1.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-abs-branch-1-32.nd,
	* testsuite/ld-powerpc/aix-abs-branch-1-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-abs-reloc-1.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-abs-reloc-1-32.nd,
	* testsuite/ld-powerpc/aix-abs-reloc-1-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-abs-reloc-1.od: Delete, replace with..
	* testsuite/ld-powerpc/aix-abs-reloc-1-32.od,
	* testsuite/ld-powerpc/aix-abs-reloc-1-64.od: ..these new files.
	* testsuite/ld-powerpc/aix-export-1-all.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-export-1-all-32.dd,
	* testsuite/ld-powerpc/aix-export-1-all-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-export-1-full.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-export-1-full-32.dd,
	* testsuite/ld-powerpc/aix-export-1-full-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-export-2.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-export-2-32.nd,
	* testsuite/ld-powerpc/aix-export-2-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-gc-1.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-gc-1-32.nd,
	* testsuite/ld-powerpc/aix-gc-1-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-glink-3.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-glink-3-32.dd,
	* testsuite/ld-powerpc/aix-glink-3-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1a.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1a-32.dd,
	* testsuite/ld-powerpc/aix-lineno-1a-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1a.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1a-32.nd,
	* testsuite/ld-powerpc/aix-lineno-1a-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1b.dd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1b-32.dd,
	* testsuite/ld-powerpc/aix-lineno-1b-64.dd: ..these new files.
	* testsuite/ld-powerpc/aix-lineno-1b.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-lineno-1b-32.nd,
	* testsuite/ld-powerpc/aix-lineno-1b-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.dnd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.dnd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.dnd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.drd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.drd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.drd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.nd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso.rd: Delete, replace with..
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-32.rd,
	* testsuite/ld-powerpc/aix-no-dup-syms-1-dso-64.rd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-dso.dnd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-dso-32.dnd,
	* testsuite/ld-powerpc/aix-weak-1-dso-64.dnd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-dso.hd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-dso-32.hd,
	* testsuite/ld-powerpc/aix-weak-1-dso-64.hd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-dso.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-dso-32.nd,
	* testsuite/ld-powerpc/aix-weak-1-dso-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-gcdso.dnd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-gcdso-32.dnd,
	* testsuite/ld-powerpc/aix-weak-1-gcdso-64.dnd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-gcdso.hd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-gcdso-32.hd,
	* testsuite/ld-powerpc/aix-weak-1-gcdso-64.hd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-1-gcdso.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-1-gcdso-32.nd,
	* testsuite/ld-powerpc/aix-weak-1-gcdso-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2a.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2a-32.nd,
	* testsuite/ld-powerpc/aix-weak-2a-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2b.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2b-32.nd,
	* testsuite/ld-powerpc/aix-weak-2b-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2c.nd: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2c-32.nd,
	* testsuite/ld-powerpc/aix-weak-2c-64.nd: ..these new files.
	* testsuite/ld-powerpc/aix-weak-2c.od: Delete, replace with..
	* testsuite/ld-powerpc/aix-weak-2c-32.od,
	* testsuite/ld-powerpc/aix-weak-2c-64.od: ..these new files.
2020-07-08 15:56:28 +09:30
08534be985 Automatic date update in version.in 2020-07-08 00:00:09 +00:00
3128916d88 arc: Improve error messages when assembling
gas/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/tc-arc.c (find_opcode_match): Add error messages.
	* testsuite/gas/arc/add_s-err.s: Update test.
	* testsuite/gas/arc/asm-errors.err: Likewise.
	* testsuite/gas/arc/cpu-em-err.s: Likewise.
	* testsuite/gas/arc/hregs-err.s: Likewise.
	* testsuite/gas/arc/warn.s: Likewise.
2020-07-07 16:01:48 +03:00
f337259fbd arc: Update vector instructions.
Update vadd2, vadd4h, vmac2h, vmpy2h, vsub4h vector instructions
arguments to discriminate between double/single register operands.

opcodes/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (insert_rbd): New function.
	(RBD): Define.
	(RBDdup): Likewise.
	* arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
	instructions.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2020-07-07 16:01:48 +03:00
35097e108a Re: Use is_xcoff_format in ld testsuite
git commit 7193487fa8 took h8300 out of the notarget list, resulting in
h8300-elf  +FAIL: ld-scripts/section-match-1
h8300-linux  +FAIL: ld-scripts/section-match-1

	* testsuite/ld-scripts/section-match-1.d: xfail h8300.
2020-07-07 21:57:13 +09:30
dbdba9b04d x86: Remove an incorrect AVX2 entry
The upper 16 vector registers were added by AVX512.

	PR gas/26212
	* doc/c-i386.texi: Remove an incorrect AVX2 entry.
2020-07-07 05:06:38 -07:00
e553d5b2e7 XCOFF ld testsuite fixes
* testsuite/ld-scripts/align.exp: Don't exclude xcoff.  Pass
	-bnogc ld option for xcoff.
	* testsuite/ld-scripts/provide.exp: Likewise.
	* testsuite/ld-scripts/data.exp: Pass -bnogc ld option for xcoff.
	* testsuite/ld-scripts/default-script.exp: Likewise.
	* testsuite/ld-scripts/defined.exp: Likewise.
	* testsuite/ld-scripts/empty-address.exp: Likewise.
	* testsuite/ld-scripts/expr.exp: Likewise.
	* testsuite/ld-scripts/include.exp: Likewise.
	* testsuite/ld-scripts/script.exp: Likewise.
	* testsuite/ld-scripts/assign-loc.d: Don't exclude xcoff.
	* testsuite/ld-scripts/defined3.d: Likewise.
	* testsuite/ld-scripts/defined4.d: Likewise.
	* testsuite/ld-scripts/pr18963.d: Likewise.
	* testsuite/ld-scripts/sane1.d: Likewise.
	* testsuite/ld-scripts/segment-start.d: Likewise.
	* testsuite/ld-scripts/include-1.d: Likewise, and relax text vma.
	* testsuite/ld-scripts/defined5.d: Update xfail and comment.
	* testsuite/ld-scripts/defined5.s: Tweak "defined" to be at
	non-zero section offset.
	* testsuite/ld-scripts/fill16.d: xfail for xcoff.
	* testsuite/ld-scripts/provide-2.d: Accept more symbols.
	* testsuite/ld-scripts/provide-4.d: Likewise.
	* testsuite/ld-scripts/provide-5.d: Likewise.
	* testsuite/ld-scripts/provide-6.d: Likewise.
	* testsuite/ld-scripts/provide-7.d: Likewise.
	* testsuite/ld-scripts/align.t: Accept xcoff mapped .text and .data.
	* testsuite/ld-scripts/defined3.t: Likewise.
	* testsuite/ld-scripts/defined4.t: Likewise.
	* testsuite/ld-scripts/defined5.t: Likewise.
	* testsuite/ld-scripts/fill.t: Likewise.
	* testsuite/ld-scripts/include-subdata.t: Likewise.
	* testsuite/ld-scripts/provide-1.t: Likewise.
	* testsuite/ld-scripts/provide-2.t: Likewise.
	* testsuite/ld-scripts/provide-3.t: Likewise.
	* testsuite/ld-scripts/provide-4.t: Likewise.
	* testsuite/ld-scripts/provide-5.t: Likewise.
	* testsuite/ld-scripts/provide-6.t: Likewise.
	* testsuite/ld-scripts/provide-7.t: Likewise.
	* testsuite/ld-scripts/provide-8.t: Likewise.
	* testsuite/ld-scripts/assign-loc.t: Add required xcoff sections.
	* testsuite/ld-scripts/sizeof.t: Likewise.
	* testsuite/ld-scripts/align2.t: Likewise, and mapped sections.
	* testsuite/ld-scripts/align5.t: Likewise.
	* testsuite/ld-scripts/default-script.t: Likewise.
	* testsuite/ld-scripts/empty-address-1.t: Likewise.
	* testsuite/ld-scripts/empty-address-2a.t: Likewise.
	* testsuite/ld-scripts/empty-address-2b.t: Likewise.
	* testsuite/ld-scripts/empty-address-3a.t: Likewise.
	* testsuite/ld-scripts/empty-address-3b.t: Likewise.
	* testsuite/ld-scripts/empty-address-3c.t: Likewise.
	* testsuite/ld-scripts/include-sections.t: Likewise.
	* testsuite/ld-scripts/pr14962.t: Likewise.
	* testsuite/ld-scripts/sane1.t: Likewise.
2020-07-07 18:26:34 +09:30
231b7382c0 Use is_pecoff_format in ld testsuite
--image-base 0 is not just for x86_64 mingw.  This patch fixes that,
and a case where a changed LDFLAGS leaked out of one script to the next.

	* testsuite/ld-scripts/align.exp: Use is_pecoff_format.
	* testsuite/ld-scripts/defined.exp: Likewise.
	* testsuite/ld-scripts/provide.exp: Likewise.
	* testsuite/ld-scripts/weak.exp: Likewise.
	* testsuite/ld-scripts/empty-address.exp: Likewise.  Reset LDFLAGS
	on exit.
	* testsuite/ld-scripts/expr.exp: Set LDFLAGS earlier, and with
	--image-base for PE.
	* testsuite/ld-scripts/include.exp: Set LDFLAGS for PE.
	* testsuite/ld-scripts/script.exp: Use is_pecoff_format, and
	set LDFLAGS as well as flags.
2020-07-07 18:26:34 +09:30
7193487fa8 Use is_xcoff_format in ld testsuite
* testsuite/ld-checks/checks.exp: Use is_xcoff_format.
	* testsuite/ld-powerpc/powerpc.exp: Likewise.
	* testsuite/ld-scripts/print-memory-usage.exp: Likewise.
	* testsuite/ld-srec/srec.exp: Likewise.
	* testsuite/ld-undefined/require-defined.exp: Likewise.
	* testsuite/ld-scripts/expr2.d: Likewise.
	* testsuite/ld-scripts/section-match-1.d: Only run for ELF.
	* testsuite/ld-elfvers/vers.exp: Delete dead code.
	* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
	* testsuite/ld-elfweak/elfweak.exp: Likewise.
2020-07-07 18:26:34 +09:30
34e7979860 Use is_xcoff_format in gas testsuite
* testsuite/gas/all/gas.exp: Use is_xcoff_format.
	* testsuite/gas/ppc/ppc.exp: Likewise.
	* testsuite/gas/all/weakref1l.d: Likewise.
2020-07-07 18:26:34 +09:30
5a2296ac1b Use is_xcoff_format in binutils testsuite
and restrict some other tests using is_*_format.

	* testsuite/binutils-all/ar.exp: Use is_xcoff_format.
	* testsuite/binutils-all/nm.exp: Likewise.
	* testsuite/binutils-all/copy-2.d: Run only for elf and pe targets.
	* testsuite/binutils-all/copy-3.d: Run only for elf targets.
	* testsuite/binutils-all/set-section-alignment.d: Likewise.
	* testsuite/binutils-all/copy-4.d: Don't run for xcoff.
2020-07-07 18:26:33 +09:30
efd0ed580e XCOFF binutils testsuite fix
Avoid an UNRESOLVED test due to "Error: the XCOFF file format does not
support arbitrary sections".

	* testsuite/lib/binutils-common.exp (is_xcoff_format): New.
	* testsuite/binutils-all/objcopy.exp (pr25662): Exclude xcoff.
2020-07-07 18:26:33 +09:30
fb3dc21336 XCOFF linker script PROVIDE support
Fixes bit rot from git commit b46a87b1606.

	* emultempl/aix.em (gld${EMULATION_NAME}_find_exp_assignment): Handle
	etree_provided.
2020-07-07 18:26:33 +09:30
23f5e55ed1 XCOFF ld segfaults when running ld testsuite
The binutils XCOFF support doesn't handle random linker scripts very
well at all.  These tweaks to final_link fix segfaults when some
linker created sections are discarded due to "/DISCARD/ : { *(.*) }"
in scripts.  The xcoff_mark change is necessary to not segfault on
symbols defined in scripts, which may be bfd_link_hash_defined yet
have u.def.section set to bfd_und_section_ptr.  (Which might seem odd,
but occurs during early stages of linking before input sections are
mapped.)

	* xcofflink.c (xcoff_mark): Don't mark const sections.
	(bfd_xcoff_record_link_assignment): Add FIXME.
	(_bfd_xcoff_bfd_final_link): Don't segfault on assorted magic
	sections being discarded by linker script.
2020-07-07 18:26:33 +09:30
c800188601 XCOFF deterministic archives
Adds support for "ar -D".

	* coff-rs6000.c (xcoff_write_archive_contents_old): Set default
	time, uid, gid and mode for deterministic archive.
	(xcoff_write_archive_contents_big): Likewise.
2020-07-07 18:26:33 +09:30
8af7926f45 XCOFF C_HIDEXT and C_AIX_WEAKEXT classification
If C_HIDEXT and C_AIX_WEAKEXT symbols aren't handled as globals by
coff_classify_symbol then we run into "warning: .. local symbol `some
garbage name' has no section".  These are of course both global
symbols, but C_HIDEXT is like a local in some respects and returning
COFF_SYMBOL_LOCAL for C_HIDEXT keeps nm output looking the same.
Fixes these fails on rs6000-aix5.1:

-FAIL: weakref tests, relocations
-FAIL: weakref tests, global syms
-FAIL: weakref tests, strong undefined syms
-FAIL: weakref tests, weak undefined syms

	* coffcode.h (coff_classify_symbol): Handle C_HIDEXT and
	C_AIX_WEAKEXT.
2020-07-07 18:26:33 +09:30
3bde5ad1a6 sh vxworks tests
These tests were failing only due to not being updated for readelf
output changes.

	* testsuite/ld-sh/vxworks1-lib.rd: Update expected output.
	* testsuite/ld-sh/vxworks4.d: Likewise.
2020-07-07 18:26:33 +09:30
4ac3fa4996 Stop the GOLD linker from complaining about relocations from .gnu.build.attributes sections to discarded code sections.
* target-reloc.h (Default_comdat_behaviour:get): Ignore discarded
	relocs that refer to the .gnu.build.attributes section.
2020-07-07 09:54:09 +01:00
3c6e74ce51 Fix recent failures in the ARM assembler testsuite due to the correction of a spelling mistake.
* testsuite/gas/arm/cde-missing-fp.l: Fix spelling mistake in
	expected output.
2020-07-07 09:37:38 +01:00
931452b644 x86: introduce %BW to avoid going through vex_w_table[]
This parallels %LW and %XW.
2020-07-07 08:08:09 +02:00
3be5145ee6 Automatic date update in version.in 2020-07-07 00:00:09 +00:00
9fc501fdfe gdb: Python unwinders, inline frames, and tail-call frames
This started with me running into the bug described in python/22748,
in summary, if the frame sniffing code accessed any registers within
an inline frame then GDB would crash with this error:

  gdb/frame.c:579: internal-error: frame_id get_frame_id(frame_info*): Assertion `fi->level == 0' failed.

The problem is that, when in the Python unwinder I write this:

  pending_frame.read_register ("register-name")

This is translated internally into a call to `value_of_register',
which in turn becomes a call to `value_of_register_lazy'.

Usually this isn't a problem, `value_of_register_lazy' requires the
next frame (more inner) to have a valid frame_id, which will be the
case (if we're sniffing frame #1, then frame #0 will have had its
frame-id figured out).

Unfortunately if frame #0 is inline within frame #1, then the frame-id
for frame #0 can't be computed until we have the frame-id for #1.  As
a result we can't create a lazy register for frame #1 when frame #0 is
inline.

Initially I proposed a solution inline with that proposed in bugzilla,
changing value_of_register to avoid creating a lazy register value.
However, when this was discussed on the mailing list I got this reply:

  https://sourceware.org/pipermail/gdb-patches/2020-June/169633.html

Which led me to look at these two patches:

  [1] https://sourceware.org/pipermail/gdb-patches/2020-April/167612.html
  [2] https://sourceware.org/pipermail/gdb-patches/2020-April/167930.html

When I considered patches [1] and [2] I saw that all of the issues
being addressed here were related, and that there was a single
solution that could address all of these issues.

First I wrote the new test gdb.opt/inline-frame-tailcall.exp, which
shows that [1] and [2] regress the inline tail-call unwinder, the
reason for this is that these two patches replace a call to
gdbarch_unwind_pc with a call to get_frame_register, however, this is
not correct.  The previous call to gdbarch_unwind_pc takes THIS_FRAME
and returns the $pc value in the previous frame.  In contrast
get_frame_register takes THIS_FRAME and returns the value of the $pc
in THIS_FRAME; these calls are not equivalent.

The reason these patches appear (or do) fix the regressions listed in
[1] is that the tail call sniffer depends on identifying the address
of a caller and a callee, GDB then looks for a tail-call sequence that
takes us from the caller address to the callee, if such a series is
found then tail-call frames are added.

The bug that was being hit, and which was address in patch [1] is that
in order to find the address of the caller, GDB ended up creating a
lazy register value for an inline frame with to frame-id.  The
solution in patch [1] is to instead take the address of the callee and
treat this as the address of the caller.  Getting the address of the
callee works, but we then end up looking for a tail-call series from
the callee to the callee, which obviously doesn't return any sane
results, so we don't insert any tail call frames.

The original patch [1] did cause some breakage, so patch [2] undid
patch [1] in all cases except those where we had an inline frame with
no frame-id.  It just so happens that there were no tests that fitted
this description _and_ which required tail-call frames to be
successfully spotted, as a result patch [2] appeared to work.

The new test inline-frame-tailcall.exp, exposes the flaw in patch [2].

This commit undoes patch [1] and [2], and replaces them with a new
solution, which is also different to the solution proposed in the
python/22748 bug report.

In this solution I propose that we introduce some special case logic
to value_of_register_lazy.  To understand what this logic is we must
first look at how inline frames unwind registers, this is very simple,
they do this:

  static struct value *
  inline_frame_prev_register (struct frame_info *this_frame,
                              void **this_cache, int regnum)
  {
    return get_frame_register_value (this_frame, regnum);
  }

And remember:

  struct value *
  get_frame_register_value (struct frame_info *frame, int regnum)
  {
    return frame_unwind_register_value (frame->next, regnum);
  }

So in all cases, unwinding a register in an inline frame just asks the
next frame to unwind the register, this makes sense, as an inline
frame doesn't really exist, when we unwind a register in an inline
frame, we're really just asking the next frame for the value of the
register in the previous, non-inline frame.

So, if we assume that we only get into the missing frame-id situation
when we try to unwind a register from an inline frame during the frame
sniffing process, then we can change value_of_register_lazy to not
create lazy register values for an inline frame.

Imagine this stack setup, where #1 is inline within #2.

  #3 -> #2 -> #1 -> #0
        \______/
         inline

Now when trying to figure out the frame-id for #1, we need to compute
the frame-id for #2.  If the frame sniffer for #2 causes a lazy
register read in #2, either due to a Python Unwinder, or for the
tail-call sniffer, then we call value_of_register_lazy passing in
frame #2.

In value_of_register_lazy, we grab the next frame, which is #1, and we
used to then ask for the frame-id of #1, which was not computed, and
this was our bug.

Now, I propose we spot that #1 is an inline frame, and so lookup the
next frame of #1, which is #0.  As #0 is not inline it will have a
valid frame-id, and so we create a lazy register value using #0 as the
next-frame-id.  This will give us the exact same result we had
previously (thanks to the code we inspected above).

Encoding into value_of_register_lazy the knowledge that reading an
inline frame register will always just forward to the next frame
feels.... not ideal, but this seems like the cleanest solution to this
recursive frame-id computation/sniffing issue that appears to crop
up.

The following two commits are fully reverted with this commit, these
correspond to patches [1] and [2] respectively:

  commit 5939967b355ba6a940887d19847b7893a4506067
  Date:   Tue Apr 14 17:26:22 2020 -0300

      Fix inline frame unwinding breakage

  commit 991a3e2e9944a4b3a27bd989ac03c18285bd545d
  Date:   Sat Apr 25 00:32:44 2020 -0300

      Fix remaining inline/tailcall unwinding breakage for x86_64

gdb/ChangeLog:

	PR python/22748
	* dwarf2/frame-tailcall.c (dwarf2_tailcall_sniffer_first): Remove
	special handling for inline frames.
	* findvar.c (value_of_register_lazy): Skip inline frames when
	creating lazy register values.
	* frame.c (frame_id_computed_p): Delete definition.
	* frame.h (frame_id_computed_p): Delete declaration.

gdb/testsuite/ChangeLog:

	PR python/22748
	* gdb.opt/inline-frame-tailcall.c: New file.
	* gdb.opt/inline-frame-tailcall.exp: New file.
	* gdb.python/py-unwind-inline.c: New file.
	* gdb.python/py-unwind-inline.exp: New file.
	* gdb.python/py-unwind-inline.py: New file.
2020-07-06 15:06:07 +01:00
64cb3757a9 gdb/python: New method to access list of register groups
Add a new method gdb.Architecture.register_groups which returns a new
object of type gdb.RegisterGroupsIterator.  This new iterator then
returns objects of type gdb.RegisterGroup.

Each gdb.RegisterGroup object just wraps a single reggroup pointer,
and (currently) has just one read-only property 'name' that is a
string, the name of the register group.

As with the previous commit (adding gdb.RegisterDescriptor) I made
gdb.RegisterGroup an object rather than just a string in case we want
to add additional properties in the future.

gdb/ChangeLog:

	* NEWS: Mention additions to Python API.
	* python/py-arch.c (archpy_register_groups): New function.
	(arch_object_methods): Add 'register_groups' method.
	* python/py-registers.c (reggroup_iterator_object): New struct.
	(reggroup_object): New struct.
	(gdbpy_new_reggroup): New function.
	(gdbpy_reggroup_to_string): New function.
	(gdbpy_reggroup_name): New function.
	(gdbpy_reggroup_iter): New function.
	(gdbpy_reggroup_iter_next): New function.
	(gdbpy_new_reggroup_iterator): New function
	(gdbpy_initialize_registers): Register new types.
	(reggroup_iterator_object_type): Define new Python type.
	(gdbpy_reggroup_getset): New static global.
	(reggroup_object_type): Define new Python type.
	* python/python-internal.h

gdb/testsuite/ChangeLog:

	* gdb.python/py-arch-reg-groups.exp: New file.

gdb/doc/ChangeLog:

	* gdb.texi (Registers): Add @anchor for 'info registers
	<reggroup>' command.
	* python.texi (Architectures In Python): Document new
	register_groups method.
	(Registers In Python): Document two new object types related to
	register groups.
2020-07-06 15:06:06 +01:00
0f767f942b gdb/python: Add gdb.Architecture.registers method
This commit adds a new method gdb.Architecture.registers that returns
an object of the new type gdb.RegisterDescriptorIterator.  This
iterator returns objects of the new type gdb.RegisterDescriptor.

A RegisterDescriptor is not a way to read the value of a register,
this is already covered by Frame.read_register, a RegisterDescriptor
is simply a way to discover from Python, which registers are
available for a given architecture.

I did consider just returning a string, the name of each register,
instead of a RegisterDescriptor, however, I'm aware that it we don't
want to break the existing Python API in any way, so if I return just
a string now, but in the future we want more information about a
register then we would have to add a second API to get that
information.  By going straight to a descriptor object now, it is easy
to add additional properties in the future should we wish to.

Right now the only property of a register that a user can access is
the name of the register.

In future we might want to be able to ask the register about is
register groups, or its type.

gdb/ChangeLog:

	* Makefile.in (SUBDIR_PYTHON_SRCS): Add py-registers.c
	* python/py-arch.c (archpy_registers): New function.
	(arch_object_methods): Add 'registers' method.
	* python/py-registers.c: New file.
	* python/python-internal.h
	(gdbpy_new_register_descriptor_iterator): Declare.
	(gdbpy_initialize_registers): Declare.
	* python/python.c (do_start_initialization): Call
	gdbpy_initialize_registers.
	* NEWS: Mention additions to the Python API.

gdb/testsuite/ChangeLog:

	* gdb.python/py-arch-reg-names.exp: New file.

gdb/doc/ChangeLog:

	* python.texi (Python API): Add new section the menu.
	(Frames In Python): Add new @anchor.
	(Architectures In Python): Document new registers method.
	(Registers In Python): New section.
2020-07-06 15:06:06 +01:00