mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-20 01:50:24 +08:00
Fix recent failures in the ARM assembler testsuite due to the correction of a spelling mistake.
* testsuite/gas/arm/cde-missing-fp.l: Fix spelling mistake in expected output.
This commit is contained in:
Nick Clifton
@ -1,3 +1,8 @@
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2020-07-07 Nick Clifton <nickc@redhat.com>
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* testsuite/gas/arm/cde-missing-fp.l: Fix spelling mistake in
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expected output.
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2020-07-06 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/x86-64-avx512bw-wig1.d,
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@ -54,95 +54,95 @@
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[^ :]+:[0-9]+: Error: selected processor does not support `vptt\.i8 eq,q0,q0' in Thumb mode
|
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[^ :]+:[0-9]+: Error: bad instruction `vcx3t p0,q0,q0,q0,#0'
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[^ :]+:[0-9]+: Error: bad instruction `vcx3at p0,q0,q0,q0,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#1920'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#64'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#63'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p7,s0,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s1,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s30,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#1920'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#64'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#63'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p7,d0,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d15,#0'
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#0'
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#1920'
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#64'
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#63'
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p7,s0,#0'
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s1,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s30,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#1920'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#64'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#63'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p7,d0,#0'
|
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[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p7,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p7,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p7,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p7,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p7,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s1,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s30,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p7,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d15,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p7,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s1,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s30,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p7,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d15,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#1920'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#64'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#63'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p7,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#1920'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#64'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#63'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p7,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#1920'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#64'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#63'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p7,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#1920'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#64'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#63'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p7,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p7,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p7,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p7,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#60'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#2'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p7,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p7,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s1,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s30,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p7,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d15,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d15,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p7,s0,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s1,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s30,s0,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s1,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s30,s0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s1,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s30,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#6'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#1'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p7,d0,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d15,d0,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d15,d0,#0'
|
||||
[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d15,#0'
|
||||
|
||||
Reference in New Issue
Block a user