mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-19 09:14:14 +08:00
gas: blackfin: clarify some errors with register usage in insns
Using "Register mismatch" everywhere can be a bit vague, so clarify why exactly we're barfing on these unsupported insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
@ -1,3 +1,7 @@
|
||||
2010-09-22 Robin Getz <robin.getz@analog.com>
|
||||
|
||||
* config/bfin-parse.y: Improve error messages.
|
||||
|
||||
2010-09-22 Robin Getz <robin.getz@analog.com>
|
||||
|
||||
* config/bfin-parse.y (DBG): Fix regno encoding.
|
||||
|
@ -1737,7 +1737,7 @@ asm_1:
|
||||
$$ = bfin_gen_regmv (&$3, &$1);
|
||||
}
|
||||
else
|
||||
return yyerror ("Register mismatch");
|
||||
return yyerror ("Unsupported register move");
|
||||
}
|
||||
|
||||
| CCREG ASSIGN REG
|
||||
@ -1748,7 +1748,7 @@ asm_1:
|
||||
$$ = bfin_gen_cc2dreg (1, &$3);
|
||||
}
|
||||
else
|
||||
return yyerror ("Register mismatch");
|
||||
return yyerror ("Only 'CC = Dreg' supported");
|
||||
}
|
||||
|
||||
| REG ASSIGN CCREG
|
||||
@ -1759,7 +1759,7 @@ asm_1:
|
||||
$$ = bfin_gen_cc2dreg (0, &$1);
|
||||
}
|
||||
else
|
||||
return yyerror ("Register mismatch");
|
||||
return yyerror ("Only 'Dreg = CC' supported");
|
||||
}
|
||||
|
||||
| CCREG _ASSIGN_BANG CCREG
|
||||
|
@ -1,3 +1,7 @@
|
||||
2010-09-22 Robin Getz <robin.getz@analog.com>
|
||||
|
||||
* gas/bfin/expected_move_errors.l: Update error output.
|
||||
|
||||
2010-09-22 Robin Getz <robin.getz@analog.com>
|
||||
|
||||
* gas/bfin/pseudo.d, gas/bfin/pseudo.s: New test.
|
||||
|
@ -3,4 +3,4 @@
|
||||
.*:4: Error: Cannot move A0 to high half of register. Input text was A0.
|
||||
.*:5: Error: Cannot move A1 to even register.
|
||||
.*:6: Error: Cannot move A0 to odd register.
|
||||
.*:7: Error: Register mismatch.
|
||||
.*:7: Error: Unsupported register move.
|
||||
|
Reference in New Issue
Block a user