92286 Commits

Author SHA1 Message Date
7167fe4c70 PR22397, BFD internal error when message locale isn't C
This adds positional parameter support to the bfd error handler,
something that was lost 2017-04-13 when _doprnt was added with commit
c08bb8dd.  The number of format args is now limited to 9, which is
sufficient for current _bfd_error_handler messages.  If someone
exceeds 9 args they get the joy of modifying this code to support more
args (shouldn't be too difficult).

	PR 22397
	* bfd.c (union _bfd_doprnt_args): New.
	(PRINT_TYPE): Add FIELD arg.  Take value from args.
	(_bfd_doprnt): Replace ap parameter with args.  Adjust all
	PRINT_TYPE invocations and reading of format args to suit.
	Move "%%" handling out of switch handling args.  Support
	positional parameters.
	(_bfd_doprnt_scan): New function.
	(error_handler_internal): Call _bfd_doprnt_scan and read args.
2017-11-05 18:53:10 +10:30
0724bd460b Automatic date update in version.in 2017-11-05 00:00:26 +00:00
f15d0b545b powerpc TLS in PIEs
This patch removes unnecessary GOT IE TLS relocations in PIEs.  Useful
with --no-tls-optimize, or with an enormous TLS segment.  With the
default --tls-optimize in effect IE code sequences will be edited to
LE under the same circumstances we can remove the GOT reloc.

	* elf32-ppc.c (got_entries_needed, got_relocs_needed): New functions.
	(allocate_dynrelocs, ppc_elf_size_dynamic_sections): Use them here.
	(ppc_elf_relocate_section): Don't output a dynamic relocation
	for IE GOT entries in an executable.
	* elf64-ppc.c (allocate_got): Trim unnecessary TPREL relocs.
	(ppc64_elf_size_dynamic_sections): Likewise.
	(ppc64_elf_relocate_section): Likewise.
2017-11-05 09:37:33 +10:30
98bbb1b861 PowerPC readonly_dynrelocs
PowerPC64 lacked the mapfile textrel warning on finding dynamic relocs
in read-only sections.  This patch adds it, and tidies the
readonly_dynrelocs interface.  PowerPC doesn't need a SEC_ALLOC test
because !SEC_ALLOC sections are excluded by check_relocs so will never
have dyn_relocs.

	* elf32-ppc.c (readonly_dynrelocs): Delete info param.  Update all
	callers.  Don't bother with SEC_ALLOC test.  Return section pointer.
	Move minfo call to..
	(maybe_set_textrel): ..here.
	* elf64-ppc.c (readonly_dynrelocs): Return section pointer.
	(maybe_set_textrel): Call minfo to print textrel warning to map file.
2017-11-05 09:37:33 +10:30
2e684e75ae hppa-linux TLS relocs
This patch fixes various problems with TLS relocations.

1) Report an error if a symbol has both TLS and normal GOT entries.
2) The GOT entry size calculation was obscure and made use of the fact
   that a symbol shouldn't have both normal and TLS GOT entries.
3) The second word of a GD GOT entry sometimes omitted a dynamic
   reloc, which was fine except that doing so makes it impossible for
   ld.so to differentiate GD and LD entries.  Also, a NONE reloc was
   emitted.
4) Unnecessary relocs were emitted for GOT entries.
5) GOT relocs didn't take note of UNDEFWEAK_NO_DYNAMIC_RELOC.

	* elf32-hppa.c (enum _tls_type): Move.
	(struct elf32_hppa_link_hash_entry): Make tls_type a bitfield.
	(elf32_hppa_check_relocs): Set DF_STATIC_TLS only for shared libraries.
	Tidy tls_type handling.  Set symbol tls_type for GOT_TLS_LDM too.
	(got_entries_needed, got_relocs_needed): New functions.
	(allocate_dynrelocs): Use them.
	(elf32_hppa_size_dynamic_sections): Likewise.
	(elf32_hppa_relocate_section): Delete bogus FIXME.  Formatting.
	Correct code emitting relocs on GD/IE got entries.  Report an
	error when a symbol has both normal and TLS GOT relocs.
2017-11-05 09:37:33 +10:30
127e8e9f62 PR22394, hppa-linux-ld fails to emit dynamic relocations
gcc -mfast-indirect-calls emits a function pointer initialization
without a P% (plabel) modifier.  ld does not create the necessary
dynamic relocations for this to work.  It turns out that the problem
is caused by the non_got_ref symbol flag.  This flag is set for
non-pic by check_relocs to indicate that the symbol might need copy
relocations or dynamic relocations.  Later, the backend
adjust_dynamic_symbol clears the flag to indicate dynamic relocations
are needed, but leaves it set when copy relocations were created.  The
inversion in meaning is insane, but it's that way because the backend
adjust_dynamic_symbol function doesn't get to look at all symbols..
Anyway, the insanity works for non-function symbols.  However, the
flag is left set on any function symbol with a dynamic relocation.

This patch fixes the non_got_ref handling for function symbols, adds
-z nocopyreloc for hppa-elf, reports where textrel occurs, and expands
comments.  The check_relocs change just stops creation of dyn_relocs
we always threw away later.

	PR 22394
	* elf32-hppa.c (elf32_hppa_check_relocs): Don't create dyn_relocs
	for plabels when non-pic.
	(maybe_set_textrel): New function.
	(readonly_dynrelocs): Move and rewrite.
	(elf32_hppa_adjust_dynamic_symbol): Use it.  Don't create copy
	relocs when def_regular or -z nocopyreloc.  Handle non_got_ref
	for functions.  Expand non_got_ref comments.
	(elf32_hppa_size_dynamic_sections): Use maybe_set_textrel.
2017-11-05 09:37:33 +10:30
ab4b1c4699 Use std::vector in h8300-tdep.c
This changes h8300-tdep.c to use std::vector, allowing the removal of
a cleanup.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* h8300-tdep.c (h8300_push_dummy_call): Use std::vector.
2017-11-04 10:27:20 -06:00
454dafbdf2 Introduce gdb_breakpoint_up
This introduces gdb_breakpoint_up, a unique_ptr typedef that owns a
breakpoint.  It then changes set_momentary_breakpoint to return a
gdb_breakpoint_up and fixes up the fallout.  This then allows the
removal of make_cleanup_delete_breakpoint.

Once breakpoints are fully C++-ified, this typedef can be removed in
favor of a plain std::unique_ptr.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* breakpoint.c (set_momentary_breakpoint): Return
	breakpoint_up.
	(until_break_command): Update.
	(new_until_break_fsm): Change argument types to
	breakpoint_up.
	(set_momentary_breakpoint_at_pc): Return breakpoint_up.
	(do_delete_breakpoint_cleanup, make_cleanup_delete_breakpoint):
	Remove.
	* infcmd.c (finish_forward): Update.
	* breakpoint.h (set_momentary_breakpoint)
	(set_momentary_breakpoint_at_pc): Return breakpoint_up.
	(make_cleanup_delete_breakpoint): Remove.
	(struct breakpoint_deleter): New.
	(breakpoint_up): New typedef.
	* infrun.c (insert_step_resume_breakpoint_at_sal_1): Update.
	(insert_exception_resume_breakpoint): Update.
	(insert_exception_resume_from_probe): Update.
	(insert_longjmp_resume_breakpoint): Update.
	* arm-linux-tdep.c (arm_linux_copy_svc): Update.
	* elfread.c (elf_gnu_ifunc_resolver_stop): Update.
	* infcall.c (call_function_by_hand_dummy): Update
2017-11-04 10:27:20 -06:00
331b71e5ee Use unique_xmalloc_ptr in c_type_print_base
This changes c_type_print_base to use unique_xmalloc_ptr, removing a
cleanup.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* c-typeprint.c (c_type_print_base): Use gdb::unique_xmalloc_ptr.
2017-11-04 10:27:19 -06:00
9f584b37e3 Remove cleanups from linux-tdep.c
This removes some cleanups from linux-tdep.c, replacing them with
def_vector or byte_vector as appropriate.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* linux-tdep.c (linux_core_info_proc_mappings): Use
	gdb::def_vector.
	(linux_get_siginfo_data): Return gdb::byte_vector.  Remove
	"size" argument.
	(linux_corefile_thread): Update.
	(linux_make_corefile_notes): Remove unused variable.
2017-11-04 10:27:19 -06:00
779bc38eca Use gdb::byte_vector in ppc-linux-tdep.c
This removes a cleanup from ppc-linux-tdep.c, replacing it with
gdb::byte_vector.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* ppc-linux-tdep.c (ppc_linux_get_syscall_number): Use
	gdb::byte_vector.
2017-11-04 10:27:18 -06:00
ed2b3126d1 Remove make_cleanup_free_objfile
This replaces make_cleanup_free_objfile with std::unique_ptr.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* objfiles.c (do_free_objfile_cleanup): Remove.
	* compile/compile-object-load.c (compile_object_load): Update.
	* objfiles.h (make_cleanup_free_objfile): Remove.
2017-11-04 10:27:18 -06:00
7f6743fd09 Use gdb::def_vector in sparc64-tdep.c
This removes a cleanup from sparc64-tdep.c, replacing it with
gdb::def_vector.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* sparc64-tdep.c (do_examine): Use gdb::def_vector.
	(adi_read_versions): Change "tags" to "gdb_byte *".
	(adi_print_versions): Likewise.
2017-11-04 10:27:17 -06:00
c80049d3b6 Replace start_rbreak_breakpoints and end_rbreak_breakpoints
This replaces start_rbreak_breakpoints and end_rbreak_breakpoints with
a new scoped class.  This allows the removal of a cleanup.

This also fixes an earlier memory leak regression, by changing
"string" to be a std::string.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* breakpoint.c
	(scoped_rbreak_breakpoints::scoped_rbreak_breakpoints): Rename
	from start_rbreak_breakpoints.
	(scoped_rbreak_breakpoints): Rename from end_rbreak_breakpoints.
	* breakpoint.h (class scoped_rbreak_breakpoints): New.
	(start_rbreak_breakpoints, end_rbreak_breakpoints): Remove.
	* symtab.c (do_end_rbreak_breakpoints): Remove.
	(rbreak_command): Use scoped_rbreak_breakpoints, std::string.
2017-11-04 10:27:17 -06:00
167b0be1b5 Remove directive-searched cleanups
This removes a few cleanups related to the "searched" field in
struct using_direct, replacing these with scoped_restore.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* cp-namespace.c (reset_directive_searched): Remove.
	(cp_lookup_symbol_via_imports): Use scoped_restore.
	* cp-support.c (reset_directive_searched): Remove.
	(make_symbol_overload_list_using): Use scoped_restore.
	* d-namespace.c (d_lookup_symbol_imports): Use scoped_restore.
	(reset_directive_searched): Remove.
2017-11-04 10:27:16 -06:00
5eae7aeaf7 Use unique_xmalloc_ptr in find_separate_debug_file_by_debuglink
This changes find_separate_debug_file_by_debuglink to use
unique_xmalloc_ptr, removing some cleanups.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* symfile.c (find_separate_debug_file_by_debuglink): Use
	unique_xmalloc_ptr.
2017-11-04 10:27:16 -06:00
c6bcad5ffc Use std::vector in compile-loc2c.c
This changes compile-loc2c.c to use std::vector, removing some
cleanups.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* compile/compile-loc2c.c (compute_stack_depth_worker): Change
	type of "info".
	(compute_stack_depth): Likewise.
	(do_compile_dwarf_expr_to_c): Use std::vector.
2017-11-04 10:27:15 -06:00
20dcd8cae7 Remove cleanups from link_callbacks_einfo
This removes a cleanup from link_callbacks_einfo by using std::string.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* compile/compile-object-load.c (link_callbacks_einfo): Use
	std::string.
2017-11-04 10:27:15 -06:00
33c7c59df0 Replace really_free_pendings with a scoped_ class
This introduces scoped_free_pendings, and changes users of
really_free_pendings to use it instead, removing some clenaups.

I tried to examine the affected code to ensure there aren't dangling
cleanups in the vicinity.

gdb/ChangeLog
2017-11-04  Tom Tromey  <tom@tromey.com>

	* dwarf2read.c (process_full_comp_unit, process_full_type_unit):
	Use scoped_free_pendings.
	* dbxread.c (dbx_symfile_read, dbx_psymtab_to_symtab_1): Use
	scoped_free_pendings.
	* xcoffread.c (xcoff_psymtab_to_symtab_1): Use scoped_free_pendings.
	(xcoff_initial_scan): Likewise.
	* buildsym.c (reset_symtab_globals): Update comment.
	(scoped_free_pendings): Rename from really_free_pendings.
	(prepare_for_building): Update comment.
	(buildsym_init): Likewise.
	* buildsym.h (class scoped_free_pendings): New class.
	(really_free_pendings): Don't declare.
2017-11-04 10:27:15 -06:00
ebe6dbc264 Automatic date update in version.in 2017-11-04 00:00:27 +00:00
79b0c981b8 x86: Remove func_pointer_refcount
Since check_reloc is running after gc_sections, there is no need for
reference count.  If a function pointer relocation can be resolved at
run-time, there is no need for PLT and it doesn't count as non-GOT/PLT
relocation.  func_pointer_refcount can be removed.

	* elf32-i386.c (elf_i386_check_relocs): Set plt.refcount to 1.
	Don't use func_pointer_refcount.  Don't set plt.refcount nor
	non_got_ref for function pointer reference.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
	* elfxx-x86.c (elf_x86_allocate_dynrelocs): Don't use
	func_pointer_refcount.
	(_bfd_x86_elf_copy_indirect_symbol): Don't copy
	func_pointer_refcount.
	(_bfd_x86_elf_hide_symbol): Don't use func_pointer_refcount.
	* elfxx-x86.h (GENERATE_DYNAMIC_RELOCATION_P): Likewise.
	(elf_x86_link_hash_entry): Remove func_pointer_refcount.
2017-11-03 11:15:10 -07:00
67fa57cfa5 Fix regression on ARM after Target FP patches
Commit edd079d9f6ca2f9ad21322b742269aec5de61190 exposed a pre-existing bug
in convert_doublest_to_floatformat.  In the specific case of converting
a zero value to a floatformat using a "special" byteorder (i.e. neither
floatformat_little nor floatformat_big), the output buffer was actually
left uninitialized.

gdb/ChangeLog:
2017-11-03  Ulrich Weigand  <uweigand@de.ibm.com>

	* doublest.c (convert_doublest_to_floatformat): Fix uninitialized
	output when converting a zero value to a special byteorder format.
2017-11-03 16:07:23 +01:00
fdddd2900f [ARC] Force the disassam to use the hexadecimal number for printing
Force printing of the short/signed values using hexadecimal
representation via disassembler option.

opcode/
2017-11-03  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-dis.c (print_hex): New variable.
        (parse_option): Check for hex option.
        (print_insn_arc): Use hexadecimal representation for short
        immediate values when requested.
        (print_arc_disassembler_options): Add hex option to the list.

binutils/
2017-11-03  Claudiu Zissulescu  <claziss@synopsys.com>

        * doc/binutils.texi (ARC): Update disassembler options.
        * testsuite/binutils-all/arc/hexprint.s: New file.
        * testsuite/binutils-all/arc/objdump.exp: Test hex printing feature.
2017-11-03 15:36:54 +01:00
7605d94453 Add option for Qualcomm Saphira part
This adds an option for the Qualcomm saphira core, the corresponding
gcc patch is here:

https://gcc.gnu.org/ml/gcc-patches/2017-10/msg02055.html

This was tested with an aarch64 build and make check and also by
building and running SPEC2006.

	gas/
	* config/tc-aarch64.c (aarch64_cpus): Add saphira.
	* doc/c-aarch64.texi: Likewise.
2017-11-03 19:33:04 +05:30
bf59c5d5f4 Fix integer overflow problems when reading an ELF binary with corrupt augmentation data.
PR 22386
	* dwarf.c (read_cie): Use bfd_size_type for
	augmentation_data_len.
	(display_augmentation_data): New function.
	(display_debug_frames): Use it.
	Check for integer overflow when testing augmentation_data_len.
2017-11-03 13:57:15 +00:00
3334eba7f4 [ARC] Sync opcode data base.
New EM and HS variants are developed, sync the data base to match them.

opcodes/
2017-11-03  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-tbl.h (abss, abssh, adc, adcs, adds, aslacc, asls, aslsacc)
        (asrs, asrsr, cbflyhf0r, cbflyhf1r, cmacchfr, cmacchnfr, cmachfr)
        (cmachnfr, cmpychfr, cmpychnfr, cmpyhfmr, cmpyhfr, cmpyhnfr, divf)
        (dmachbl, dmachbm, dmachf, dmachfr, dmacwhf, dmpyhbl, dmpyhbm)
        (dmpyhf, dmpyhfr, dmpyhwf, dmpywhf, dsync, flagacc, getacc, macdf)
        (macf, macfr, macwhfl, macwhflr, macwhfm, macwhfmr, macwhkl)
        (macwhkul, macwhl, macwhul, mpydf, mpyf, mpyfr, mpywhfl, mpywhflr)
        (mpywhfm, mpywhfmr, mpywhkl, mpywhkul, mpywhl, mpywhul, msubdf)
        (msubf, msubfr, msubwhfl, msubwhflr, msubwhfm, msubwhfmr, mul64)
        (negs, negsh, normacc, qmachf, qmpyh, qmpyhf, rndh, satf, sath)
        (sbcs, setacc, sflag, sqrt, sqrtf, subs, swi_s, vabs2h, vabss2h)
        (vadd4b, vadds2, vadds2h, vadds4h, vaddsubs, vaddsubs2h)
        (vaddsubs4h, valgn2h, vasl2h, vasls2h, vasr2h, vasrs2h, vasrsr2h)
        (vext2bhl, vext2bhlf, vext2bhm, vext2bhmf, vlsr2h, vmac2hf)
        (vmac2hfr, vmac2hnfr, vmax2h, vmin2h, vmpy2h, vmpy2hf, vmpy2hfr)
        (vmpy2hwf, vmsub2hf, vmsub2hfr, vmsub2hnfr, vneg2h, vnegs2h)
        (vnorm2h, vpack2hbl, vpack2hblf, vpack2hbm, vpack2hbmf, vpack2hl)
        (vpack2hm, vperm, vrep2hl, vrep2hm, vsext2bhl, vsext2bhm, vsub4b)
        (vsubadds, vsubadds2h, vsubadds4h, vsubs2, vsubs2h, vsubs4h):
        Changed opcodes.
        (prealloc, prefetch*): Place them before ld instruction.
        * arc-opc.c (skip_this_opcode): Add ARITH class.
2017-11-03 14:38:05 +01:00
50ab6ace38 Skip gdb.mi/list-thread-groups-available.exp if no xml support
I see the following test fail in gdb (configured --with-expat=no),

-list-thread-groups --available^M
&"warning: Can not parse XML OS data; XML support was disabled at compile time\n"^M
^error,msg="Can not fetch data now."^M
(gdb) ^M
FAIL: gdb.mi/list-thread-groups-available.exp: list available thread groups (unexpected output)

This patch skips it if XML parsing in GDB is disabled, like what you did
in gdb.mi/mi-info-os.exp.

gdb/testsuite:

2017-11-03  Yao Qi  <yao.qi@linaro.org>

	* gdb.mi/list-thread-groups-available.exp: Skip it if XML parsing
	in GDB is disabled.
2017-11-03 12:53:53 +00:00
6cee897971 Fix excessive memory allocation attempts and possible integer overfloaws when attempting to read a COFF binary with a corrupt symbol count.
PR 22385
	* coffgen.c (_bfd_coff_get_external_symbols): Check for an
	overlarge raw syment count.
	(coff_get_normalized_symtab): Likewise.
2017-11-03 11:55:21 +00:00
8e68731c8a Skip gdb.python/py-thrhandle.exp if python is not enabled.
gdb/testsuite:

2017-11-03  Yao Qi  <yao.qi@linaro.org>

	* gdb.python/py-thrhandle.exp: Skip it if python is not
	enabled.
2017-11-03 10:41:03 +00:00
3d47a7fef6 Automatic date update in version.in 2017-11-03 00:00:26 +00:00
c05e0c5af3 aarch64: Remove AARCH64_FEATURE_F16 from AARCH64_ARCH_V8_2
The FP16 feature is optional in ARMv8.2, so it is wrong to add it to
the default AARCH64_ARCH_V8_2 feature flags.  This patch makes the
behaviour consistent with that of gcc, which also does not assume FP16
for ARMv8.2.

include/

	* opcode/aarch64.h (AARCH64_ARCH_V8_2): Drop
	AARCH64_FEATURE_F16.
2017-11-02 22:49:32 +05:30
6ab2c4ed51 Work around integer overflows when readelf is checking for corrupt ELF notes when run on a 32-bit host.
PR 22384
	* readelf.c (print_gnu_property_note): Improve overflow checks so
	that they will work on a 32-bit host.
2017-11-02 17:01:08 +00:00
f26ae15b47 Construct readonly regcache without address space
The address space is useless to readonly regcache, so this patch removes
the parameter to construct readonly regcache.

address_space was added in regcache by 6c95b8d, but for read-write
regcache.  regcache::aspace is used for various breakpoint/watchpoint
checking, and these regcache are not read-only regcache.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* frame.c (do_frame_register_read): Remove aspace.
	* jit.c (jit_frame_sniffer): Likwise.
	* ppc-linux-tdep.c (ppu2spu_sniffer): Likewise.
	* regcache.c (regcache::regcache): Pass nullptr.
	(regcache_print): Caller updated.
	* regcache.h (regcache::regcache): Remove one constructor
	parameter aspace.
2017-11-02 15:15:42 +00:00
6c6e9412e9 const-fy regcache::m_readonly_p
gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* regcache.h (regcache) <m_readonly_p>: Change it to const bool.
2017-11-02 15:15:42 +00:00
8b86c95921 const-fy regcache::m_aspace
regcache::m_aspace is a const, never changed during the lifetime of
regcache object.  The address_space object is a const object too.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* breakpoint.c (insert_single_step_breakpoints): Update.
	* frame.c (struct frame_info) <aspace>: Add const.
	(frame_save_as_regcache): Add const.
	(get_frame_address_space): Return const address_space *.
	* frame.h (get_frame_address_space): Update declaration.
	* infrun.c (struct step_over_info) <aspace>: Add const.
	(set_step_over_info): Make aspace const.
	(displaced_step_prepare_throw): Change variable const.
	(resume): Likewise.
	(proceed): Likewise.
	(adjust_pc_after_break): Likewise.
	(save_waitstatus): Likewise.
	(handle_signal_stop): Likewise.
	(keep_going_pass_signal): Likewise.
	* jit.c (jit_frame_sniffer): Add const.
	* mips-tdep.c (mips_single_step_through_delay): Likewise.
	* ppc-linux-tdep.c (ppu2spu_sniffer): Likewise.
	* record-full.c (record_full_wait_1): Likewise.
	* regcache.c (regcache::regcache): Change parameter to const.
	* regcache.h (regcache::regcache): Likewise.
	(regcache::aspace): Return const address_space *.
	(regcache) <m_aspace>: Add const.
2017-11-02 15:15:42 +00:00
a01bda5221 s/get_regcache_aspace (regcache)/regcache->aspace ()/g
and remove get_regcache_aspace.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* darwin-nat.c (cancel_breakpoint): Use regcache->aspace ().
	* frame.c (create_sentinel_frame): Likewise.
	* infrun.c (displaced_step_prepare_throw): Likewise.
	(resume): Likewise.
	(thread_still_needs_step_over_bp): Likewise.
	(proceed): Likewise.
	(do_target_wait): Likewise.
	(adjust_pc_after_break): Likewise.
	(handle_syscall_event): Likewise.
	(save_waitstatus): Likewise.
	(handle_inferior_event_1): Likewise.
	(handle_signal_stop): Likewise.
	(keep_going_pass_signal): Likewise.
	* linux-nat.c (status_callback): Likewise.
	(save_stop_reason): Likewise.
	(resume_stopped_resumed_lwps): Likewise.
	* record-full.c (record_full_exec_insn): Likewise.
	(record_full_wait_1): Likewise.
	* regcache.c (get_regcache_aspace): Remove.
	* regcache.h (get_regcache_aspace): Remove.
2017-11-02 15:15:41 +00:00
d999647bc4 Remove regcache_descr::nr_raw_registers
struct regcache_descr has fields nr_raw_registers and gdbarch, and
nr_raw_registers can be got via gdbarch_num_regs (gdbarch), so it looks
nr_raw_registers is redundant.  This patch removes it and adds a protected
method num_raw_registers.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* regcache.c (struct regcache_descr) <nr_raw_registers>: Remove.
	(init_regcache_descr): Use gdbarch_num_regs.
	(regcache::regcache): Likewise.
	(regcache::get_register_status): Likewise.
	(regcache::assert_raw_regnum): Likewise.
	(regcache::cooked_read): Likewise.
	(regcache::cooked_read_value): Likewise.
	(regcache::cooked_write): Likewise.
	(regcache::dump): Likewise.
	(regcache::num_raw_registers): New method.
	* regcache.h (class regcache) <num_raw_registers>: New.
2017-11-02 15:15:41 +00:00
4e888c281c New method regcache::assert_regnum
class regcache has some methods checking the range of register number,
this patch is to move it in a new method assert_regnum.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* regcache.c (regcache::assert_regnum): New method.
	(regcache::invalidate): Call assert_regnum.
	(regcache::raw_update): Likewise.
	(regcache::raw_write): Likewise.
	(regcache::raw_read_part): Likewise.
	(regcache::raw_write_part): Likewise.
	(regcache::raw_supply): Likewise.
	(regcache::raw_supply_integer): Likewise.
	(regcache::raw_supply_zeroed): Likewise.
	(regcache::raw_collect): Likewise.
	(regcache::raw_collect_integer): Likewise.
	* regcache.h (regcache::assert_regnum): Declare.
2017-11-02 15:15:41 +00:00
2e1b49b32a Remove code wrapped by "#if 0"
These code wrapped by "#if 0" was added by af030b9a, which added the new
command to dump registers in 2002.  The email didn't mention this either
https://sourceware.org/ml/gdb-patches/2002-08/msg00227.html  It was there
for 15 years, and nobody needs it, so we can remove it.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* regcache.c (regcache::dump): Remove code.
2017-11-02 15:15:41 +00:00
6c5218dfdb Remove regcache_descr fields sizeof_raw_register_status and sizeof_cooked_register_status
struct regcache_descr has two fields sizeof_raw_register_status
and sizeof_cooked_register_status, but they equal to nr_cooked_registers
and nr_raw_registers respectively, so this patch removes them.

gdb:

2017-11-02  Yao Qi  <yao.qi@linaro.org>

	* regcache.c (struct regcache_descr) <sizeof_raw_register_status>:
	Remove.
	<sizeof_cooked_register_status>: Remove.
	(init_regcache_descr): Update.
	(regcache::regcache): Use nr_cooked_registers and nr_raw_registers.
	(regcache::save): Likewise.
	(regcache::dump): Likewise.
2017-11-02 15:05:12 +00:00
852735806a [ARM] Help wince objdump on coproc tests
Object files other than ELF do not have mapping symbols to indicate the
type of data for objdump to work reliably. This is why the following
tests FAIL on arm-wince-pe targets:
ARMv6T2 Thumb CoProcessor Instructions (1)
ARMv6T2 Thumb CoProcessor Instructions (2)

This patch adds the force-thumb disassembler option to objdump for this
test to PASS on these targets as well.

2017-11-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: Add
	--disassembler-options=force-thumb to objdump options.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: Likewise.
2017-11-02 14:16:22 +00:00
dcc31d286a FT32: support for FT32B processor - part 2/2
FT32B is a new FT32 family member.
This patch adds support for the compressed instructions to gdb and sim.

gdb/ChangeLog:
        * ft32-tdep.c (ft32_fetch_instruction): New function.
        (ft32_analyze_prologue): Use ft32_fetch_instruction().

sim/ChangeLog:
        * ft32/interp.c (step_once): Add ft32 shortcode decoder.
2017-11-01 18:36:51 -07:00
89f3c4b6b9 Automatic date update in version.in 2017-11-02 00:00:15 +00:00
81b42bcab1 FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts.
Part 2 adds a relaxation pass, which actually implements the code compression scheme.

bfd	* archures.c: Add bfd_mach_ft32b.
	* cpu-ft32.c: Add arch_info_struct.
	* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
	DIFF32. (ft32_elf_relocate_section): Add clauses
	for R_FT32_SC0, SC1, DIFF32.  (ft32_reloc_shortable,
	elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
	elf32_ft32_adjust_reloc_if_spans_insn,
	elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
	ft32_elf_relax_section): New function.
	* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

gas	* config/tc-ft32.c (md_assemble): add relaxation reloc
	BFD_RELOC_FT32_RELAX.  (md_longopts): Add "norelax" and
	"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
	(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
	ft32_allow_local_subtract): New function.
	* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
	* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
	shortcodes.

include	* elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
2017-11-01 15:33:24 +00:00
a67d66eb97 Prevent illegal memory accesses when attempting to read excessively large COFF line number tables.
PR 22376
	* coffcode.h (coff_slurp_line_table): Check for an excessively
	large line number count.
2017-11-01 15:21:46 +00:00
e0115a8446 Update check for invalid values in pe_bfd_read_buildid function.
PR 22373
	* peicode.h (pe_bfd_read_buildid): Revise check for invalid size
	and offset in light of further possible bogus values.
2017-11-01 12:37:33 +00:00
ee357486aa Fix an invalid free called when attempting to link a COFF object against an ELF archive with --no-keep-memory enabled.
PR 22369
	* coffgen.c (_bfd_coff_free_symbols): Fail if called on a non-COFF
	file.
	* cofflink.c (coff_link_check_archive_element): Skip non-COFF
	members of an archive.
2017-11-01 11:35:42 +00:00
4070243b5c [ARM] Fix Coprocessor instructions availability
A few coprocessor instructions introduced in ARMv2 are currently
accepted by GAS when targeting ARMv1 due to a typo in the code. This
patch fixes the issue and introduce a more fine grained testing for
coprocessor instructions availability. Coprocessor instructions are
grouped as follows:

* ARM coprocessor instructions introduced in ARMv2
  Includes: ldc, stc, mcr, mrc, cdp, ldcl, stcl
  Guarded by: ARM_EXT_V2
  Tests: copro-arm_v2plus-arm_v*.d

* ARM coprocessor instructions introduced in ARMv5
  Includes: ldc2, ldc2l, stc2, stc2l, cdp2, mcr2, mrc2
  Guarded by: ARM_EXT_V5
  Tests: copro-arm_v5plus-arm_v*.d

* ARM coprocessor instructions introduced in ARMv5TE
  Includes: mcrr, mrrc
  Guarded by: ARM_EXT_V5E
  Tests: copro-arm_v5teplus-arm_v*.d

* ARM coprocessor instructions introduced in ARMv6
  Includes: mcrr2, mrrc2
  Guarded by: ARM_EXT_V6
  Tests: copro-arm_v6plus-arm_v*.d

* Thumb coprocessor instructions introduced in ARMv6T2
  Includes: ldc, ldcl, stc, stcl, mcr, mrc, mcrr, mrrc, cdp, ldc2,
  ldc2l, stc2, stc2l, cdp2, mcr2, mrc2, mcrr2, mrrc2
  Guarded by: ARM_EXT_V6T2
  Tests: copro-thumb_v6t2plus-thumb_v*.d

For each of these groups, at least 2 tests are performed:
* instructions are not available in earlier architecture
* instructions are available in architecture where they were introduced
More tests need to be performed when instructions in a group span
several assembly files.

Note that an instruction in the original coprocessor testcase is
changed to unified syntax to allow the testcase to be assembled for ARM
and Thumb state. Correct processing of legacy syntax is covered in other
testcases.

2017-11-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
	* config/tc-arm.c (arm_ext_v2): Define to ARM_EXT_V2 feature bit.
	* testsuite/gas/arm/copro.s: Split into ...
	* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus.s: This while
	changing it to unified syntax and ...
	* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus.s: this and ...
	* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus.s: This and ...
	* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus.s: This.
	* testsuite/gas/arm/copro.d: Split into ...
	* testsuite/gas/arm/copro-arm_v2plus-arm_v2.d: This but target ARMv2
	and ...
	* testsuite/gas/arm/copro-arm_v5plus-arm_v5.d: this but target ARMv5
	and ...
	* testsuite/gas/arm/copro-arm_v5teplus-arm_v5te.d: This but target
	ARMv5TE and ...
	* testsuite/gas/arm/copro-arm_v6plus-arm_v6.d: This but target ARMv6.
	* testsuite/gas/arm/copro-arm_v2plus-arm_v1.d: New testcase.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d: New testcase.
	* testsuite/gas/arm/copro-arm_v2plus-thumb_v6t2plus-unavail.l: Expected
	errors for the above two testcases.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-1.d: New testcase.
	* testsuite/gas/arm/copro-arm_v5plus-arm_v4.d: New testcase.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d: New testcase.
	* testsuite/gas/arm/copro-arm_v5plus-thumb_v6t2plus-unavail.l:
	Expected errors for the above two testcases.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-2.d: New testcase.
	* testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d: New testcase.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d: New testcase.
	* testsuite/gas/arm/copro-arm_v5teplus-thumb_v6t2plus-unavail.l:
	Expected errors for the above two testcases.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-3.d: New testcase.
	* testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d: New testcase.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d: New testcase.
	* testsuite/gas/arm/copro-arm_v6plus-thumb_v6t2plus-unavail.l:
	Expected errors for the above two testcases.
	* testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v6t2-4.d: New testcase.
2017-11-01 09:49:13 +00:00
3988aed54a PR22374, PowerPC unnecessary PLT entries
We don't need a PLT entry when function pointer initialization in a
read/write section is the only reference to a given function symbol.
This patch prevents the unnecessary PLT entry, and ensures no dynamic
relocs are emitted when UNDEFWEAK_NO_DYNAMIC_RELOC says so.

bfd/
	PR 22374
	* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Don't create a plt
	entry when just a dynamic reloc can serve.  Ensure no dynamic
	relocations when UNDEFWEAK_NO_DYNAMIC_RELOC by setting non_got_ref.
	Expand and move the non_got_ref comment.
	* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/
	* testsuite/ld-powerpc/ambiguousv2.d: Remove FIXME.
2017-11-01 18:46:34 +10:30
e48f0c8f1b PR22374 testcase, function pointer references in .data
Function pointer references in .data ought to use a dynamic reloc.
There shouldn't be any need for a PLT entry and definitely no copy
reloc.

This test fails on quite a few targets, but isn't something that
anyone should worry about too much.  It's really just a missed
optimization.

	PR 22374
	* testsuite/ld-elf/pr22374a.s,
	* testsuite/ld-elf/pr22374b.s,
	* testsuite/ld-elf/pr22374-1.r,
	* testsuite/ld-elf/pr22374-2.r: New test.
	* testsuite/ld-elf/elf.exp: Run it.
2017-11-01 18:45:34 +10:30