106888 Commits

Author SHA1 Message Date
badf836a0c nds32: __builtin_strncpy bound equals destination size
* config/tc-nds32.c (do_pseudo_push_bhwd, do_pseudo_pop_bhwd),
	(do_pseudo_pusha, do_pseudo_pushi): Avoid fortify strncpy bound
	error.
2021-05-27 10:44:31 +09:30
cc37fec878 Automatic date update in version.in 2021-05-27 00:00:28 +00:00
50c95a739c x86: Propery check PC16 reloc overflow in 16-bit mode instructions
commit a7664973b24a242cd9ea17deb5eaf503065fc0bd
Author: Jan Beulich <jbeulich@suse.com>
Date:   Mon Apr 26 10:41:35 2021 +0200

    x86: correct overflow checking for 16-bit PC-relative relocs

caused linker failure when building 16-bit program in a 32-bit ELF
container.  Update GNU_PROPERTY_X86_FEATURE_2_USED with

 #define GNU_PROPERTY_X86_FEATURE_2_CODE16 (1U << 12)

to indicate that 16-bit mode instructions are used in the input object:

https://groups.google.com/g/x86-64-abi/c/UvvXWeHIGMA

to indicate that 16-bit mode instructions are used in the object to
allow linker to properly perform relocation overflow check for 16-bit
PC-relative relocations in 16-bit mode instructions.

1. Update x86 assembler to always generate the GNU property note with
GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF object.
2. Update i386 and x86-64 linkers to use 16-bit PC16 relocations if
input object is marked with GNU_PROPERTY_X86_FEATURE_2_CODE16.

bfd/

	PR ld/27905
	* elf32-i386.c: Include "libiberty.h".
	(elf_howto_table): Add 16-bit R_386_PC16 entry.
	(elf_i386_rtype_to_howto): Add a BFD argument.  Use 16-bit
	R_386_PC16 if input has 16-bit mode instructions.
	(elf_i386_info_to_howto_rel): Update elf_i386_rtype_to_howto
	call.
	(elf_i386_tls_transition): Likewise.
	(elf_i386_relocate_section): Likewise.
	* elf64-x86-64.c (x86_64_elf_howto_table): Add 16-bit
	R_X86_64_PC16 entry.
	(elf_x86_64_rtype_to_howto): Use 16-bit R_X86_64_PC16 if input
	has 16-bit mode instructions.
	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Set
	elf_x86_has_code16 if relocatable input is marked with
	GNU_PROPERTY_X86_FEATURE_2_CODE16.
	* elfxx-x86.h (elf_x86_obj_tdata): Add has_code16.
	(elf_x86_has_code16): New.

binutils/

	PR ld/27905
	* readelf.c (decode_x86_feature_2): Support
	GNU_PROPERTY_X86_FEATURE_2_CODE16.

gas/

	PR ld/27905
	* config/tc-i386.c (set_code_flag): Update x86_feature_2_used
	with GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF
	object.
	(set_16bit_gcc_code_flag): Likewise.
	(x86_cleanup): Always generate the GNU property note if
	x86_feature_2_used isn't 0.
	* testsuite/gas/i386/code16-2.d: New file.
	* testsuite/gas/i386/code16-2.s: Likewise.
	* testsuite/gas/i386/x86-64-code16-2.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run code16-2 and x86-64-code16-2.

include/

	PR ld/27905
	* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): New.

ld/

	PR ld/27905
	* testsuite/ld-i386/code16.d: New file.
	* testsuite/ld-i386/code16.t: Likewise.
	* testsuite/ld-x86-64/code16.d: Likewise.
	* testsuite/ld-x86-64/code16.t: Likewise.
	* testsuite/ld-i386/i386.exp: Run code16.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
2021-05-26 12:13:24 -07:00
11bb5c41eb gdb: don't zero-initialize reg_buffer contents
The reg_buffer constructor zero-initializes (value-initializes, in C++
speak) the gdb_bytes of the m_registers array.  This is not necessary,
as these bytes are only meaningful if the corresponding register_status
is REG_VALID.  If the corresponding register_status is REG_VALID, then
they will have been overwritten with the actual register data when
reading the registers from the system into the reg_buffer.

Fix that by removing the empty parenthesis following the new expression,
meaning that the bytes will now be default-initialized, meaning they'll
be left uninitialized.  For reference, this is explained here:

  https://en.cppreference.com/w/cpp/language/new#Construction

These new expressions were added in 835dcf92618e ("Use std::unique_ptr
in reg_buffer").  As mentioned in that commit message, the use of
value-initialisation was done on purpose to keep existing behavior, but
now there is some data that suggest it would be beneficial not to do it,
which is why I suggest changing it.

This doesn't make a big difference on typical architectures where the
register buffer is not that big.  However, on ROCm (AMD GPU), the
register buffer is about 65000 bytes big, so the reg_buffer constructor
shows up in profiling.  If you want to make some tests and profile it on
a standard system, it's always possible to change:

  - m_registers.reset (new gdb_byte[m_descr->sizeof_raw_registers] ());
  + m_registers.reset (new gdb_byte[65000] ());

and run a program that constantly hits a breakpoint with a false
condition.  For example, by doing this change and running the following
program:

    static void break_here () {}

    int main ()
    {
      for (int i = 0; i < 100000; i++)
        break_here ();
    }

with the following GDB incantation:

   /usr/bin/time  ./gdb -nx --data-directory=data-directory  -q test -ex "b break_here if 0" -ex r -batch

I get, for value-intializing:

    11.75user 7.68system 0:18.54elapsed 104%CPU (0avgtext+0avgdata 56644maxresident)k

And for default-initializing:

    6.83user 8.42system 0:14.12elapsed 108%CPU (0avgtext+0avgdata 56512maxresident)k

gdb/ChangeLog:

	* regcache.c (reg_buffer::reg_buffer): Default-initialize
	m_registers array.

Change-Id: I5071a4444dee0530ce1bc58ebe712024ddd2b158
2021-05-26 15:03:00 -04:00
983d5689cc x86-64: Add ilp32-12 to check R_X86_64_32 for x32
* testsuite/ld-x86-64/ilp32-12.d: New file.
	* testsuite/ld-x86-64/ilp32-12.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run ilp32-12.
2021-05-26 06:50:20 -07:00
3f335b75d8 i386: Replace movsb with movsxb
PR gas/27906
	* doc/c-i386.texi: Replace movsb with movsxb as an alias for
	movsbq.
2021-05-26 06:20:26 -07:00
ef5f598ca6 Introduce htab_delete_entry
In a bigger series I'm working on, it is convenient to have a
libiberty hash table that manages objects allocated with 'new'.  To
make this simpler, I wrote a small template function to serve as a
concise wrapper.  Then I realized that this could be reused in a few
other places.

gdb/ChangeLog
2021-05-26  Tom Tromey  <tom@tromey.com>

	* dwarf2/read.c (allocate_type_unit_groups_table)
	(handle_DW_AT_stmt_list, allocate_dwo_file_hash_table): Use
	htab_delete_entry.
	(free_line_header_voidp): Remove.
	* completer.c
	(completion_tracker::completion_hash_entry::deleter): Remove.
	(completion_tracker::discard_completions): Use htab_delete_entry.
	* utils.h (htab_delete_entry): New template function.
2021-05-26 07:02:51 -06:00
fe1f847d9a RISC-V: Allow to link the objects with unknown prefixed extensions.
Since the policies of GNU and llvm toolchain are different for now,
current binutils mainline cannot accept any draft extensions, including
rvv, zfh, ....  The Clang/LLVM allows these draft stuff on mainline,
but the GNU ld might be used with them, so this causes the link time
problems.

The patch allows ld to link the objects with unknown prefixed extensions,
which are probably generated by LLVM or customized toolchains.

bfd/
    * elfxx-riscv.h (check_unknown_prefixed_ext): New bool.
    * elfxx-riscv.c (riscv_parse_prefixed_ext): Do not check the
    prefixed extension name if check_unknown_prefixed_ext is false.
    * elfnn-riscv.c (riscv_merge_arch_attr_info): Set
    check_unknown_prefixed_ext to false for linker.
gas/
    * config/tc-riscv.c (riscv_set_arch): Set
    check_unknown_prefixed_ext to true for assembler.
2021-05-26 11:02:29 +08:00
9495896335 Automatic date update in version.in 2021-05-26 00:00:46 +00:00
2c5731b647 Fix documentation of gdb.SYMBOL_LOC_COMMON_BLOCK
gdb/doc/ChangeLog:

2021-05-25  Hannes Domani  <ssbssa@yahoo.de>

	* python.texi (Symbols In Python): Fix gdb.SYMBOL_LOC_COMMON_BLOCK.
2021-05-25 21:55:11 +02:00
d3e52e120b Arm: Fix forward thumb references [PR gas/25235]
When assembling a forward reference the symbol will be unknown and so during
do_t_adr we cannot set the thumb bit.  The bit it set so early to prevent
relaxations that are invalid. i.e. relaxing a Thumb2 to Thumb1 insn when the
symbol is Thumb.

But because it's done so early we miss the case for forward references.
This patch changes it so that we additionally check the thumb bit during the
internal relocation processing.

In principle we should be able to only set the bit during reloc processing but
that would require changes to the other relocations that the instruction could
be relaxed to.

This approach still allows early relaxations (which means that we have less
iteration of internal reloc processing) while still fixing the forward reference
case.

gas/ChangeLog:

2021-05-24  Tamar Christina  <tamar.christina@arm.com>

	PR gas/25235
	* config/tc-arm.c (md_convert_frag): Set LSB when Thumb symbol.
	(relax_adr): Thumb symbols 4 bytes.
	* testsuite/gas/arm/pr25235.d: New test.
	* testsuite/gas/arm/pr25235.s: New test.
2021-05-25 16:04:52 +01:00
74fd118fb9 Add range checks to local array accesses in elf32-arm.c.
bfd	* elf32-arn.c (struct elf_arm_obj_tdata): Add num_entries field.
	(elf32_arm_num_entries): New macro.
	(elf32_arm_allocate_local_sym_info): Initialise the new field.
	Allocate arrays individually so that buffer overruns can be
	detected by memory checkers.
	(elf32_arm_create_local_iplt): Check num_entries.
	(elf32_arm_get_plt_info): Likewise.
	(elf32_arm_final_link_relocate): Likewise.
	(elf32_arm_check_relocs): Likewise.
	(elf32_arm_size_dynamic_sections): Likewise.
	(elf32_arm_output_arch_local_syms): Likewise.
2021-05-25 11:22:15 +01:00
cc850f7472 Fix formatting in elf32-arm.c 2021-05-25 11:13:58 +01:00
bc30a119f3 Regen cris files
* cris-desc.c: Regenerate.
	* cris-desc.h: Regenerate.
	* cris-opc.h: Regenerate.
	* po/POTFILES.in: Regenerate.
2021-05-25 17:17:04 +09:30
5d7f11f0e7 [GOLD] PR27815, gold fails to build with latest GCC
Don't use nullptr, it requires -std=c++11 on versions of gcc prior to
6.1.  It would be possible to arrange to pass -std=c++11 automatically
when required (top level configure does that for gcc builds) but that
seems overkill and since we're not up-to-date on the top level config
files would mean someone would need to sync those over.

	PR gold/27815
	* gc.h (gc_process_relocs): Use cast in Section_id constructor.
2021-05-25 16:47:16 +09:30
4be1e8dbb3 asan: _bfd_elf_parse_attributes heap buffer overflow
I exposed a problem with the change in commit 574ec1084d to the outer
loop of _bfd_elf_parse_attributes.  "p_end - p >= 4" is better than
"p < p_end - 4" as far as pointer UB is concerned if the size of the
attritbute section is say, 3 bytes.  However you do need to ensure p
never exceeds p_end, and that length remaining is kept consistent with
the pointer.

	* elf-attrs.c (elf_attr_strdup): New function.
	(_bfd_elf_attr_strdup): Use it here.
	(elf_add_obj_attr_string): New function, extracted from..
	(bfd_elf_add_obj_attr_string): ..here.
	(elf_add_obj_attr_int_string): New function, extracted from..
	(bfd_elf_add_obj_attr_int_string): ..here.
	(_bfd_elf_parse_attributes): Don't allocate an extra byte for a
	string terminator.  Instead ensure parsing doesn't go past
	end of sub-section.  Use size_t variables for lengths.
2021-05-25 15:07:08 +09:30
e63e5f9f9f Automatic date update in version.in 2021-05-25 00:00:41 +00:00
5471128011 opcodes: cris: move desc & opc files from sim/
All other cgen ports keep their generated desc & opc files under
opcodes/, so move the cris files over too.  The cris-opc.c file,
while not generated, is already here to complement.
2021-05-24 18:42:34 -04:00
32e2770e59 gnulib: import ffs
The Blackfin sim uses this function, but Windows/mingw doesn't provide it.
2021-05-24 18:36:55 -04:00
78a7f5766a MAINTAINERS: Update path to readline config.{sub,guess} files
Complement commit 6999161a2a3b ("Move readline to the readline/readline
subdirectory") and update the path to readline config.{sub,guess} files
documented in MAINTAINERS.

	* MAINTAINERS: Update path to readline config.{sub,guess} files.
2021-05-24 18:11:49 +02:00
2e8adb6448 Update config.sub and config.guess for MIPS R3 and R5 ISA support
Complement commit ae52f4830604 ("Add MIPS r3 and r5 support.") and get
changes for config.sub to recognize MIPS CPU patterns for the R3 and R5
ISA levels, used by GAS to set defaults in gas/configure.ac.  Oddly, R6
ISA support has been correctly added already.

	/
	* config.guess: Import from upstream.
	* config.sub: Likewise.

	readline/
	* readline/support/config.guess: Import from upstream.
	* readline/support/config.sub: Likewise.
2021-05-24 18:11:49 +02:00
a56889ae38 Prevent flickering when redrawing the TUI python window
tui_win_info::refresh_window first redraws the background window, then
tui_wrefresh draws the python text on top of it, which flickers.

By using wnoutrefresh for the background window, the actual drawing on
the screen is only done once, without flickering.

gdb/ChangeLog:

2021-05-24  Hannes Domani  <ssbssa@yahoo.de>

	* python/py-tui.c (tui_py_window::refresh_window):
	Avoid flickering.
2021-05-24 17:16:44 +02:00
c45d37a9bd gdb/doc: add '@:' after 'e.g.' to help texinfo
Add '@:' after 'e.g.' to let texinfo know that this is not the end of
a sentence.  This is only needed when there's a space immediately
after the last '.'.

gdb/doc/ChangeLog:

	* gdb.texi (Initialization Files): Add '@:' after 'e.g.'.
	(Source Path): Likewise.
	(GDB/MI Development and Front Ends): Likewise.
	(ARM Features): Likewise.
	(gdb man): Likewise.
2021-05-24 10:22:49 +01:00
5d0ed830d3 RISC-V: PR25212, Report errors for invalid march and mabi combinations.
This patch clarify the following invalid combinations of march and mabi,
* ilp32f/lp64f abi without f extension.
* ilp32d/lp64d abi without d extension.
* ilp32q/lp64q abi without q extension.
* e extension with any abi except ilp32e

GNU assembler reports errors when finding the above invalid combinations.
But LLVM-MC reports warnings and ignores these invalid cases.  It help to
set the correct ilp32/lp64/ilp32e abi according to rv32/rv64/rve.  This
looks good and convenient, so perhaps we can do the same things.  However,
if you don't set the mabi, GNU assembler also try to set the suitable
ABI according to march/elf-attribute.  Compared to LLVM-MC, we will choose
double/quad abi if d/f extension is set.

gas/
    PR 25212
    * config/tc-riscv.c (riscv_set_abi_by_arch): If -mabi isn't set, we
    will choose ilp32e abi for rv32e.  Besides, report errors for the
    invalid march and mabi combinations.
    * testsuite/gas/riscv/mabi-attr-rv32e.s: New testcase.  Only accept
    ilp32e abi for rve extension.
    * testsuite/gas/riscv/mabi-fail-rv32e-lp64f.d: Likewise.
    * testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l: Likewise.
    * testsuite/gas/riscv/mabi-fail-rv32e-lp64d.d: Likewise.
    * testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l: Likewise.
    * testsuite/gas/riscv/mabi-fail-rv32e-lp64d.q: Likewise.
    * testsuite/gas/riscv/mabi-fail-rv32e-lp64d.q: Likewise.
    Renamed all mabi testcases to their march-mabi settings.
2021-05-24 11:47:18 +08:00
d16ce6e4d5 sim: cris: fix memory setup typos
The cleanup to use BFD_VMA_FMT also adjusted this line, but used the
incorrect format: while BFD_VMA_FMT needs an explicit "x", PRIx32 does
not, so the spurious "x" here confused the parser and broke execution.
2021-05-23 23:43:37 -04:00
d699be882b sim: bfin: fix the otp fix
I misread the code and thought data0/... were bu64 when they were
actually bu32.  Fix the call to assemble the 2 64-bit values instead
of passing the 2 halves of the first 64-bit value.
2021-05-23 22:16:13 -04:00
3cc4ee83ad sim: bfin: fix build warnings w/newer gcc
The bfin_otp_write_page_val func wants a pointer to an bu64[2] array,
but this code passes it a pointer to a single bu64.  It's in a struct
with a known compatible layout:
	bu64 data0, data1, data2, data3;
But gcc doesn't allow these kinds of tricks anymore.  Use the more
verbose form to make the compiler happy since this is not performance
sensitive code.
2021-05-23 21:37:31 -04:00
98591adf69 Automatic date update in version.in 2021-05-24 00:00:46 +00:00
9a28444faa sim: rl78: rename open symbol to avoid collisions
If the header files define open(), make sure our local open var
doesn't shadow it.
2021-05-23 17:40:32 -04:00
e82a36be9a sim: cris: add unistd.h for environ decl
We include environ.h for the fallback, but we still need to include
unistd.h in case it provides it as gnulib will detect.
2021-05-23 17:39:16 -04:00
01d3ae40df sim: bfin: add strings.h for ffs() 2021-05-23 17:36:29 -04:00
fbf3c4b979 [gdb/tdep] Use pid to choose process 64/32-bitness
In a linux kernel mailing list discussion, it was mentioned that "gdb has
this odd thing where it takes the 64-bit vs 32-bit data for the whole process
from one thread, and picks the worst possible thread to do it (ie explicitly
not even the main thread, ...)" [1].

The picking of the thread is done here in
x86_linux_nat_target::read_description:
...
  /* GNU/Linux LWP ID's are process ID's.  */
  tid = inferior_ptid.lwp ();
  if (tid == 0)
    tid = inferior_ptid.pid (); /* Not a threaded program.  */
...

To understand what this code does, let's investigate a scenario in which
inferior_ptid.lwp () != inferior_ptid.pid ().

Say we start exec jit-attach-pie, identified with pid x.  The main thread
starts another thread that sleeps, and then the main thread waits for the
sleeping thread.  So we have two threads, identified with LWP IDs x and x+1:
...
PID  LWP  CMD
x    x    ./jit-attach-pie
x    x+1  ./jit-attach-pie
...
[ The thread with LWP x is known as the thread group leader. ]

When attaching to this exec using the pid, gdb does a stop_all_threads which
iterates over all the threads, first LWP x, and then LWP x+1.

So the state we arrive with at x86_linux_nat_target::read_description is:
...
(gdb) p inferior_ptid
$1 = {m_pid = x, m_lwp = x+1, m_tid = 0}
...
and consequently we probe 64/32-bitness from thread LWP x+1.

[ Note that this is different from when gdb doesn't attach but instead
launches the exec itself, in which case there's just one thread to begin with,
and consequently the probed thread is LWP x. ]

According to aforementioned remark, a better choice would have been the main
thread, that is, LWP x.

This patch implement that choice, by simply doing:
...
  tid = inferior_ptid.pid ();
...

The fact that gdb makes a per-process permanent choice for 64/32-bitness is a
problem in itself: each thread can be in either 64 or 32 bit mode, and change
forth and back.  That is a problem that this patch doesn't fix.

Now finally: why does this matter in the context of the linux kernel
discussion?  The discussion was related to a patch that exposed io_uring
threads to user-space.  This made it possible that one of those threads would
be picked out to select 64/32-bitness.  Given that such threads are atypical
user-space threads in the sense that they don't return to user-space and don't
have a userspace register state, reading their registers returns garbage, and
so it could f.i. occur that in a 64-bit process with all normal user-space
threads in 64-bit mode, the probing would return 32-bit.

It may be that this is worked-around on the kernel side by providing userspace
register state in those threads such that current gdb is happy.  Nevertheless,
it seems prudent to fix this on the gdb size as well.

Tested on x86_64-linux.

[1] https://lore.kernel.org/io-uring/CAHk-=wh0KoEZXPYMGkfkeVEerSCEF1AiCZSvz9TRrx=Kj74D+Q@mail.gmail.com/

gdb/ChangeLog:

2021-05-23  Tom de Vries  <tdevries@suse.de>

	PR tdep/27822
	* target.h (struct target_ops): Mention target_thread_architecture in
	read_description comment.
	* x86-linux-nat.c (x86_linux_nat_target::read_description): Use
	pid to determine if process is 64-bit or 32-bit.
	* aarch64-linux-nat.c (aarch64_linux_nat_target::read_description):
	Same.
	* ppc-linux-nat.c (ppc_linux_nat_target::read_description): Same.
        * riscv-linux-nat.c (riscv_linux_nat_target::read_description): Same.
	* s390-linux-nat.c (s390_linux_nat_target::read_description): Same.
	* arm-linux-nat.c (arm_linux_nat_target::read_description): Same.
	Likewise, use pid to determine if kernel supports reading VFP
	registers.
2021-05-23 10:08:45 +02:00
01a8c731aa elf: Use official name LoongArch for EM_LOONGARCH.
The official name for Loongson Architecture is LoongArch, it is better
to use LoongArch instead of Loongson Loongarch for EM_LOONGARCH to avoid
confusion and keep consistent with the various of software in the future.

The official documentation in Chinese:
http://www.loongson.cn/uploadfile/cpu/LoongArch.pdf

The translated version in English:
https://loongson.github.io/LoongArch-Documentation/

    binutils/
        * readelf.c (get_machine_name): Change Loongson Loongarch to
	LoongArch.

    include/
        * elf/common.h (EM_LOONGARCH): Change Loongson Loongarch to
	LoongArch.
2021-05-23 10:35:48 +08:00
8dc196f2fa Automatic date update in version.in 2021-05-23 00:00:50 +00:00
8569d6e13c Fix option type comments for CMDARG_EARLYINIT_FILE and CMDARG_EARLYINIT_COMMAND.
The comments in the enum cmdarg_kind were using -sx and -sex instead
of -eix and -eiex.

(Note that gdb --help does not speak about these options).

(pushed as obvious)
2021-05-22 17:02:46 +02:00
d71893802f Re: Fix offset for ia64 PCREL60B relocation on HP-UX
PR 25599
	* config/tc-ia64.c (emit_one_bundle): Expand comment for HP-UX
	adjustment.  Add assertion.
	* testsuite/gas/ia64/reloc-mlx.d: Pass when slot 2 specified
	for PCREL60B.
2021-05-22 17:23:24 +09:30
574ec1084d bfd dwarf2 sanity checking
This patch is aimed at the many places in dwarf2.c that blindly
increment a data pointer after calling functions that are meant to
read a fixed number of bytes.  The problem with that is with damaged
dwarf we might increment a data pointer past the end of data, which is
UB and complicates (ie. bugs likely) any further use of that data
pointer.  To fix those problems, I've moved incrementing of the data
pointer into the functions that do the reads.  _bfd_safe_read_leb128
gets the same treatment for consistency.

	* libbfd.c (_bfd_safe_read_leb128): Remove length_return parameter.
	Replace data pointer with pointer to pointer.  Increment pointer
	over bytes read.
	* libbfd-in.h (_bfd_safe_read_leb128): Update prototype.
	* elf-attrs.c (_bfd_elf_parse_attributes): Adjust to suit.  Be
	careful not to increment data pointer past end.  Remove now
	redundant pr17512 check.
	* wasm-module.c (READ_LEB128): Adjust to suit changes to
	_bfd_safe_read_leb128.
	* dwarf2.c (read_n_bytes): New inline function, old one renamed to..
	(read_blk): ..this.  Allocate and return block.  Increment bfd_byte**
	arg.
	(read_3_bytes): New function.
	(read_1_byte, read_1_signed_byte, read_2_bytes, read_4_bytes),
	(read_8_bytes, read_string, read_indirect_string),
	(read_indirect_line_string, read_alt_indirect_string): Take a
	byte_byte** arg which is incremented over bytes read.  Remove any
	bytes_read return.  Rewrite limit checks to compare lengths
	rather than pointers.
	(read_abbrevs, read_attribute_value, read_formatted_entries),
	(decode_line_info, find_abstract_instance, read_ranges),
	(read_rnglists, scan_unit_for_symbols, parse_comp_unit),
	(stash_comp_unit): Adjust to suit.  Rewrite limit checks to
	compare lengths rather than pointers.
	* libbfd.h: Regenerate.
2021-05-22 17:23:24 +09:30
1f1fb219fd [GOLD] PR27815, gold fails to build with latest GCC
...gold/gc.h:250:37: error: ISO C++ says that these are ambiguous, even though the worst conversion for the first is better than the worst conversion for the second: [-Werror]
  250 |                 (*secvec).push_back(Section_id(NULL, 0));
      |                                     ^~~~~~~~~~~~~~~~~~~

	PR gold/27815
	* gc.h (gc_process_relocs): Use nullptr in Section_id constructor.
2021-05-22 17:23:06 +09:30
168671c14c sim: mips: Add shadow mappings for 32-bit memory address space
32-bit MIPS programs run on the 64-bit simulator model in 64-bit
sign-extended space. The mapping from 64-bit sign-extended addresses to
32-bit addresses was removed by commit
26f8bf63bf36f9062a5cc1afacf71462a4abe0c8, breaking the 64-bit simulator
model. Add shadow mappings from 64-bit sign extended address space to
32-bit address spaces, in lieu of the AddressTranslation function.

2021-05-04  Faraz Shahbazker  <fshahbazker@wavecomp.com>

sim/mips/ChangeLog:
	* interp.c (sim_open): Add shadow mappings from 32-bit
	address space to 64-bit sign-extended address space.
2021-05-22 11:32:35 +05:30
b312488f10 sim: mips: Only truncate sign extension bits for 32-bit target models
64-bit BFD for MIPS applies a standard sign extension on all addresses
assuming 64-bit target.  These bits are required for 64-bit and can only
be safely truncated for 32-bit target models. This partially reverts commit
b36d953bced0a4fecdde1823abac70ed7038ee95

The sign-extension logic modeled by BFD is an integral part of the
MIPS64 architecture spec. It appears in the virtual address map, where
sign extension allows for 32-bit compatibility segments [1] with 64-bit
addressing. Truncating these addresses prematurely (commit
models (-DWITH_TARGET_WORD_BITSIZE=64).

In the ISA itself, direct addressing (Load-Upper-Immediate) and indirect
addressing (Load-Word) both automatically sign-extend their results. These
instructions regenerate the sign-extended addresses even if we don't start
with one (see pr gdb/19447).

Moreover, some instructions like ADD*/SUB* have unpredictable behaviour when
an operand is not correctly sign extended [3]. This affects PC-relative
addressing in particular, so arithmetic on the link-address generated in the
return address register by a jump-and-link is no longer possible, neither is
the use of the PC-relative addressing instructions provided by MIPSR6.

[1] "MIPS64 Architecture for Programmers Volume III: The MIPS64
    Privileged Resource Architecture", Document Number: MD00091,
    Revision 6.02, December 10, 2015, Section 4.3 "Virtual Address
    Spaces", pp. 29-31
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00091-2B-MIPS64PRA-AFP-06.03.pdf

[2] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Reference Manual", Document Number: MD00087,
    Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
    List of Instructions", pp. 321
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

[3] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Reference Manual", Document Number: MD00087,
    Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
    List of Instructions", pp. 56
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

2021-04-23  Faraz Shahbazker  <fshahbazker@wavecomp.com>

sim/mips/ChangeLog:
	* interp.c (sim_create_inferior): Only truncate sign extension
	bits for 32-bit target models
.
2021-05-22 11:30:57 +05:30
39549caef4 sim/d10v: Use offsetof in a static assertion about structure layout.
clang 11 fails to compile the static assertion as it cannot compute
the pointer value at a compile time:

gdb/sim/d10v/interp.c:1149:37: error: static_assert expression is not an integral constant expression
  static_assert ((uintptr_t) &State == (uintptr_t) &State.regs,
                 ~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Instead, assert that the offset of State.regs is 0.

sim/d10v/ChangeLog:

	* interp.c (sim_create_inferior): Use offsetof in static
	assertion.
2021-05-21 17:27:05 -07:00
33d93379d2 Automatic date update in version.in 2021-05-22 00:00:41 +00:00
778ae9ccc8 [gdb/testsuite] Add target board cc-with-gnu-debuglink.exp
Add target board cc-with-gnu-debuglink.exp that splits off debuginfo into a
seperate .debug file and links to it using .gnu_debuglink.

Tested on x86_64-linux.

gdb/ChangeLog:

2021-05-21  Tom de Vries  <tdevries@suse.de>

	PR testsuite/25047
	* contrib/cc-with-tweaks.sh: Handle -l.

gdb/testsuite/ChangeLog:

2021-05-21  Tom de Vries  <tdevries@suse.de>

	PR testsuite/25047
	* boards/cc-with-gnu-debuglink.exp: New file.
2021-05-21 18:11:12 +02:00
ca43e66033 testsuite/gdb.dwarf2: avoid dead code in dw2-inline-with-lexical-scope.c
The test in gdb.dwarf2/dw2-inline-with-lexical-scope.c fails with icc.
The reason is, icc did not emit code for a dead statement, which in
turn caused some labels to be collapsed.  Fix this by replacing the
dead code with assignment to a global value.  The statement itself
does not change the test scenario.

Also fix a whitespacing problem around an assignment operator.

gdb/testsuite/ChangeLog:
2021-05-21  Tankut Baris Aktemur  <tankut.baris.aktemur@intel.com>

	* gdb.dwarf2/dw2-inline-with-lexical-scope.c (func): Replace
	a dead code with an assignment to a global var.  Fix a
	whitespacing problem around an assignment operator.
2021-05-21 17:21:20 +02:00
6d1a09b77a [gdb/breakpoint] Fix assert in jit_event_handler
Consider a minimal test-case test.c:
...
int main (void) { return 0; }
...
which we can compile into llvm byte code using clang:
...
$ clang -g -S -emit-llvm --target=x86_64-unknown-unknown-elf test.c
...
and then run using lli, which uses the llvm jit:
...
$ lli test.ll
...

If we run this under gdb, we run into an assert:
...
$ gdb -q -batch -ex run --args /usr/bin/lli test.ll
Dwarf Error: Cannot not find DIE at 0x18a936e7 \
  [from module libLLVM.so.10-10.0.1-lp152.30.4.x86_64.debug]

[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib64/libthread_db.so.1".
src/gdb/jit.c:1178: internal-error: \
  void jit_event_handler(gdbarch*, objfile*): \
  Assertion `jiter->jiter_data != nullptr' failed.
...

This is caused by the following.

When running jit_breakpoint_re_set_internal, we first handle
libLLVM.so.10.debug, and set a jit breakpoint.

Next we handle libLLVM.so.10:
...
(gdb) p the_objfile.original_name
$42 = 0x2494170 "libLLVM.so.10"
...
but the minimal symbols we find are from libLLVM.so.10.debug:
...
(gdb) p reg_symbol.objfile.original_name
$43 = 0x38e7c50 "libLLVM.so.10-10.0.1-lp152.30.4.x86_64.debug"
(gdb) p desc_symbol.objfile.original_name
$44 = 0x38e7c50 "libLLVM.so.10-10.0.1-lp152.30.4.x86_64.debug"
...
and consequently, the objf_data is the one from libLLVM.so.10.debug:
...
      jiter_objfile_data *objf_data
        = get_jiter_objfile_data (reg_symbol.objfile);
...
and so we hit this:
...
      if (objf_data->cached_code_address == addr)
        continue;
...
and no second jit breakpoint is inserted.

Subsequently, the jit breakpoint is triggered and handled, but when finding
the symbol for the breakpoint address we get:
...
(gdb) p jit_bp_sym.objfile.original_name
$52 = 0x2494170 "libLLVM.so.10"
...

The assert 'jiter->jiter_data != nullptr' triggers because it checks
libLLVM.so.10 while the one with jiter_data setup is libLLVM.so.10.debug.

This fixes the assert:
...
       jiter_objfile_data *objf_data
-        = get_jiter_objfile_data (reg_symbol.objfile);
-        = get_jiter_objfile_data (the_objfile);
...
but consequently we'll have two jit breakpoints, so we also make sure we don't
set a jit breakpoint on separate debug objects like libLLVM.so.10.debug.

Tested on x86_64-linux.

gdb/ChangeLog:

2021-05-21  Tom de Vries  <tdevries@suse.de>

	PR breakpoint/27889
	* jit.c (jit_breakpoint_re_set_internal): Skip separate debug
	objects.  Call get_jiter_objfile_data with the_objfile.
2021-05-21 15:09:14 +02:00
3b2bef8bbd [Binutils] Update NT_ARM note types for readelf
binutils * readelf.c (get_note_type): Add missing NT_ARM_* entries.
2021-05-21 10:43:52 +01:00
894982bfcc [AArch64] MTE corefile support
bfd	* elf.c (elfcore_make_memtag_note_section): New function.
	(elfcore_grok_note): Handle NT_MEMTAG note types.

binutils* readelf.c (get_note_type): Handle NT_MEMTAG note types.

include	* elf/common.h (NT_MEMTAG): New constant.
	(NT_MEMTAG_TYPE_AARCH_MTE): New constant.
2021-05-21 10:40:32 +01:00
75b969ccb1 Automatic date update in version.in 2021-05-21 00:00:54 +00:00
1487a14ec2 gdb: remove linespec_p typedef
I guess this was used with the old VEC implementation, but there is no
reason to have this typedef anymore.

gdb/ChangeLog:

	* linespec.c (linespec_p): Remove.  Replace all uses with
	"linespec *".

Change-Id: I4cea59ae1cd46985da9c08d3a69686846b1ad028
2021-05-20 15:57:37 -04:00
bb6203bf1d cli-script: use unique_ptr to not leak next struct
In cli/cli-script.c, process_next_line() allocates memory
which will eventually end up being assigned to the 'next'
field in struct command_line.  However, in a case
recurse_read_control_structure returns 'invalid_control'
this memory is leaked. This commit uses std::unique_ptr
as appropriate to prevent this leakage.

This issue was found by coverity scanning.

gdb/ChangeLog:

        * cli/cli-script.h (command_line_up): New unique_ptr typedef.
	* cli/cli-script.c (multi_line_command_p): Use unique_ptr
        command_line_up instead of struct command_line.
	(build_command_line): Likewise.
	(get_command_line): Update the cmd function call parameter.
	(process_next_line):  Use unique_ptr command_line_up instead
        of struct command_line.
	(recurse_read_control_structure): Change the the type of
        next to command_line_up.
	(read_command_lines_1): Change type of `next' to be
        command_line_up and update all references of `next'
        accordingly.
2021-05-20 21:03:47 +02:00