9526 Commits

Author SHA1 Message Date
ebadfda114 ci: fix tests 2022-08-27 14:30:56 +04:00
cd65d3a872 gas: config-parse: fix warning 2022-08-27 14:30:28 +04:00
0aae0978b9 fix compile warnings/errors for GCC-11 and clang-14 2022-08-27 14:30:24 +04:00
4fa4431f0d esp32s2: fix negative immediate offset handling for relative jumps (jumpr, jumps)
When providing negative immediate offset (step) values to the JUMPR and
JUMPS opcodes, the resulting instruction contained an incorrect offset.

This commit fixes that behaviour.

This is the same issue that affected the ESP32 code. See previous commit for
more technical detail on the issue.
2022-08-25 15:27:02 +04:00
3835fa8c64 esp32: fix negative immediate offset handling for relative jumps (jumpr, jumps)
When providing negative immediate offset (step) values to the JUMPR and
JUMPS opcodes, the resulting instruction contained an incorrect offset.

This commit fixes that behaviour.

According to the technical reference manual (TRM)
[https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf]
the magnitude of the relative shift from the current position is determined
by bit 0-6 of the step field, and the direction is determined by bit 7,
with 0 meaning PC+step, and 1 meaning PC-step.

(For comparion, the ULP C macros in the ESP-IDF implement this as described
in the TRM. All step values passed to the relevant JUMP macros will result in the
instruction step field having bit 7 indicating the sign and bit 0-6 holding the
absolute value of the offset.)

This fix modifies the I_JUMP_REL{R,S} macros to set the step field correctly
for negative immediate values. Since symbols, which are resolved later during
the BFD relocation phase always evaluate to 0 at this stage (from EXPR_VALUE),
this change to the macro only affects the case of immediate values (as can be
seen from all previous test cases resulting in the same listing output as
before). The relocation code (in function esp32ulp_jumprelr_reloc) already did
this correctly for symbols, and thus remains unchanged.

Example of the issue:

For an offset of -2, the step field should have looked as follows:

  bit 0-6 = 2   # positive 2
  bit   7 = 1   # 1 means negative

However, the result was actually:

  bit 0-6 = 126  # negative 2 (two's compliment)
  bit   7 = 1    # 1 means negative
2022-08-25 15:27:02 +04:00
8a6cd474e4 Update test file. 2022-08-25 15:27:02 +04:00
7c132a4fa6 Fix for Esp32-S2 LDx/STx instructions change offst from 11 bit unsigned to 11 bit signed 2022-08-25 15:27:02 +04:00
1876617e96 Fix the LD/ST offset range from 11 bits unsigned to 11 bits signed values. 2022-08-25 15:27:02 +04:00
3251894005 Version integrates two chips: Esp32 and Esp32-S2 together.
Switch between CPU done by --mcpu=esp32/esp32s2 options.
2022-08-25 15:27:02 +04:00
835ea345b0 Add LE/EQ/GE conditions to the JUMPR instruction. 2022-08-25 15:27:02 +04:00
7215e64236 Jumpr instruction for esp32s2-ulp added. 2022-08-25 15:27:02 +04:00
4509dc707b Jumpr conditions extended with GE (>=) and LE (<=) to be compatible with Esp32-ulp code. 2022-08-25 15:27:02 +04:00
2d2d8aa41d ci: Fixup archive naming, generalize CI script, upd macos image 2022-08-25 15:27:02 +04:00
f8b92c9928 Added build for esp32-s2ulp core. 2022-08-25 15:26:57 +04:00
c718281d2b Test update 2022-08-24 00:08:41 +04:00
dc32431f13 All I2C variables should be non pc relative. 2022-08-24 00:08:29 +04:00
a9b2e10c97 A problem with jumps over next instruction fixed. 2022-08-23 23:58:28 +04:00
e6e4a02ecd This commit fixes problem with jumps instruction.
The problem with EQ and GT conditions fixed. Added new conditions: LE and GE.
2022-08-23 23:58:18 +04:00
87a1826754 Adress range for registers fixed. 2022-08-23 23:58:11 +04:00
b7e01e168d Auto tests included into CI. Tests have to mark changed instructions. 2022-08-23 23:58:05 +04:00
370a28596b Ranges in test file corrected. 2022-08-23 23:57:58 +04:00
e32971a219 Fixed bug with register range.
Added new test files.
Added files to compare correct disassemble.
2022-08-23 23:57:49 +04:00
5aab9e6441 esp32ulp: fix generation of relocation information
Merges https://github.com/espressif/binutils-esp32ulp/pull/11
Closes https://github.com/espressif/binutils-esp32ulp/issues/9
Closes https://github.com/espressif/binutils-esp32ulp/issues/8
2022-08-23 23:55:19 +04:00
4eedf5730b Added axtended range of registers adresses for reg_rd/reg_wr instructions. 2022-08-23 23:55:12 +04:00
0bfd8bfb26 Bugfix. A value range for the AND/OR/ADD operations changed. 2022-08-23 23:54:49 +04:00
81d3e197f9 esp32ulp: fix warnings when building with clang 2022-08-23 23:54:13 +04:00
64f8c8c64b Add handling of local bf labels to lexer 2022-08-23 23:52:09 +04:00
252c1b738f Bugfix: problem with relative jumpr that uccures with local labels fixed. 2022-08-23 23:52:02 +04:00
07a55d0a3c Due to incorrect parameter of 'I_JUMP_RI' macro, instruction 'jump rX' was generated incorrectly 2022-08-23 23:51:50 +04:00
fcad583d4a Added extension for ADC command. Now ADC command accepted with tree arguments. 2022-08-23 23:51:30 +04:00
249fddf8c3 Instruction I2C_RD and I2C_WR updated 2022-08-23 23:50:49 +04:00
8dd229f985 Format of command Wake changed. Check for div 4 for addressing implemented. 2022-08-23 23:49:13 +04:00
9ff8e65459 Length of macros in listing increased to 100 lines. 2022-08-23 23:49:04 +04:00
6446b4a121 Bugfix: jump instruction with local label 2022-08-23 23:48:37 +04:00
f36f2f864d Instruction for ADC access changed. 2022-08-23 23:46:51 +04:00
ff798cd530 TSENS instruction updated. 2022-08-23 23:46:42 +04:00
8429f1b2ac Bugfix for -al option. Now works correct without listing. 2022-08-23 23:46:28 +04:00
7e78d06c5c Commands with relative address jumps updated. 2022-08-23 23:45:30 +04:00
0d56809031 Processing of sddresses in direct jump corrected. 2022-08-23 23:43:53 +04:00
3780082ddb New handling of ULP addresses added. Now all labels and addresses automatically converted to the ULP 32 bit format. The constants and variables not affected.
This conversion works for local and for global variables.
2022-08-23 23:42:22 +04:00
394f406cfa Ranges check and test cases for that was added. 2022-08-23 23:36:43 +04:00
6889c4a181 Comments formated in better order. 2022-08-23 23:36:36 +04:00
ca82edc612 Added assembler test sample file. 2022-08-23 23:36:28 +04:00
9fa43920cd Debug messages was removed. 2022-08-23 23:36:18 +04:00
5895412724 Added copyright message to the headers. Warnings removed. 2022-08-23 23:36:10 +04:00
ce6f5e6da1 Added changes for existing files of binutils. 2022-08-23 23:35:41 +04:00
658f8fb4f5 Added assembler and linker for Esp32ulp processor. 2022-08-23 19:07:54 +04:00
5f8c443140 ct-ng bundled patch: 0004-Dont-link-to-libfl-as-its-unnecessary.patch 2020-12-23 13:15:20 +07:00
3792ebe961 gas, arm: PR26858 Fix availability of single precision vmul/vmla in arm mode
This patch fixes a mistake when enabling MVE instructions that disabled support
for single precision vmla and vmul for arm mode.

gas/ChangeLog:
2020-11-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	Backport from mainline.
	2020-11-12  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 26858
	*  config/tc-arm.c (asm_opcode insns): Fix vmul and vmla's ARM_VARIANT.
	* testsuite/gas/arm/pr26858.s: New test.
	* testsuite/gas/arm/pr26858.d: New test.
2020-11-19 10:34:53 +00:00
ea873d892e gas: Reuse the input file entry in the file table
Some instructions can be emitted (dwarf2_emit_insn is called) before the
first .file <NUMBER> directive has been seen, which allocates the input
file as the first file entry.  Reuse the input file entry in the file
table.

	PR gas/25878
	PR gas/26740
	* dwarf2dbg.c (file_entry): Remove auto_assigned.
	(assign_file_to_slot): Remove the auto_assign argument.
	(allocate_filenum): Updated.
	(allocate_filename_to_slot): Reuse the input file entry in the
	file table.
	(dwarf2_where): Replace as_where with as_where_physical.
	* testsuite/gas/i386/dwarf5-line-1.d: New file.
	* testsuite/gas/i386/dwarf5-line-1.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run dwarf5-line-1.

(cherry picked from commit 6915020bb134ae29fd772295c66fd67b5944962d)

gas: Always use as_where for preprocessed assembly codes

Always clear the slot 1 if it was assigned to the input file before the
first .file <NUMBER> directive has been seen.  Always use as_where to
generate the correct debug infor for preprocessed assembly codes.

	PR gas/25878
	PR gas/26740
	* dwarf2dbg.c (allocate_filename_to_slot): Don't reuse the slot 1
	here.
	(dwarf2_where): Restore as_where.
	(dwarf2_directive_filename): Clear the slot 1 if it was assigned
	to the input file.
	* testsuite/gas/i386/dwarf5-line-2.d: New file.
	* testsuite/gas/i386/dwarf5-line-2.s: Likewise.
	* testsuite/gas/i386/dwarf5-line-3.d: Likewise.
	* testsuite/gas/i386/dwarf5-line-3.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run dwarf5-line-2 and
	dwarf5-line-3.

(cherry picked from commit bd0c565edbf4ba8121fded38e389530d7fa6f963)

gas: Clear all auto-assigned file slots

Since a file slot is auto-assigned for the #APP marker appeared before
the first .file <NUMBER> directive has been seen, clear all auto-assigned
file slots when seeing the first .file <NUMBER> directive.

	PR gas/26778
	* * dwarf2dbg.c (num_of_auto_assigned): New.
	(allocate_filenum): Increment num_of_auto_assigned.
	(dwarf2_directive_filename): Clear the slots auto-assigned
	before the first .file <NUMBER> directive was seen.
	* testsuite/gas/i386/dwarf4-line-1.d: New file.
	* testsuite/gas/i386/dwarf4-line-1.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run dwarf4-line-1.

(cherry picked from commit ae9d2233e61a98ff8dba56be10219aa5306ffc9a)
2020-11-16 20:41:54 +01:00