102710 Commits

Author SHA1 Message Date
3d32667a0e ci: fix getting artifacts in derived jobs 2023-06-14 13:51:12 +07:00
49e9ddfae0 ci: add linux-i686 build
fix artifacts
	add ad-hoc versioning
2023-06-12 20:33:20 +07:00
7acf4c2c15 ci: fix release_tag artifacts 2022-08-31 00:37:49 +04:00
5b5fbae020 ci: fix deploy, add job update_idf_tools esp32ulp-elf-v2.35_20220830 2022-08-30 23:41:55 +04:00
cef3262a16 ci: remove esp32s2 build
Use --mcpu=<esp32/esp32s2> option
2022-08-27 15:16:43 +04:00
ebadfda114 ci: fix tests 2022-08-27 14:30:56 +04:00
3aba61a5ca ci: fix job needs and update docker images 2022-08-27 14:30:47 +04:00
cd65d3a872 gas: config-parse: fix warning 2022-08-27 14:30:28 +04:00
0aae0978b9 fix compile warnings/errors for GCC-11 and clang-14 2022-08-27 14:30:24 +04:00
e6e2709eaa ci: add arm64, armhf, win64 builds 2022-08-25 15:27:02 +04:00
4fa4431f0d esp32s2: fix negative immediate offset handling for relative jumps (jumpr, jumps)
When providing negative immediate offset (step) values to the JUMPR and
JUMPS opcodes, the resulting instruction contained an incorrect offset.

This commit fixes that behaviour.

This is the same issue that affected the ESP32 code. See previous commit for
more technical detail on the issue.
2022-08-25 15:27:02 +04:00
3835fa8c64 esp32: fix negative immediate offset handling for relative jumps (jumpr, jumps)
When providing negative immediate offset (step) values to the JUMPR and
JUMPS opcodes, the resulting instruction contained an incorrect offset.

This commit fixes that behaviour.

According to the technical reference manual (TRM)
[https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf]
the magnitude of the relative shift from the current position is determined
by bit 0-6 of the step field, and the direction is determined by bit 7,
with 0 meaning PC+step, and 1 meaning PC-step.

(For comparion, the ULP C macros in the ESP-IDF implement this as described
in the TRM. All step values passed to the relevant JUMP macros will result in the
instruction step field having bit 7 indicating the sign and bit 0-6 holding the
absolute value of the offset.)

This fix modifies the I_JUMP_REL{R,S} macros to set the step field correctly
for negative immediate values. Since symbols, which are resolved later during
the BFD relocation phase always evaluate to 0 at this stage (from EXPR_VALUE),
this change to the macro only affects the case of immediate values (as can be
seen from all previous test cases resulting in the same listing output as
before). The relocation code (in function esp32ulp_jumprelr_reloc) already did
this correctly for symbols, and thus remains unchanged.

Example of the issue:

For an offset of -2, the step field should have looked as follows:

  bit 0-6 = 2   # positive 2
  bit   7 = 1   # 1 means negative

However, the result was actually:

  bit 0-6 = 126  # negative 2 (two's compliment)
  bit   7 = 1    # 1 means negative
2022-08-25 15:27:02 +04:00
8a6cd474e4 Update test file. 2022-08-25 15:27:02 +04:00
7c132a4fa6 Fix for Esp32-S2 LDx/STx instructions change offst from 11 bit unsigned to 11 bit signed 2022-08-25 15:27:02 +04:00
1876617e96 Fix the LD/ST offset range from 11 bits unsigned to 11 bits signed values. 2022-08-25 15:27:02 +04:00
3251894005 Version integrates two chips: Esp32 and Esp32-S2 together.
Switch between CPU done by --mcpu=esp32/esp32s2 options.
2022-08-25 15:27:02 +04:00
835ea345b0 Add LE/EQ/GE conditions to the JUMPR instruction. 2022-08-25 15:27:02 +04:00
7215e64236 Jumpr instruction for esp32s2-ulp added. 2022-08-25 15:27:02 +04:00
4509dc707b Jumpr conditions extended with GE (>=) and LE (<=) to be compatible with Esp32-ulp code. 2022-08-25 15:27:02 +04:00
cce658acf6 ci: Add ARMEL builds 2022-08-25 15:27:02 +04:00
97fadaf2ed ci: Fixup uploading GH releases 2022-08-25 15:27:02 +04:00
2d2d8aa41d ci: Fixup archive naming, generalize CI script, upd macos image 2022-08-25 15:27:02 +04:00
f8b92c9928 Added build for esp32-s2ulp core. 2022-08-25 15:26:57 +04:00
c718281d2b Test update 2022-08-24 00:08:41 +04:00
dc32431f13 All I2C variables should be non pc relative. 2022-08-24 00:08:29 +04:00
3b2afd6713 ci: Set deploy stage after testing 2022-08-24 00:08:18 +04:00
6cd58f20a1 ci: Include git tag into binutils version 2022-08-23 23:58:34 +04:00
a9b2e10c97 A problem with jumps over next instruction fixed. 2022-08-23 23:58:28 +04:00
e6e4a02ecd This commit fixes problem with jumps instruction.
The problem with EQ and GT conditions fixed. Added new conditions: LE and GE.
2022-08-23 23:58:18 +04:00
87a1826754 Adress range for registers fixed. 2022-08-23 23:58:11 +04:00
b7e01e168d Auto tests included into CI. Tests have to mark changed instructions. 2022-08-23 23:58:05 +04:00
370a28596b Ranges in test file corrected. 2022-08-23 23:57:58 +04:00
e32971a219 Fixed bug with register range.
Added new test files.
Added files to compare correct disassemble.
2022-08-23 23:57:49 +04:00
5aab9e6441 esp32ulp: fix generation of relocation information
Merges https://github.com/espressif/binutils-esp32ulp/pull/11
Closes https://github.com/espressif/binutils-esp32ulp/issues/9
Closes https://github.com/espressif/binutils-esp32ulp/issues/8
2022-08-23 23:55:19 +04:00
4eedf5730b Added axtended range of registers adresses for reg_rd/reg_wr instructions. 2022-08-23 23:55:12 +04:00
fca2748a61 ci: Add a feature to publish a release to GitHub 2022-08-23 23:54:57 +04:00
0bfd8bfb26 Bugfix. A value range for the AND/OR/ADD operations changed. 2022-08-23 23:54:49 +04:00
ac32966dcf ci: cross-compile toolchain for macOS 2022-08-23 23:54:37 +04:00
81d3e197f9 esp32ulp: fix warnings when building with clang 2022-08-23 23:54:13 +04:00
64f8c8c64b Add handling of local bf labels to lexer 2022-08-23 23:52:09 +04:00
252c1b738f Bugfix: problem with relative jumpr that uccures with local labels fixed. 2022-08-23 23:52:02 +04:00
07a55d0a3c Due to incorrect parameter of 'I_JUMP_RI' macro, instruction 'jump rX' was generated incorrectly 2022-08-23 23:51:50 +04:00
fcad583d4a Added extension for ADC command. Now ADC command accepted with tree arguments. 2022-08-23 23:51:30 +04:00
249fddf8c3 Instruction I2C_RD and I2C_WR updated 2022-08-23 23:50:49 +04:00
6478c0fe69 ci: make directory name within archive independent on version number 2022-08-23 23:49:41 +04:00
5ec2f83639 ci: Switch Windows build to 32-bit, zipped archive
Use new esp32-toolchain Docker image for build
2022-08-23 23:49:33 +04:00
843976394d ci: add build on macos 2022-08-23 23:49:21 +04:00
8dd229f985 Format of command Wake changed. Check for div 4 for addressing implemented. 2022-08-23 23:49:13 +04:00
9ff8e65459 Length of macros in listing increased to 100 lines. 2022-08-23 23:49:04 +04:00
6446b4a121 Bugfix: jump instruction with local label 2022-08-23 23:48:37 +04:00