94665 Commits

Author SHA1 Message Date
d869f28890 Revert "RISC-V: Disable shared library support for embedded elf."
This reverts commit be1dce26256aa9f6c7742e81c8c3db9eacff079d.

To enable --eh-frame-hdr option back
2021-01-21 21:19:45 +07:00
461f9c6aea Restore build on x86_64-w64-mingw32
* gold/configure.ac: Add checks for link, mkdtemp.
	* gold/configure: Regenerated.
	* gold/config.in: Regenerated.
	* gold/plugin.cc (Plugin_recorder::init): Fall back to mktemp
	if mkdtemp is not available.
	(link_or_copy_file): Fall back to copy if link() is not available.

Signed-off-by: Alexey Neyman <stilor@att.net>
esp-2020r3-binutils esp-2020r2-binutils esp-2020r1-binutils esp-2019r2-binutils esp32-binutils-2019r1
2019-04-08 15:52:33 +07:00
ca1e05baec xtensa: move dynamic relocations sections consistency check
The function elf_xtensa_finish_dynamic_sections checks that sizes of
sections .rela.dyn and .rela.plt match number of corresponding relocation
records, but the check is only done when .rela.plt is non-empty, so, e.g.
it is never run for the static PIE.
Rearrange the test so that .rela.dyn and .rela.plt are checked always.

bfd/
2018-07-23  Max Filippov  <jcmvbkbc@gmail.com>

	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Move
	relocation sections consistency check to always check both
	.rela.dyn and .rela.plt when they exist. Rearrange variable
	definition and assignment places.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Backported from: f82863d797e461b936dff2b659a3aa65088ee87e
2019-04-08 15:51:42 +07:00
45e308eb82 xtensa: fix relaxation of undefined weak references in shared objects
The change c451bb34ae8b ("xtensa: don't emit dynamic relocation for weak
undefined symbol") didn't properly handle shrinking of relocation
sections due to coalescing of references to a dynamic undefined weak
symbol in a shared object, which resulted in the following assertion
failure in ld when linking uClibc-ng libthread_db for xtensa:

  BFD (GNU Binutils) 2.31 internal error, aborting at elf32-xtensa.c:3269
  in elf_xtensa_finish_dynamic_sections

Shrink dynamic relocations section for dynamic undefined weak symbols
when linking a shared object.

bfd/
2018-07-23  Max Filippov  <jcmvbkbc@gmail.com>

	* elf32-xtensa.c (shrink_dynamic_reloc_sections): Shrink dynamic
	relocations section for dynamic undefined weak symbols when
	linking a shared object.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Backported from: 5d3a462f05cba5b0c0c96de899b84fb84155c760
2019-04-08 15:51:08 +07:00
51e5ca61cc ct-ng bundled patch: 0008-poison-system-directories.patch
Patch adapted to binutils 2.23.2 and extended to use
BR_COMPILER_PARANOID_UNSAFE_PATH by Thomas Petazzoni.

[Gustavo: adapt to binutils 2.25]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>

Upstream-Status: Inappropriate [distribution: codesourcery]

Patch originally created by Mark Hatle, forward-ported to
binutils 2.21 by Scott Garman.

purpose:  warn for uses of system directories when cross linking

Code Merged from Sourcery G++ binutils 2.19 - 4.4-277

2008-07-02  Joseph Myers  <joseph@codesourcery.com>

    ld/
    * ld.h (args_type): Add error_poison_system_directories.
    * ld.texinfo (--error-poison-system-directories): Document.
    * ldfile.c (ldfile_add_library_path): Check
    command_line.error_poison_system_directories.
    * ldmain.c (main): Initialize
    command_line.error_poison_system_directories.
    * lexsup.c (enum option_values): Add
    OPTION_ERROR_POISON_SYSTEM_DIRECTORIES.
    (ld_options): Add --error-poison-system-directories.
    (parse_args): Handle new option.

2007-06-13  Joseph Myers  <joseph@codesourcery.com>

    ld/
    * config.in: Regenerate.
    * ld.h (args_type): Add poison_system_directories.
    * ld.texinfo (--no-poison-system-directories): Document.
    * ldfile.c (ldfile_add_library_path): Check
    command_line.poison_system_directories.
    * ldmain.c (main): Initialize
    command_line.poison_system_directories.
    * lexsup.c (enum option_values): Add
    OPTION_NO_POISON_SYSTEM_DIRECTORIES.
    (ld_options): Add --no-poison-system-directories.
    (parse_args): Handle new option.

2007-04-20  Joseph Myers  <joseph@codesourcery.com>

    Merge from Sourcery G++ binutils 2.17:

    2007-03-20  Joseph Myers  <joseph@codesourcery.com>
    Based on patch by Mark Hatle <mark.hatle@windriver.com>.
    ld/
    * configure.ac (--enable-poison-system-directories): New option.
    * configure, config.in: Regenerate.
    * ldfile.c (ldfile_add_library_path): If
    ENABLE_POISON_SYSTEM_DIRECTORIES defined, warn for use of /lib,
    /usr/lib, /usr/local/lib or /usr/X11R6/lib.

Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
Signed-off-by: Scott Garman <scott.a.garman@intel.com>
2019-04-08 15:50:14 +07:00
d085727d67 ct-ng bundled patch: 0007-sysroot.patch
Signed-off-by: Sven Rebhan <odinshorse@googlemail.com>

Always try to prepend the sysroot prefix to absolute filenames first.

http://bugs.gentoo.org/275666
http://sourceware.org/bugzilla/show_bug.cgi?id=10340
2019-04-08 15:50:09 +07:00
64d526ba68 Fix darwin build
1. In Drawin PTHREAD_ONCE_INIT is {0x30B1BCBA, {0}} and the GCC < 4.4
   doesn't support ended initializer list
2. wcsncasecmp doesn't exist in MacSDK10.6.x

Change-Id: I69204a72f853f5263dffedc448379d75ed4eca2e
2019-04-08 15:50:09 +07:00
601c7aa1c9 ct-ng bundled patch: 0005-Darwin-gold-binary-cc-include-string-not-cstring.patch 2019-04-08 15:50:09 +07:00
526897fc7c ct-ng bundled patch: 0004-Dont-link-to-libfl-as-its-unnecessary.patch 2019-04-08 15:48:49 +07:00
003a4e1dba ct-ng bundled patch: 0003-MinGW-w64-winpthreads-~ead_mutexattr_settype.patch 2019-04-08 15:45:18 +07:00
98e4fc45f2 ct-ng bundled patch: 0002-012_check_ldrunpath_length.patch 2019-04-08 15:45:18 +07:00
f6d094f8d2 ct-ng bundled patch: 0001-001_ld_makefile_patch.patch 2019-04-08 15:45:18 +07:00
82081edf5e ct-ng bundled patch: 0000-sh-conf.patch
r10231 | lethal | 2005-05-02 09:58:00 -0400 (Mon, 02 May 2005) | 13 lines

Likewise, binutils has no idea about any of these new targets either, so we
fix that up too.. now we're able to actually build a real toolchain for
sh2a_nofpu- and other more ineptly named toolchains (and yes, there are more
inept targets than that one, really. Go look, I promise).
2019-04-08 15:45:17 +07:00
0860693812 Regenerate files and add changelog entries for 2.31.1 release binutils-2_31_1 2018-07-18 08:54:05 +01:00
4afd6a72e3 Fix typo in src-release.sh script. Update French translation for gold and Spanish translation for ld.
gold	* po/fr.po: Updated French translation.
ld	* po/es.po: Updated Spanish translation.
.	* (DEVO_SUPPORT): Fix typo in previous delta.
	(do_proto_toplev): Add --quiet option to configure command line.
2018-07-18 08:35:24 +01:00
c3432d7f31 Automatic date update in version.in 2018-07-18 00:01:46 +00:00
f8b4d71490 Automatic date update in version.in 2018-07-17 00:02:04 +00:00
0694d6e5fb Import patch from mainline to fix gold's handling of already versioned symbols.
gold	PR gold/23409
	* symtab.cc (Symbol_table::define_special_symbol): Add check for
	version name on existing symbol.
	* testsuite/Makefile.am (ver_test_pr23409): New test case.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/ver_test_pr23409.sh: New test script.
	* testsuite/ver_test_pr23409_1.script: New version script.
	* testsuite/ver_test_pr23409_2.script: New version script.
2018-07-16 14:29:26 +01:00
0028e23c4a Add the new top level files test-driver and ar-lib to the src-release script.
* src-release.sh (DEVO_SUPPORT): Add test-driver and ar-lib.
2018-07-16 14:11:57 +01:00
ebde1daca8 Automatic date update in version.in 2018-07-16 00:01:59 +00:00
9c6b47988b Automatic date update in version.in 2018-07-15 00:02:24 +00:00
e6977d6f7f Reset branch back to development mode 2018-07-14 19:39:32 +01:00
af127c2169 2.31 Release point 2018-07-14 19:05:56 +01:00
0373ccfde3 Automatic date update in version.in 2018-07-14 00:01:33 +00:00
5244968870 Allow bit-patterns in the immediate field of ARM neon mov instructions.
* config/tc-arm.c (do_neon_mov): When converting an integer
	immediate into a floating point value, check that the conversion
	is valid.  Also warn if the immediate is valid as both a floating
	point value and a bit pattern.
	* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
	floating point bit patterns.
	* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
	of the new insns.
2018-07-13 11:44:49 +01:00
65cc93d2fb Automatic date update in version.in 2018-07-13 00:02:29 +00:00
ae0e76dcfc Hide dynamic symbols in discarded sections
This is a followup to git commit 97196564c7 "Strip global symbol
defined in discarded section".  If a symbol defined in a discarded
section was dynamic, that patch left .dynsym with holes (ie. all zero
entries).  For example, the following from libstdc++.so:

Symbol table '.dynsym' contains 6090 entries:
   Num:    Value          Size Type    Bind   Vis      Ndx Name
     0: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 00000000000a74e0     0 SECTION LOCAL  DEFAULT   10
     2: 0000000000264180     0 SECTION LOCAL  DEFAULT   17
     3: 0000000000000000     0 NOTYPE  WEAK   DEFAULT  UND _ITM_addUserCommitAction
     4: 0000000000000000     0 NOTYPE  WEAK   DEFAULT  UND _ITM_memcpyRtWn
     5: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
readelf: Warning: local symbol 5 found at index >= .dynsym's sh_info value of 3
     6: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
readelf: Warning: local symbol 6 found at index >= .dynsym's sh_info value of 3
[snip]

This patch removes the symbols from .dynsym too.

	PR 17550
	* elflink.c (_bfd_elf_fix_symbol_flags): Hide dynamic symbols
	in discarded sections.

(cherry picked from commit af0bfb9c4283ce80fe37ad6360d12cae8ec38696)
2018-07-13 01:16:25 +09:30
08196b220b This patch adds support for the SSBB and PSSBB speculation barrier instructions to the AArch64 assembler and disassembler.
For more details see: https://static.docs.arm.com/ddi0596/a/DDI_0596_ARM_a64_instruction_set_architecture.pdf

opcodes	* aarch64-tbl.h (aarch64_opcode_table): Add entry for
	ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas	* testsuite/gas/aarch64/system.s: Add test for ssbb
	and pssbb.
	* testsuite/gas/aarch64/system.d: Update accordingly
	and remove explicit addresses.
2018-07-12 15:50:35 +01:00
2d73c24636 Resolve merge conflicts. 2018-07-12 11:27:30 +01:00
ec468ac4ef Add support for the ARM speculation barrier instructions SSBB and PSSBB.
opcodes * arm-dis.c (arm_opcodes): Add ssbb and pssbb and move
     csdb together with them.
     (thumb32_opcodes): Likewise.

gas  * config/tc-arm.c (insns): Add new ssbb and pssbb instructions.
     * testsuite/gas/arm/csdb.s: Add new tests for ssbb and pssbb.
     * testsuite/gas/arm/csdb.d: Likewise
     * testsuite/gas/arm/thumb2_it_bad.s: Likewise.
     * testsuite/gas/arm/thumb2_it_bad.l: Likewise.
     * testsuite/gas/arm/barrier.d: Update with ssbb.
     * testsuite/gas/arm/barrier-thumb.d: Likewise.
2018-07-12 11:25:12 +01:00
3b5e60a4e0 Add remainder of Em16 restrictions for AArch64 gas.
This adds the missing Em16 constraints the rest of the instructions requiring them
and also adds a testcase to test all the instructions so these are checked from
now on.

The Em16 operand constrains the valid registers to the lower 16 registers when used
with a half precision qualifier.

The list has been cross checked (by hand) through the Arm ARM version Ca.

opcodes/

	PR binutils/23192
	* aarch64-tbl.h (sqdmlal, sqdmlal2, smlsl, smlsl2, sqdmlsl, sqdmlsl2,
	mul, smull, smull2, sqdmull, sqdmull2, sqdmulh, sqrdmulh, mla, umlal,
	umlal2, mls, umlsl, umlsl2, umull, umull2, sqdmlal, sqdmlsl, sqdmull,
	sqdmulh, sqrdmulh): Use Em16.

gas/

	PR binutils/23192
	* testsuite/gas/aarch64/illegal-by-element.s: New.
	* testsuite/gas/aarch64/illegal-by-element.d: New.
	* testsuite/gas/aarch64/illegal-by-element.l: New.

(cherry picked from commit 45a28947f3fe5693560e9a1d6373807a9e82c04a)
Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2018-07-12 10:51:24 +01:00
e87681ac38 Automatic date update in version.in 2018-07-12 00:01:43 +00:00
82f3215583 xtensa: don't emit dynamic relocation for weak undefined symbol
Resolved reference to a weak undefined symbol in PIE must not have
a dynamic relative relocation against itself, otherwise the value of a
reference will be changed from 0 to the base of executable, breaking
code like the following:

  void weak_function (void);
  if (weak_function)
    weak_function ();

This fixes tests for PR ld/22269 and a number of PIE tests in xtensa gcc
testsuite.

bfd/
2018-07-11  Max Filippov  <jcmvbkbc@gmail.com>

	* elf32-xtensa.c (elf_xtensa_allocate_dynrelocs): Don't allocate
	space for dynamic relocation for undefined weak symbol.
	(elf_xtensa_relocate_section): Don't emit R_XTENSA_RELATIVE
	relocation for undefined weak symbols.
	(shrink_dynamic_reloc_sections): Don't shrink dynamic relocation
	section for relocations against undefined weak symbols.

(cherry picked from commit c451bb34ae8bd2d0669bd563366883cfbcf0de9b)
2018-07-11 09:41:15 -07:00
8e188148c4 Duplicate code update. 2018-07-11 16:46:47 +01:00
ea22a560ea Reimport a patch to fix building gold on Cygwin64 systms: m.arena has size_t on Cygwin64 and thus errors out due to -Werror=format.
gold	* main.cc: Print m.arena as long long.
2018-07-11 16:44:22 +01:00
8238fb6230 Fix printing the size of GOLD's memory areana on Cygwin based systems.
I just stumbled over this with 2.29.1 while building a cross-toolchain, on Cygwin64, but it's still the same for 2.30. m.arena has size_t on Cygwin64 and thus errors out due to -Werror=format.

gold
	* main.cc: Print m.arena as long long.
2018-07-11 08:36:49 -07:00
557b8e0ea4 Automatic date update in version.in 2018-07-11 00:02:00 +00:00
df402ddcce BFD/ELF: Correct a `remove' global shadowing error for pre-4.8 GCC
Remove `-Wshadow' compilation errors:

cc1: warnings being treated as errors
.../bfd/elflink.c: In function 'bfd_elf_final_link':
.../bfd/elflink.c:11722: error: declaration of 'remove' shadows a global declaration
/usr/include/stdio.h:154: error: shadowed declaration is here

which for versions of GCC before 4.8 prevent support for ELF targets
from being built.  See also GCC PR c/53066.

	bfd/
	* elflink.c (bfd_elf_final_link): Rename `remove' local variable
	to `remove_section'.

(cherry picked from commit 5270eddc6ed6b5d8e4e2817491bb44b784fa6f81)
2018-07-11 00:45:55 +01:00
21555352f0 Fix test for availability of emplace_back.
Testing for the GCC version 5 or later isn't right, since C++ 11 support
wasn't enabled by default until later.  This patch tests the C++ standard
support directly instead of inferring it from the GCC version.

gold/
	* incremental.cc (Sized_incremental_binary::setup_readers): Use
	emplace_back for C++ 11 or later.
2018-07-10 08:29:19 -07:00
10a1ed124e Automatic date update in version.in 2018-07-10 00:02:08 +00:00
fa1b3193c5 bfd: Use changequote for "i[3-7]86-*-linux-*"
Use changequote to match "i[3-7]86-*-linux-*", instead of
"i3-786-*-linux-*".

	PR ld/23388
	* configure.ac: Use changequote for "i[3-7]86-*-linux-*".
	* configure: Regenerated.

(cherry picked from commit 872899f1efeda1e93ed569d322c6b2ee85ce885c)
2018-07-09 09:19:11 -07:00
f6becb01a7 x86: Remove x86 ISA properties with empty bits
There is no need to generate x86 ISA properties with empty bits in
linker output.

bfd/

	PR ld/23372
	* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Remove x86
	ISA properties with empty bits.

ld/

	PR ld/23372
	* testsuite/ld-i386/i386.exp: Run pr23372a and pr23372b.
	* testsuite/ld-i386/pr23372a.d: New file.
	* testsuite/ld-i386/pr23372a.s: Likewise.
	* testsuite/ld-i386/pr23372b.d: Likewise.
	* testsuite/ld-i386/pr23372b.s: Likewise.
	* testsuite/ld-i386/pr23372c.s: Likewise.
	* testsuite/ld-x86-64/pr23372a-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23372a.d: Likewise.
	* testsuite/ld-x86-64/pr23372a.s: Likewise.
	* testsuite/ld-x86-64/pr23372b-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23372b.d: Likewise.
	* testsuite/ld-x86-64/pr23372b.s: Likewise.
	* testsuite/ld-x86-64/pr23372c.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run pr23372a, pr23372a-x32,
	pr23372b and pr23372b-x32.

(cherry picked from commit 56ad703d56ffe5dc55d5e719a6ec41fd6cf9bfbe)
2018-07-09 05:50:13 -07:00
e55992d4ac Fix diagnostic errors
Fixes a number of build errors like the following
.../elf32-arm.c: In function 'elf32_arm_nabi_write_core_note':
.../elf32-arm.c:2177: error: #pragma GCC diagnostic not allowed inside functions
.../elf32-arm.c:2186: error: #pragma GCC diagnostic not allowed inside functions
See the comment in diagnostics.h.

include/
	* diagnostics.h: Comment on macro usage.
bfd/
	* elf32-arm.c (elf32_arm_nabi_write_core_note): Don't use
	DIAGNOTIC_PUSH and DIAGNOSTIC_POP unconditionally.
	* elf32-ppc.c (ppc_elf_write_core_note): Likewise.
	* elf32-s390.c (elf_s390_write_core_note): Likewise.
	* elf64-ppc.c (ppc64_elf_write_core_note): Likewise.
	* elf64-s390.c (elf_s390_write_core_note): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_write_core_note): Likewise.

(cherry picked from commit fe75810f8e0cc33384f22d0479506711d4014c60)
2018-07-09 17:57:57 +09:30
1cbba2d240 [GOLD] PowerPC .gnu.attributes support
elfcpp/
	* powerpc.h (Tag_GNU_Power_ABI_FP): Define.
	(Tag_GNU_Power_ABI_Vector, Tag_GNU_Power_ABI_Struct_Return): Define.
gold/
	* powerpc.cc: Include attributes.h.
	(Powerpc_relobj::attributes_section_data_): New variable, with
	accessor and associated constructor and destructor support.
	(Powerpc_dynobj::attributes_section_data_): Likewise.
	(Powerpc_relobj::do_read_symbols): Stash SHT_GNU_ATTRIBUTES section
	contents in attributes_section_data_.
	(Powerpc_dynobj::do_read_symbols): Likewise.
	(Target_powerpc): Add attributes_section_data_, last_fp_, last_ld_,
	last_vec_, and last_struct_ vars.
	(Target_powerpc::merge_object_attributes): New function.
	(Target_powerpc::do_finalize_sections): Iterate over input objects
	merging attributes.  Create output attributes section.

(cherry picked from commit 724436fccb68156ff53b7b03cb7f41547a65c30c)
2018-07-09 17:57:56 +09:30
9822d3329d Automatic date update in version.in 2018-07-09 00:02:17 +00:00
f42e6ba238 Automatic date update in version.in 2018-07-08 00:02:57 +00:00
4d60d5d092 Automatic date update in version.in 2018-07-07 00:01:59 +00:00
5592693077 RISC-V: Add riscv-*-* configure support, and minor cleanup.
bfd/
	* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
	(riscv64*-*-*): Likewise.
	(riscv-*-*): Add as an alias for riscv32*-*-*.

	ld/
	* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.

(cherry picked from commit bb11866d6a635fadb9285d18e2fb819d2de2c28c)
2018-07-06 13:47:50 -07:00
e04c0868e4 Fix SBO bit in disassembly mask for ldrah on AArch64.
The disassembly mask for ldarh incorrectly didn't mask out bit 20 which
is part of the SBO part of the instruction and shouldn't be considered input.

This fixes the wrong bit fixing the disassembly of instructions to
ldarh and makes the behavior consistent.

opcodes/

	PR binutils/23242
	* aarch64-tbl.h (ldarh): Fix disassembly mask.

(cherry picked from commit f311ba7ed84d66ae2cd77bd969747d7ab959d866)
Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2018-07-06 16:29:42 +01:00
96e5990474 Fix the read/write flag for these registers on AArch64
The previous constraints were based on information already in opcodes and it
seems that a few of them were wrong.  I have now hand verified the ones changed
by the previous patch and corrected where needed.

This prevents a warning to be issued when one shouldn't be.

opcodes/

	PR binutils/23369
	* aarch64-opc.c (aarch64_sys_regs): Make read/write csselr_el1,
	vsesr_el2, osdtrrx_el1, osdtrtx_el1, pmsidr_el1.

gas/testsuite/

	PR binutils/23369
	* gas/aarch64/msr.d (csselr_el1,
	vsesr_el2, osdtrrx_el1, osdtrtx_el1, pmsidr_el1): New.
	* gas/aarch64/msr.s: Likewise.

(cherry picked from commit cba05feb51cb97f75f9a7814b081ce45245ac7b2)
Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2018-07-06 16:28:49 +01:00