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[ARC] Fix/improve small data support.

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The R_ARC_SDA32 is wrongly described as a ME relocation, fix it.  Offset the
__SDATA_BEGIN__ to take advantage of the signed 9-bit field of the
load/store instructions.

include/
2016-07-08  Claudiu Zissulescu  <claziss@synopsys.com>

	* elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.

ld/
2016-07-08  Claudiu Zissulescu  <claziss@synopsys.com>

	* emulparams/arcelf.sh (SDATA_START_SYMBOLS): Add offset.
	* testsuite/ld-arc/sda-relocs.dd: New file.
	* testsuite/ld-arc/sda-relocs.ld: Likewise.
	* testsuite/ld-arc/sda-relocs.rd: Likewise.
	* testsuite/ld-arc/sda-relocs.s: Likewise.
	* testsuite/ld-arc/arc.exp: Add SDA tests.
This commit is contained in:
Claudiu Zissulescu
2016-07-08 11:55:49 +02:00
parent efc67f64c9
commit fa1c017017
9 changed files with 113 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
include/ChangeLog
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@ -1,3 +1,7 @@
2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
* elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...

2
include/elf/arc-reloc.def
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@ -139,7 +139,7 @@ ARC_RELOC_HOWTO(ARC_SDA32, 18, \
32, \
replace_word32, \
signed, \
( ME ( ( ( S + A ) - _SDA_BASE_ ) ) ))
( ( ( S + A ) - _SDA_BASE_ ) ))
ARC_RELOC_HOWTO(ARC_SDA_LDST, 19, \
2, \

9
ld/ChangeLog
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@ -1,3 +1,12 @@
2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
* emulparams/arcelf.sh (SDATA_START_SYMBOLS): Add offset.
* testsuite/ld-arc/sda-relocs.dd: New file.
* testsuite/ld-arc/sda-relocs.ld: Likewise.
* testsuite/ld-arc/sda-relocs.rd: Likewise.
* testsuite/ld-arc/sda-relocs.s: Likewise.
* testsuite/ld-arc/arc.exp: Add SDA tests.
2016-07-11 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/ld-arc/nps-1b.err: Update test to handle more

2
ld/emulparams/arcelf.sh
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@ -15,7 +15,7 @@ MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
ARCH=arc
MACHINE=
ENTRY=__start
SDATA_START_SYMBOLS='__SDATA_BEGIN__ = .;'
SDATA_START_SYMBOLS='__SDATA_BEGIN__ = . + 0x100;'
OTHER_SECTIONS="/DISCARD/ : { *(.__arc_profile_*) }"
EMBEDDED=yes

8
ld/testsuite/ld-arc/arc.exp
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@ -28,3 +28,11 @@ foreach arc_test $arc_test_list {
run_dump_test [file rootname $arc_test]
}
set arccommon_tests {
{ "SDA relocs"
"-q -T sda-relocs.ld" "" "-mcpu=archs" {sda-relocs.s}
{{objdump -fdw sda-relocs.dd} {readelf --relocs sda-relocs.rd}}
"sda-relocs.so" }
}
run_ld_link_tests $arccommon_tests

23
ld/testsuite/ld-arc/sda-relocs.dd Normal file
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@ -0,0 +1,23 @@
.*: file format .*
architecture: ARCv2, flags 0x00000113:
HAS_RELOC, EXEC_P, HAS_SYMS, D_PAGED
start address 0x00010000
Disassembly of section .text:
[0-9a-f]+ <__SDATA_BEGIN__>:
[0-9a-f]+: c8[0-9a-f]+ ld_s r0,\[gp,[0-9]+\]
[0-9a-f]+: cc[0-9a-f]+ ld(h|w)_s r0,\[gp,[0-9]+\]
[0-9a-f]+: ca[0-9a-f]+ ldb_s r0,\[gp,[0-9]+\]
[0-9a-f]+: 12[0-9a-f]+ 3600 ld.as r0,\[gp,[0-9]+\]
[0-9a-f]+: 1a[0-9a-f]+ 3018 st.as r0,\[gp,[0-9]+\]
[0-9a-f]+: 12[0-9a-f]+ 3000 ld r0,\[gp,[0-9]+\]
[0-9a-f]+: 12[0-9a-f]+ 3080 ldb r0,\[gp,[0-9]+\]
[0-9a-f]+: 12[0-9a-f]+ 3100 ld(h|w) r0,\[gp,[0-9]+\]
[0-9a-f]+: 1a[0-9a-f]+ 301c sth.as r0,\[gp,[0-9]+\]
[0-9a-f]+: 50[0-9a-f]+ ld_s r1,\[gp,[0-9]+\]
[0-9a-f]+: 50[0-9a-f]+ st_s r0,\[gp,[0-9]+\]
[0-9a-f]+: 2200 3f82 0000 002c add r2,gp,0x[0-9a-f]+
[0-9a-f]+: 78e0 nop_s

20
ld/testsuite/ld-arc/sda-relocs.ld Normal file
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@ -0,0 +1,20 @@
/* Default linker script, for normal executables */
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc",
"elf32-littlearc")
OUTPUT_ARCH(arc)
ENTRY(__start)
SECTIONS
{
/* Read-only sections, merged into text segment: */
PROVIDE (__start = 0x10000);
. = 0x10000 + SIZEOF_HEADERS;
.text : {__SDATA_BEGIN__ = .; *(.text .stub .text.*)} =0
.sdata : {*(.sdata .sdata.*)}
.sbss : {*(.sbss .sbss.*)}
/DISCARD/ : { *(.__arc_profile_*) }
/DISCARD/ : { *(.note.GNU-stack) }
}

15
ld/testsuite/ld-arc/sda-relocs.rd Normal file
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@ -0,0 +1,15 @@
Relocation section '\.rela\.text' .*:
Offset +Info +Type +Sym.Value +Sym. Name \+ Addend
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA16_LD2 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA16_LD1 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA16_LD [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA_LDST2 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA_LDST2 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA_LDST [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA_LDST [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA_LDST [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA_LDST1 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA16_ST2 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA16_ST2 [0-9a-f]+ a \+ 0
[0-9a-f]+ [0-9a-f]+ R_ARC_SDA32_ME [0-9a-f]+ a \+ 0

32
ld/testsuite/ld-arc/sda-relocs.s Normal file
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@ -0,0 +1,32 @@
.section .text
.align 4
;;; all the ops should have the same offset.
ld_s r0,[gp,@a@sda]
;; BFD_RELOC_ARC_SDA16_LD2
ldh_s r0,[gp,@a@sda]
;; BFD_RELOC_ARC_SDA16_LD1
ldb_s r0,[gp,@a@sda]
;; BFD_RELOC_ARC_SDA16_LD
ld.as r0,[gp,@a@sda]
st.as r0,[gp,@a@sda]
;; BFD_RELOC_ARC_SDA_LDST2
ld r0,[gp,@a@sda]
ldb r0,[gp,@a@sda]
ldh r0,[gp,@a@sda]
;; ldd r0,[gp,@a@sda]
;; BFD_RELOC_ARC_SDA_LDST
sth.as r0,[gp,@a@sda]
;; BFD_RELOC_ARC_SDA_LDST1
ld_s r1,[gp,@a@sda]
st_s r0,[gp,@a@sda]
;; BFD_ARC_SDA16_ST2
add r2, gp, @a@sda
;; BFD_ARC_SDA32_ME
.global a
.section .sbss,"aw",@nobits
.align 4
.type a, @object
.size a, 4
a:
.zero 4