x86/Intel: support "mmword ptr"

This is an alias of "qword ptr", commonly used with MMX insns.

At this occasion also test (alongside the newly supported "mmword")
- "zmmword" used as expression,
- PADDB with "oword ptr" (aliasing "xmmword ptr").
This commit is contained in:
Jan Beulich
2019-12-09 13:31:39 +01:00
parent 164d49cb1c
commit f2f5811f76
7 changed files with 23 additions and 5 deletions

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@ -1,3 +1,13 @@
2019-12-09 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (O_mmword_ptr): Define.
(i386_types): Add mmword entry.
(i386_intel_simplify, i386_intel_operand): Add comment.
* testsuite/gas/i386/intel-expr.s: Also test mmword and zmmword.
* testsuite/gas/i386/intelok.s: Also test "mmword ptr".
* testsuite/gas/i386/intel-expr.d, testsuite/gas/i386/intelok.d,
testsuite/gas/i386/intelok.e: Adjust expectations.
2019-12-09 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_operand): Set "byte"

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@ -52,6 +52,8 @@ intel_state;
#define O_dword_ptr O_md26
/* qword ptr X_add_symbol */
#define O_qword_ptr O_md25
/* mmword ptr X_add_symbol */
#define O_mmword_ptr O_qword_ptr
/* oword ptr X_add_symbol */
#define O_oword_ptr O_md24
/* fword ptr X_add_symbol */
@ -105,6 +107,7 @@ const i386_types[] =
I386_TYPE(dword, 4),
I386_TYPE(fword, 6),
I386_TYPE(qword, 8),
I386_TYPE(mmword, 8),
I386_TYPE(tbyte, 10),
I386_TYPE(oword, 16),
I386_TYPE(xmmword, 16),
@ -383,7 +386,7 @@ static int i386_intel_simplify (expressionS *e)
case O_word_ptr:
case O_dword_ptr:
case O_fword_ptr:
case O_qword_ptr:
case O_qword_ptr: /* O_mmword_ptr */
case O_tbyte_ptr:
case O_oword_ptr:
case O_xmmword_ptr:
@ -678,7 +681,7 @@ i386_intel_operand (char *operand_string, int got_a_float)
}
break;
case O_qword_ptr:
case O_qword_ptr: /* O_mmword_ptr */
i.types[this_operand].bitfield.qword = 1;
if (current_templates->start->base_opcode == 0x62 /* bound */
|| got_a_float == 1) /* "f..." */

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@ -9,5 +9,5 @@ Contents of section .data:
0020 03000000 40020000 00000000 08000000 .*
0030 05000000 0f000000 ffffffff 00000000 .*
0040 ffffffff 00000000 ffffffff 00000000 .*
0050 01020406 080a1010 20cccccc cccccccc .*
0050 01020406 08080a10 102040cc cccccccc .*
0060 02ff05ff 04ff06ff 08ff06ff cccccccc .*

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@ -24,7 +24,8 @@
.p2align 4, 0xcc
.byte byte, word, dword, fword, qword, tbyte, oword, xmmword, ymmword
.byte byte, word, dword, fword, qword, mmword, tbyte
.byte oword, xmmword, ymmword, zmmword
.p2align 4, 0xcc

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@ -88,6 +88,8 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: 0f bf 00[ ]+movsx[ ]+eax,WORD PTR \[eax\]
[ ]*[0-9a-f]+: 0f fc 00[ ]+paddb[ ]+mm0,(QWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 0f fc 00[ ]+paddb[ ]+mm0,(QWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 0f fc 00[ ]+paddb[ ]+mm0,(QWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 66 0f fc 00[ ]+paddb[ ]+xmm0,(XMMWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 66 0f fc 00[ ]+paddb[ ]+xmm0,(XMMWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 66 0f fc 00[ ]+paddb[ ]+xmm0,(XMMWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 0f c4 00 03[ ]+pinsrw[ ]+mm0,(WORD PTR )?\[eax\],0x3

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@ -1,2 +1,2 @@
.*: Assembler messages:
.*:153: Warning: redundant segment overrides
.*:155: Warning: redundant segment overrides

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@ -83,9 +83,11 @@ start:
movsx eax, byte ptr [eax]
movsx eax, word ptr [eax]
paddb mm0, [eax]
paddb mm0, mmword ptr [eax]
paddb mm0, qword ptr [eax]
paddb xmm0, [eax]
paddb xmm0, xmmword ptr [eax]
paddb xmm0, oword ptr [eax]
pinsrw mm0, word ptr [eax], 3
pinsrw xmm0, word ptr [eax], 7
push dword ptr [eax]