mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-30 00:52:16 +08:00
gdb: Support stepping out from signal handler on riscv*-linux
Currently, gdb cannot step outside of a signal handler on RISC-V platforms. This causes multiple failures in gdb.base/sigstep.exp: FAIL: gdb.base/sigstep.exp: continue to handler, nothing in handler, step from handler: leave handler (timeout) FAIL: gdb.base/sigstep.exp: continue to handler, si+advance in handler, step from handler: leave handler (timeout) FAIL: gdb.base/sigstep.exp: continue to handler, nothing in handler, next from handler: leave handler (timeout) FAIL: gdb.base/sigstep.exp: continue to handler, si+advance in handler, next from handler: leave handler (timeout) FAIL: gdb.base/sigstep.exp: stepi from handleri: leave signal trampoline FAIL: gdb.base/sigstep.exp: nexti from handleri: leave signal trampoline === gdb Summary === # of expected passes 587 # of unexpected failures 6 This patch adds support for stepping outside of a signal handler on riscv*-*-linux*. Implementation is heavily inspired from mips_linux_syscall_next_pc and surroundings as advised by Pedro Alves. After this patch, all tests in gdb.base/sigstep.exp pass. Build and tested on riscv64-linux-gnu.
This commit is contained in:
@ -27,6 +27,11 @@
|
||||
#include "trad-frame.h"
|
||||
#include "gdbarch.h"
|
||||
|
||||
/* The following value is derived from __NR_rt_sigreturn in
|
||||
<include/uapi/asm-generic/unistd.h> from the Linux source tree. */
|
||||
|
||||
#define RISCV_NR_rt_sigreturn 139
|
||||
|
||||
/* Define the general register mapping. The kernel puts the PC at offset 0,
|
||||
gdb puts it at offset 32. Register x0 is always 0 and can be ignored.
|
||||
Registers x1 to x31 are in the same place. */
|
||||
@ -154,11 +159,28 @@ riscv_linux_sigframe_init (const struct tramp_frame *self,
|
||||
trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
|
||||
}
|
||||
|
||||
/* When FRAME is at a syscall instruction (ECALL), return the PC of the next
|
||||
instruction to be executed. */
|
||||
|
||||
static CORE_ADDR
|
||||
riscv_linux_syscall_next_pc (struct frame_info *frame)
|
||||
{
|
||||
const CORE_ADDR pc = get_frame_pc (frame);
|
||||
const ULONGEST a7 = get_frame_register_unsigned (frame, RISCV_A7_REGNUM);
|
||||
|
||||
if (a7 == RISCV_NR_rt_sigreturn)
|
||||
return frame_unwind_caller_pc (frame);
|
||||
|
||||
return pc + 4 /* Length of the ECALL insn. */;
|
||||
}
|
||||
|
||||
/* Initialize RISC-V Linux ABI info. */
|
||||
|
||||
static void
|
||||
riscv_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
||||
{
|
||||
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||||
|
||||
linux_init_abi (info, gdbarch, 0);
|
||||
|
||||
set_gdbarch_software_single_step (gdbarch, riscv_software_single_step);
|
||||
@ -182,6 +204,8 @@ riscv_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
||||
(gdbarch, riscv_linux_iterate_over_regset_sections);
|
||||
|
||||
tramp_frame_prepend_unwinder (gdbarch, &riscv_linux_sigframe);
|
||||
|
||||
tdep->syscall_next_pc = riscv_linux_syscall_next_pc;
|
||||
}
|
||||
|
||||
/* Initialize RISC-V Linux target support. */
|
||||
|
@ -1421,6 +1421,8 @@ public:
|
||||
/* These are needed for stepping over atomic sequences. */
|
||||
LR,
|
||||
SC,
|
||||
/* This instruction is used to do a syscall. */
|
||||
ECALL,
|
||||
|
||||
/* Other instructions are not interesting during the prologue scan, and
|
||||
are ignored. */
|
||||
@ -1711,6 +1713,8 @@ riscv_insn::decode (struct gdbarch *gdbarch, CORE_ADDR pc)
|
||||
decode_r_type_insn (SC, ival);
|
||||
else if (is_sc_d_insn (ival))
|
||||
decode_r_type_insn (SC, ival);
|
||||
else if (is_ecall_insn (ival))
|
||||
decode_i_type_insn (ECALL, ival);
|
||||
else
|
||||
/* None of the other fields are valid in this case. */
|
||||
m_opcode = OTHER;
|
||||
@ -3764,6 +3768,7 @@ static CORE_ADDR
|
||||
riscv_next_pc (struct regcache *regcache, CORE_ADDR pc)
|
||||
{
|
||||
struct gdbarch *gdbarch = regcache->arch ();
|
||||
const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
||||
struct riscv_insn insn;
|
||||
CORE_ADDR next_pc;
|
||||
|
||||
@ -3826,6 +3831,11 @@ riscv_next_pc (struct regcache *regcache, CORE_ADDR pc)
|
||||
if (src1 >= src2)
|
||||
next_pc = pc + insn.imm_signed ();
|
||||
}
|
||||
else if (insn.opcode () == riscv_insn::ECALL)
|
||||
{
|
||||
if (tdep->syscall_next_pc != nullptr)
|
||||
next_pc = tdep->syscall_next_pc (get_current_frame ());
|
||||
}
|
||||
|
||||
return next_pc;
|
||||
}
|
||||
|
@ -34,6 +34,7 @@ enum
|
||||
RISCV_FP_REGNUM = 8, /* Frame Pointer. */
|
||||
RISCV_A0_REGNUM = 10, /* First argument. */
|
||||
RISCV_A1_REGNUM = 11, /* Second argument. */
|
||||
RISCV_A7_REGNUM = 17, /* Seventh argument. */
|
||||
RISCV_PC_REGNUM = 32, /* Program Counter. */
|
||||
|
||||
RISCV_NUM_INTEGER_REGS = 32,
|
||||
@ -102,6 +103,9 @@ struct gdbarch_tdep
|
||||
int duplicate_frm_regnum = -1;
|
||||
int duplicate_fcsr_regnum = -1;
|
||||
|
||||
/* Return the expected next PC assuming FRAME is stopped at a syscall
|
||||
instruction. */
|
||||
CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
|
||||
};
|
||||
|
||||
|
||||
|
Reference in New Issue
Block a user