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[AArch64] Handle W registers as pseudo-registers instead of aliases of X registers
The aarch64 port handles W registers as aliases of X registers. This is incorrect because X registers are 64-bit and W registers are 32-bit. This patch teaches GDB how to handle W registers as pseudo-registers of 32-bit, the bottom half of the X registers. Testcase included.
This commit is contained in:
Luis Machado
@ -72,40 +72,6 @@ static const struct
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{"fp", AARCH64_FP_REGNUM},
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{"lr", AARCH64_LR_REGNUM},
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{"sp", AARCH64_SP_REGNUM},
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/* 32-bit register names. */
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{"w0", AARCH64_X0_REGNUM + 0},
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{"w1", AARCH64_X0_REGNUM + 1},
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{"w2", AARCH64_X0_REGNUM + 2},
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{"w3", AARCH64_X0_REGNUM + 3},
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{"w4", AARCH64_X0_REGNUM + 4},
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{"w5", AARCH64_X0_REGNUM + 5},
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{"w6", AARCH64_X0_REGNUM + 6},
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{"w7", AARCH64_X0_REGNUM + 7},
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{"w8", AARCH64_X0_REGNUM + 8},
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{"w9", AARCH64_X0_REGNUM + 9},
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{"w10", AARCH64_X0_REGNUM + 10},
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{"w11", AARCH64_X0_REGNUM + 11},
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{"w12", AARCH64_X0_REGNUM + 12},
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{"w13", AARCH64_X0_REGNUM + 13},
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{"w14", AARCH64_X0_REGNUM + 14},
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{"w15", AARCH64_X0_REGNUM + 15},
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{"w16", AARCH64_X0_REGNUM + 16},
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{"w17", AARCH64_X0_REGNUM + 17},
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{"w18", AARCH64_X0_REGNUM + 18},
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{"w19", AARCH64_X0_REGNUM + 19},
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{"w20", AARCH64_X0_REGNUM + 20},
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{"w21", AARCH64_X0_REGNUM + 21},
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{"w22", AARCH64_X0_REGNUM + 22},
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{"w23", AARCH64_X0_REGNUM + 23},
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{"w24", AARCH64_X0_REGNUM + 24},
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{"w25", AARCH64_X0_REGNUM + 25},
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{"w26", AARCH64_X0_REGNUM + 26},
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{"w27", AARCH64_X0_REGNUM + 27},
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{"w28", AARCH64_X0_REGNUM + 28},
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{"w29", AARCH64_X0_REGNUM + 29},
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{"w30", AARCH64_X0_REGNUM + 30},
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/* specials */
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{"ip0", AARCH64_X0_REGNUM + 16},
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{"ip1", AARCH64_X0_REGNUM + 17}
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@ -2556,6 +2522,21 @@ aarch64_gen_return_address (struct gdbarch *gdbarch,
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}
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/* Return TRUE if REGNUM is a W pseudo-register number. Return FALSE
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otherwise. */
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static bool
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is_w_pseudo_register (struct gdbarch *gdbarch, int regnum)
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{
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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if (tdep->w_pseudo_base <= regnum
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&& regnum < tdep->w_pseudo_base + tdep->w_pseudo_count)
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return true;
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return false;
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}
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/* Return the pseudo register name corresponding to register regnum. */
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static const char *
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@ -2563,6 +2544,19 @@ aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
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{
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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/* W pseudo-registers. Bottom halves of the X registers. */
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static const char *const w_name[] =
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{
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"w0", "w1", "w2", "w3",
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"w4", "w5", "w6", "w7",
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"w8", "w9", "w10", "w11",
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"w12", "w13", "w14", "w15",
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"w16", "w17", "w18", "w19",
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"w20", "w21", "w22", "w23",
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"w24", "w25", "w26", "w27",
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"w28", "w29", "w30",
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};
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static const char *const q_name[] =
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{
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"q0", "q1", "q2", "q3",
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@ -2640,6 +2634,10 @@ aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
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if (p_regnum >= AARCH64_B0_REGNUM && p_regnum < AARCH64_B0_REGNUM + 32)
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return b_name[p_regnum - AARCH64_B0_REGNUM];
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/* W pseudo-registers? */
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if (is_w_pseudo_register (gdbarch, regnum))
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return w_name[regnum - tdep->w_pseudo_base];
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if (tdep->has_sve ())
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{
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static const char *const sve_v_name[] =
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@ -2698,6 +2696,10 @@ aarch64_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
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&& p_regnum < AARCH64_SVE_V0_REGNUM + AARCH64_V_REGS_NUM)
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return aarch64_vnv_type (gdbarch);
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/* W pseudo-registers are 32-bit. */
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if (is_w_pseudo_register (gdbarch, regnum))
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return builtin_type (gdbarch)->builtin_uint32;
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if (tdep->has_pauth () && regnum == tdep->ra_sign_state_regnum)
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return builtin_type (gdbarch)->builtin_uint64;
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@ -2772,6 +2774,28 @@ aarch64_pseudo_read_value (struct gdbarch *gdbarch, readable_regcache *regcache,
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VALUE_LVAL (result_value) = lval_register;
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VALUE_REGNUM (result_value) = regnum;
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if (is_w_pseudo_register (gdbarch, regnum))
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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/* Default offset for little endian. */
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int offset = 0;
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if (byte_order == BFD_ENDIAN_BIG)
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offset = 4;
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/* Find the correct X register to extract the data from. */
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int x_regnum = AARCH64_X0_REGNUM + (regnum - tdep->w_pseudo_base);
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gdb_byte data[4];
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/* Read the bottom 4 bytes of X. */
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if (regcache->raw_read_part (x_regnum, offset, 4, data) != REG_VALID)
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mark_value_bytes_unavailable (result_value, 0, 4);
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else
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memcpy (value_contents_raw (result_value).data (), data, 4);
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return result_value;
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}
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regnum -= gdbarch_num_regs (gdbarch);
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if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
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@ -2837,6 +2861,27 @@ aarch64_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache,
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int regnum, const gdb_byte *buf)
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{
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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if (is_w_pseudo_register (gdbarch, regnum))
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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/* Default offset for little endian. */
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int offset = 0;
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if (byte_order == BFD_ENDIAN_BIG)
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offset = 4;
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/* Find the correct X register to extract the data from. */
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int x_regnum = AARCH64_X0_REGNUM + (regnum - tdep->w_pseudo_base);
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/* First zero-out the contents of X. */
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ULONGEST zero = 0;
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regcache->raw_write (x_regnum, zero);
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/* Write to the bottom 4 bytes of X. */
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regcache->raw_write_part (x_regnum, offset, 4, buf);
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return;
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}
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regnum -= gdbarch_num_regs (gdbarch);
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if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
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@ -3582,6 +3627,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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num_regs += i;
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}
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/* W pseudo-registers */
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int first_w_regnum = num_pseudo_regs;
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num_pseudo_regs += 31;
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if (!valid_p)
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return nullptr;
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@ -3705,6 +3753,10 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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/* With the number of real registers updated, setup the pseudo-registers and
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record their numbers. */
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/* Setup W pseudo-register numbers. */
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tdep->w_pseudo_base = first_w_regnum + num_regs;
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tdep->w_pseudo_count = 31;
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/* Pointer authentication pseudo-registers. */
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if (tdep->has_pauth ())
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tdep->ra_sign_state_regnum = ra_sign_state_offset + num_regs;
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@ -118,6 +118,10 @@ struct aarch64_gdbarch_tdep : gdbarch_tdep_base
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{
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return tls_regnum != -1;
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}
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/* The W pseudo-registers. */
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int w_pseudo_base = 0;
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int w_pseudo_count = 0;
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};
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const target_desc *aarch64_read_description (const aarch64_features &features);
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22
gdb/testsuite/gdb.arch/aarch64-w-registers.c
Normal file
22
gdb/testsuite/gdb.arch/aarch64-w-registers.c
Normal file
@ -0,0 +1,22 @@
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/* This test program is part of GDB, the GNU debugger.
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Copyright 2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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int
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main ()
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{
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return 0;
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}
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100
gdb/testsuite/gdb.arch/aarch64-w-registers.exp
Normal file
100
gdb/testsuite/gdb.arch/aarch64-w-registers.exp
Normal file
@ -0,0 +1,100 @@
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# Copyright (C) 2022 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# Check if the W registers have the expected size and if setting/fetching
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# values from W registers works correctly for both big and little endian.
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if {![is_aarch64_target]} {
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verbose "Skipping ${gdb_test_file_name}."
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return
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}
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standard_testfile
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if { [prepare_for_testing "failed to prepare" $testfile $srcfile {nodebug}]} {
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return -1
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}
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if ![runto_main] {
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untested "could not run to main"
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return -1
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}
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array set w_values {
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0 0x0
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1 0x10
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2 0x2010
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3 0x302010
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4 0x40302010
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5 0x40302010
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6 0x40302010
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7 0x40302010
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8 0x40302010
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}
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array set x_values {
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0 0x0
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1 0x10
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2 0x2010
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3 0x302010
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4 0x40302010
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5 0x5040302010
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6 0x605040302010
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7 0x70605040302010
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8 0x8070605040302010
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}
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# Exercise various things for register w<rn>
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proc test_register { rn } {
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gdb_test "ptype \$w${rn}" "type = uint32_t"
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gdb_test "p sizeof(\$w${rn})" " = 4"
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# Set all bits of x<rn>
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gdb_test_no_output "set \$x${rn}=0xffffffffffffffff" \
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"set all bits of x${rn}"
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# Test setting/fetching values
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for {set i 0} {$i < 9} {incr i} {
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global w_values
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global x_values
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with_test_prefix "set w${rn} to $x_values($i)" {
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# Set value of W and see the effects on W and X.
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gdb_test_no_output "set \$w${rn}=$x_values($i)"
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gdb_test "p/x \$w${rn}" "= $w_values($i)"
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gdb_test "p/x \$x${rn}" "= $w_values($i)"
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}
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with_test_prefix "set x${rn} to $x_values($i)" {
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# Set value of X and see the effects on W and X.
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gdb_test_no_output "set \$x${rn}=$x_values($i)"
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gdb_test "p/x \$w${rn}" "= $w_values($i)"
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gdb_test "p/x \$x${rn}" "= $x_values($i)"
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# Set all bits of x<rn>
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gdb_test_no_output "set \$x${rn}=0xffffffffffffffff" \
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"set all bits of x${rn}"
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}
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}
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}
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# Run tests
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foreach_with_prefix endian {"little" "big"} {
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gdb_test "set endian ${endian}" "The target is set to ${endian} endian\."
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for {set i 0} {$i < 31} {incr i} {
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test_register $i
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}
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}
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