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RISC-V: Fix disassemble fetch fail return value.

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This bug reported in
https://sourceware.org/bugzilla/show_bug.cgi?id=30184
And discussed in
https://sourceware.org/pipermail/binutils/2023-February/126213.html

We also checked the implementation of return value in arm and mips.
So this patch changes the return value to -1, that can fix bugs and maintain
consistency with other architectures.

opcodes/ChangeLog:

        * riscv-dis.c (print_insn_riscv):Change the return value.
This commit is contained in:
Jiawei
2023-03-20 11:34:44 +08:00
committed by Nelson Chu
parent fec6151922
commit e43d8768d9
1 changed files with 2 additions and 2 deletions
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4
opcodes/riscv-dis.c
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@ -1059,7 +1059,7 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
if (status != 0)
{
(*info->memory_error_func) (status, memaddr, info);
return status;
return -1;
}
insn = (insn_t) bfd_getl16 (packet);
dump_size = riscv_insn_length (insn);
@ -1071,7 +1071,7 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
if (status != 0)
{
(*info->memory_error_func) (status, memaddr, info);
return status;
return -1;
}
insn = (insn_t) bfd_get_bits (packet, dump_size * 8, false);