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* config/bfin-parse.y (asm_1): Add LOOP_BEGIN and LOOP_END.

Browse Source 
* config/tc-bfin.c (bfin_start_line_hook): Remove.
	(bfin_loop_beginend): New.
	* config/tc-bfin.h (bfin_start_line_hook): Don't declare.
	(md_start_line_hook): Don't define.
	* config/bfin-aux.h (bfin_loop_beginend): Declare.

	testsuite/
	* gas/bfin/loop.s, gas/bfin/loop.d: New test.
	* gas/bfin/loop2.s, gas/bfin/loop2.d: New test.
	* gas/bfin/loop3.s, gas/bfin/loop3.d: New test.
	* gas/bfin/bfin.exp: Add the new tests.
This commit is contained in:
Jie Zhang
2009-09-03 15:36:02 +00:00
parent fcbc2f0940
commit d3a50e1419
13 changed files with 104 additions and 119 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
gas/ChangeLog
View File

@ -1,3 +1,12 @@
2009-09-03 Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Add LOOP_BEGIN and LOOP_END.
* config/tc-bfin.c (bfin_start_line_hook): Remove.
(bfin_loop_beginend): New.
* config/tc-bfin.h (bfin_start_line_hook): Don't declare.
(md_start_line_hook): Don't define.
* config/bfin-aux.h (bfin_loop_beginend): Declare.
2009-09-03 Tristan Gingold <gingold@adacore.com>
* config/tc-ia64.c (ia64_vms_note): Use lbasename instead of basename.

3
gas/config/bfin-aux.h
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@ -126,6 +126,9 @@ bfin_gen_loopsetup (Expr_Node *soffset, REG_T c, int rop,
INSTR_T
bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg);
void
bfin_loop_beginend (Expr_Node *expr, int begin);
INSTR_T
bfin_gen_pushpopmultiple (int dr, int pr, int d, int p, int w);

21
gas/config/bfin-parse.y
View File

@ -3525,6 +3525,27 @@ asm_1:
else
return yyerror ("Bad register or values for LOOP");
}
/* LOOP_BEGIN. */
| LOOP_BEGIN expr
{
if (!IS_RELOC ($2))
return yyerror ("Invalid expression in LOOP_BEGIN statement");
bfin_loop_beginend ($2, 1);
$$ = 0;
}
/* LOOP_END. */
| LOOP_END expr
{
if (!IS_RELOC ($2))
return yyerror ("Invalid expression in LOOP_END statement");
bfin_loop_beginend ($2, 0);
$$ = 0;
}
/* pseudoDEBUG. */
| DBG

142
gas/config/tc-bfin.c
View File

@ -1016,123 +1016,6 @@ bfin_fix_adjustable (fixS *fixP)
}
}
/* Handle the LOOP_BEGIN and LOOP_END statements.
Parse the Loop_Begin/Loop_End and create a label. */
void
bfin_start_line_hook ()
{
bfd_boolean maybe_begin = FALSE;
bfd_boolean maybe_end = FALSE;
char *c1, *label_name;
symbolS *line_label;
char *c = input_line_pointer;
int cr_num = 0;
while (ISSPACE (*c))
{
if (*c == '\n')
cr_num++;
c++;
}
/* Look for Loop_Begin or Loop_End statements. */
if (*c != 'L' && *c != 'l')
return;
c++;
if (*c != 'O' && *c != 'o')
return;
c++;
if (*c != 'O' && *c != 'o')
return;
c++;
if (*c != 'P' && *c != 'p')
return;
c++;
if (*c != '_')
return;
c++;
if (*c == 'E' || *c == 'e')
maybe_end = TRUE;
else if (*c == 'B' || *c == 'b')
maybe_begin = TRUE;
else
return;
if (maybe_end)
{
c++;
if (*c != 'N' && *c != 'n')
return;
c++;
if (*c != 'D' && *c != 'd')
return;
}
if (maybe_begin)
{
c++;
if (*c != 'E' && *c != 'e')
return;
c++;
if (*c != 'G' && *c != 'g')
return;
c++;
if (*c != 'I' && *c != 'i')
return;
c++;
if (*c != 'N' && *c != 'n')
return;
}
c++;
while (ISSPACE (*c)) c++;
c1 = c;
while (ISALPHA (*c) || ISDIGIT (*c) || *c == '_') c++;
if (input_line_pointer[-1] == '\n')
bump_line_counters ();
while (cr_num--)
bump_line_counters ();
input_line_pointer = c;
if (maybe_end)
{
label_name = (char *) xmalloc ((c - c1) + strlen ("__END") + 5);
label_name[0] = 0;
strcat (label_name, "L$L$");
strncat (label_name, c1, c-c1);
strcat (label_name, "__END");
}
else /* maybe_begin. */
{
label_name = (char *) xmalloc ((c - c1) + strlen ("__BEGIN") + 5);
label_name[0] = 0;
strcat (label_name, "L$L$");
strncat (label_name, c1, c-c1);
strcat (label_name, "__BEGIN");
}
line_label = colon (label_name);
/* Loop_End follows the last instruction in the loop.
Adjust label address. */
if (maybe_end)
((struct local_symbol *) line_label)->lsy_value -= last_insn_size;
}
/* Special extra functions that help bfin-parse.y perform its job. */
struct obstack mempool;
@ -2145,6 +2028,31 @@ bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg)
return bfin_gen_loopsetup(lbegin, reg, rop, lend, preg);
}
void
bfin_loop_beginend (Expr_Node *expr, int begin)
{
const char *loopsym;
char *label_name;
symbolS *line_label;
const char *suffix = begin ? "__BEGIN" : "__END";
loopsym = expr->value.s_value;
label_name = (char *) xmalloc (strlen (loopsym) + strlen (suffix) + 5);
label_name[0] = 0;
strcat (label_name, "L$L$");
strcat (label_name, loopsym);
strcat (label_name, suffix);
line_label = colon (label_name);
/* LOOP_END follows the last instruction in the loop.
Adjust label address. */
if (!begin)
((struct local_symbol *) line_label)->lsy_value -= last_insn_size;
}
bfd_boolean
bfin_eol_in_insn (char *line)
{

2
gas/config/tc-bfin.h
View File

@ -39,10 +39,8 @@
#define WORKING_DOT_WORD
extern void bfin_start_line_hook (void);
extern bfd_boolean bfin_start_label (char *, char *);
#define md_start_line_hook() bfin_start_line_hook()
#define md_number_to_chars number_to_chars_littleendian
#define md_convert_frag(b,s,f) as_fatal ("bfin convert_frag\n");

7
gas/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2009-09-03 Jie Zhang <jie.zhang@analog.com>
* gas/bfin/loop.s, gas/bfin/loop.d: New test.
* gas/bfin/loop2.s, gas/bfin/loop2.d: New test.
* gas/bfin/loop3.s, gas/bfin/loop3.d: New test.
* gas/bfin/bfin.exp: Add the new tests.
2009-09-02 Jie Zhang <jie.zhang@analog.com>
From Bernd Schmidt <bernd.schmidt@analog.com>

3
gas/testsuite/gas/bfin/bfin.exp
View File

@ -20,6 +20,9 @@ if [istarget bfin*-*-*] {
run_dump_test "load"
run_dump_test "logical"
run_dump_test "logical2"
run_dump_test "loop"
run_dump_test "loop2"
run_dump_test "loop3"
run_dump_test "misc"
run_dump_test "move"
run_dump_test "move2"

7
gas/testsuite/gas/bfin/loop.d Normal file
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@ -0,0 +1,7 @@
#readelf: --relocs
#name: loop
Relocation section '\.rela\.text' .*:
.*
.* R_BFIN_GOT17M4 0+00 _foo \+ 0
.* R_BFIN_PCREL24 0+00 _bar \+ 0

5
gas/testsuite/gas/bfin/loop.s Normal file
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@ -0,0 +1,5 @@
LOOP bug LC0 = P0>>1;
LOOP_BEGIN bug;
R0 = [P3+_foo@GOT17M4];
LOOP_END bug;
call _bar;

7
gas/testsuite/gas/bfin/loop2.d Normal file
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@ -0,0 +1,7 @@
#readelf: --relocs
#name: loop2
Relocation section '\.rela\.text' .*:
.*
.* R_BFIN_GOT17M4 0+00 _foo \+ 0
.* R_BFIN_PCREL24 0+00 _bar \+ 0

5
gas/testsuite/gas/bfin/loop2.s Normal file
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@ -0,0 +1,5 @@
LOOP .bug LC0 = P0>>1;
LOOP_BEGIN .bug;
R0 = [P3+_foo@GOT17M4];
LOOP_END .bug;
call _bar;

7
gas/testsuite/gas/bfin/loop3.d Normal file
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@ -0,0 +1,7 @@
#readelf: --relocs
#name: loop3
Relocation section '\.rela\.text' .*:
.*
.* R_BFIN_GOT17M4 0+00 _foo \+ 0
.* R_BFIN_PCREL24 0+00 _bar \+ 0

5
gas/testsuite/gas/bfin/loop3.s Normal file
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@ -0,0 +1,5 @@
LOOP $bug LC0 = P0>>1;
LOOP_BEGIN $bug;
R0 = [P3+_foo@GOT17M4];
LOOP_END $bug;
call _bar;