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sim: bpf: fix mixed decls & code warnings (and style)

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This commit is contained in:
Mike Frysinger
2021-06-26 22:03:14 -04:00
parent 5d0b3088f7
commit cc9c19b030
3 changed files with 12 additions and 3 deletions
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5
sim/bpf/ChangeLog
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@ -1,3 +1,8 @@
2021-06-27 Mike Frysinger <vapier@gentoo.org>
* bpf-helpers.c (bpf_trace_printk): Move value decl to top of scope.
* mloop.in: Move off16 & imm32 decls to top of scope.
2021-06-22 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate.

3
sim/bpf/bpf-helpers.c
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@ -72,6 +72,7 @@ bpf_trace_printk (SIM_CPU *current_cpu)
supported, which are read from %r3, %r4 and %r5 respectively. */
for (i = 0, tags_processed = 0; i < size;)
{
UDI value;
QI c = GETMEMUQI (current_cpu, CPU_PC_GET (current_cpu),
fmt_address + i);
@ -88,7 +89,7 @@ bpf_trace_printk (SIM_CPU *current_cpu)
if (i++ >= size)
return -1; /* XXX look for kernel error code. */
UDI value = GET_H_GPR (3 + tags_processed);
value = GET_H_GPR (3 + tags_processed);
switch ((GETMEMUQI (current_cpu, CPU_PC_GET (current_cpu),
fmt_address + i)))

7
sim/bpf/mloop.in
View File

@ -123,14 +123,17 @@ cat <<EOF
if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
{
UHI off16;
USI imm32;
/* eBPF instructions are little-endian, but GETIMEMUDI reads according
to target byte order. Swap to little-endian. */
insn = SWAP_8 (insn);
/* But, the imm32 and offset16 fields within instructions follow target
byte order. Swap those fields back. */
UHI off16 = (UHI) ((insn & 0x00000000ffff0000) >> 16);
USI imm32 = (USI) ((insn & 0xffffffff00000000) >> 32);
off16 = (UHI) ((insn & 0x00000000ffff0000) >> 16);
imm32 = (USI) ((insn & 0xffffffff00000000) >> 32);
off16 = SWAP_2 (off16);
imm32 = SWAP_4 (imm32);