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https://github.com/espressif/binutils-gdb.git
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x86-64: don't permit LAHF/SAHF with "generic64"
The feature isn't universally available on 64-bit CPUs. Note that in i386-gen.c:isa_dependencies[] I'm only adding it to models where I'm certain the functionality exists. For Nocona and Core I'm uncertain in particular.
This commit is contained in:
Jan Beulich
@ -1047,6 +1047,7 @@ static const arch_entry cpu_arch[] =
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SUBARCH (lwp, LWP, ANY_LWP, false),
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SUBARCH (movbe, MOVBE, MOVBE, false),
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SUBARCH (cx16, CX16, CX16, false),
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SUBARCH (lahf_sahf, LAHF_SAHF, LAHF_SAHF, false),
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SUBARCH (ept, EPT, ANY_EPT, false),
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SUBARCH (lzcnt, LZCNT, LZCNT, false),
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SUBARCH (popcnt, POPCNT, POPCNT, false),
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@ -151,6 +151,7 @@ accept various extension mnemonics. For example,
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@code{sse4},
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@code{avx},
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@code{avx2},
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@code{lahf_sahf},
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@code{adx},
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@code{rdseed},
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@code{prfchw},
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@ -1487,7 +1488,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
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@item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
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@item @samp{.lzcnt} @tab @samp{.popcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc}
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@item @samp{.hle} @tab @samp{.rtm} @tab @samp{.tsx}
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@item @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
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@item @samp{.lahf_sahf} @tab @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
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@item @samp{.smap} @tab @samp{.mpx} @tab @samp{.sha} @tab @samp{.prefetchwt1}
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@item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1}
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@item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf}
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@ -934,6 +934,7 @@ if [gas_64_check] then {
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run_dump_test "x86-64-arch-2-btver2"
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run_list_test "x86-64-arch-2-1" "-march=generic64 -I${srcdir}/$subdir -al"
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run_list_test "x86-64-arch-2-2" "-march=generic64+cx16 -I${srcdir}/$subdir -al"
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run_list_test "x86-64-arch-2-3" "-march=generic64+lahf_sahf -I${srcdir}/$subdir -aln"
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run_dump_test "xmmhi64"
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run_dump_test "x86-64-xsave"
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run_dump_test "x86-64-xsave-intel"
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@ -1,5 +1,5 @@
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#source: ../x86-64-arch-2.s
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
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#objdump: -dw
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#name: x86-64 (ILP32) arch 2
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#dump: ../x86-64-arch-2.d
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@ -24,6 +24,7 @@
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.*:60: Error: .*
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.*:62: Error: .*
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.*:64: Error: .*
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.*:66: Error: .*
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GAS LISTING .*
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@ -95,3 +96,5 @@ GAS LISTING .*
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[ ]*62[ ]+blsr %ecx,%ebx
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[ ]*63[ ]+\# TBM
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[ ]*64[ ]+blcfill %ecx,%ebx
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[ ]*65[ ]+\# LAHF/SAHF
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[ ]*66[ ]+lahf
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@ -23,6 +23,7 @@
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.*:60: Error: .*
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.*:62: Error: .*
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.*:64: Error: .*
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.*:66: Error: .*
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GAS LISTING .*
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@ -94,3 +95,5 @@ GAS LISTING .*
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[ ]*62[ ]+blsr %ecx,%ebx
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[ ]*63[ ]+\# TBM
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[ ]*64[ ]+blcfill %ecx,%ebx
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[ ]*65[ ]+\# LAHF/SAHF
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[ ]*66[ ]+lahf
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93
gas/testsuite/gas/i386/x86-64-arch-2-3.l
Normal file
93
gas/testsuite/gas/i386/x86-64-arch-2-3.l
Normal file
@ -0,0 +1,93 @@
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.*: Assembler messages:
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.*:16: Error: .*
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.*:18: Error: .*
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.*:20: Error: .*
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.*:22: Error: .*
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.*:24: Error: .*
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.*:26: Error: .*
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.*:28: Error: .*
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.*:30: Error: .*
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.*:32: Error: .*
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.*:34: Error: .*
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.*:36: Error: .*
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.*:38: Error: .*
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.*:40: Error: .*
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.*:42: Error: .*
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.*:44: Error: .*
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.*:46: Error: .*
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.*:48: Error: .*
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.*:50: Error: .*
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.*:52: Error: .*
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.*:54: Error: .*
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.*:56: Error: .*
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.*:58: Error: .*
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.*:60: Error: .*
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.*:62: Error: .*
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.*:64: Error: .*
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[ ]*1[ ]+\.include "x86-64-arch-2\.s"
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[ ]*1[ ]+\# Test -march=
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[ ]*2[ ]+\.text
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[ ]*3[ ]+\# cmov feature *
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[ ]*4[ ]+\?\?\?\? 0F44D8 cmove %eax,%ebx
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[ ]*5[ ]+\# clflush
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[ ]*6[ ]+\?\?\?\? 0FAE38 clflush \(%rax\)
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[ ]*7[ ]+\# SYSCALL
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[ ]*8[ ]+\?\?\?\? 0F05 syscall
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[ ]*9[ ]+\# MMX
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[ ]*10[ ]+\?\?\?\? 0FFCDC paddb %mm4,%mm3
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[ ]*11[ ]+\# SSE
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[ ]*12[ ]+\?\?\?\? F30F58DC addss %xmm4,%xmm3
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[ ]*13[ ]+\# SSE2
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[ ]*14[ ]+\?\?\?\? F20F58DC addsd %xmm4,%xmm3
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[ ]*15[ ]+\# SSE3
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[ ]*16[ ]+addsubpd %xmm4,%xmm3
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[ ]*17[ ]+\# SSSE3
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[ ]*18[ ]+phaddw %xmm4,%xmm3
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[ ]*19[ ]+\# SSE4\.1
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[ ]*20[ ]+phminposuw %xmm1,%xmm3
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[ ]*21[ ]+\# SSE4\.2
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[ ]*22[ ]+crc32 %ecx,%ebx
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[ ]*23[ ]+\# AVX
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[ ]*24[ ]+vzeroall
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[ ]*25[ ]+\# VMX
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[ ]*26[ ]+vmxoff
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[ ]*27[ ]+\# SMX
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[ ]*28[ ]+getsec
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[ ]*29[ ]+\# Xsave
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[ ]*30[ ]+xgetbv
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[ ]*31[ ]+\# Xsaveopt
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[ ]*32[ ]+xsaveopt \(%rcx\)
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[ ]*33[ ]+\# AES
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[ ]*34[ ]+aesenc \(%rcx\),%xmm0
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[ ]*35[ ]+\# PCLMUL
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[ ]*36[ ]+pclmulqdq \$8,%xmm1,%xmm0
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[ ]*37[ ]+\# AES \+ AVX
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[ ]*38[ ]+vaesenc \(%rcx\),%xmm0,%xmm2
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[ ]*39[ ]+\# PCLMUL \+ AVX
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[ ]*40[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
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[ ]*41[ ]+\# FMA
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[ ]*42[ ]+vfmadd132pd %xmm4,%xmm6,%xmm2
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[ ]*43[ ]+\# MOVBE
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[ ]*44[ ]+movbe \(%rcx\),%ebx
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[ ]*45[ ]+\# CX16
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[ ]*46[ ]+cmpxchg16b \(%rsi\)
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[ ]*47[ ]+\# EPT
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[ ]*48[ ]+invept \(%rcx\),%rbx
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[ ]*49[ ]+\# RDTSCP
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[ ]*50[ ]+rdtscp
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[ ]*51[ ]+\# 3DNow or PRFCHW
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[ ]*52[ ]+prefetchw 0x1000\(,%rsi,2\)
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[ ]*53[ ]+\# SSE4a
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[ ]*54[ ]+insertq %xmm2,%xmm1
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[ ]*55[ ]+\# SVME
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[ ]*56[ ]+vmload
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[ ]*57[ ]+\# ABM/LZCNT
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[ ]*58[ ]+lzcnt %ecx,%ebx
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[ ]*59[ ]+\# PadLock
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[ ]*60[ ]+xstorerng
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[ ]*61[ ]+\# BMI
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[ ]*62[ ]+blsr %ecx,%ebx
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[ ]*63[ ]+\# TBM
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[ ]*64[ ]+blcfill %ecx,%ebx
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[ ]*65[ ]+\# LAHF/SAHF
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[ ]*66[ ]+\?\?\?\? 9F lahf
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1
gas/testsuite/gas/i386/x86-64-arch-2-3.s
Normal file
1
gas/testsuite/gas/i386/x86-64-arch-2-3.s
Normal file
@ -0,0 +1 @@
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.include "x86-64-arch-2.s"
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@ -1,5 +1,5 @@
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#source: x86-64-arch-2.s
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
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#objdump: -dw
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#name: x86-64 arch 2 (lzcnt)
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#dump: x86-64-arch-2.d
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@ -1,5 +1,5 @@
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#source: x86-64-arch-2.s
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
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#objdump: -dw
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#name: x86-64 arch 2 (prefetchw)
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#dump: x86-64-arch-2.d
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@ -1,4 +1,4 @@
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
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#as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+lahf_sahf+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
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#objdump: -dw
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#name: x86-64 arch 2
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@ -38,4 +38,5 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
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[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
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[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
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[ ]*[a-f0-9]+: 9f lahf
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#pass
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@ -62,3 +62,5 @@ xstorerng
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blsr %ecx,%ebx
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# TBM
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blcfill %ecx,%ebx
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# LAHF/SAHF
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lahf
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@ -67,7 +67,7 @@ static const dependency isa_dependencies[] =
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{ "CORE2",
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"NOCONA|SSSE3" },
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{ "COREI7",
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"CORE2|SSE4_2|Rdtscp" },
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"CORE2|SSE4_2|Rdtscp|LAHF_SAHF" },
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{ "K6",
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"186|286|386|486|586|SYSCALL|387|MMX" },
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{ "K6_2",
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@ -79,7 +79,7 @@ static const dependency isa_dependencies[] =
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{ "AMDFAM10",
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"K8|FISTTP|SSE4A|ABM" },
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{ "BDVER1",
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"GENERIC64|FISTTP|Rdtscp|CX16|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" },
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"GENERIC64|FISTTP|Rdtscp|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" },
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{ "BDVER2",
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"BDVER1|FMA|BMI|TBM|F16C" },
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{ "BDVER3",
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@ -87,7 +87,7 @@ static const dependency isa_dependencies[] =
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{ "BDVER4",
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"BDVER3|AVX2|Movbe|BMI2|RdRnd|MWAITX" },
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{ "ZNVER1",
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"GENERIC64|FISTTP|Rdtscp|CX16|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
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"GENERIC64|FISTTP|Rdtscp|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
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{ "ZNVER2",
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"ZNVER1|CLWB|RDPID|RDPRU|MCOMMIT|WBNOINVD" },
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{ "ZNVER3",
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@ -95,7 +95,7 @@ static const dependency isa_dependencies[] =
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{ "ZNVER4",
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"ZNVER3|AVX512F|AVX512DQ|AVX512IFMA|AVX512CD|AVX512BW|AVX512VL|AVX512_BF16|AVX512VBMI|AVX512_VBMI2|AVX512_VNNI|AVX512_BITALG|AVX512_VPOPCNTDQ|GFNI|RMPQUERY" },
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{ "BTVER1",
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"GENERIC64|FISTTP|CX16|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|CX16|Clflush|FISTTP|SVME" },
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"GENERIC64|FISTTP|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" },
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{ "BTVER2",
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"BTVER1|AVX|BMI|F16C|AES|PCLMUL|Movbe|Xsaveopt|PRFCHW" },
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{ "286",
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@ -313,6 +313,7 @@ static bitfield cpu_flags[] =
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BITFIELD (LM),
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BITFIELD (Movbe),
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BITFIELD (CX16),
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BITFIELD (LAHF_SAHF),
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BITFIELD (EPT),
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BITFIELD (Rdtscp),
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BITFIELD (FSGSBase),
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File diff suppressed because it is too large
Load Diff
@ -137,6 +137,8 @@ enum
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CpuMovbe,
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/* CMPXCHG16B instruction support required. */
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CpuCX16,
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/* LAHF/SAHF instruction support required (in 64-bit mode). */
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CpuLAHF_SAHF,
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/* EPT Instructions required */
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CpuEPT,
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/* RDTSCP Instruction support required */
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@ -372,6 +374,7 @@ typedef union i386_cpu_flags
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unsigned int cputbm:1;
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unsigned int cpumovbe:1;
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unsigned int cpucx16:1;
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unsigned int cpulahf_sahf:1;
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unsigned int cpuept:1;
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unsigned int cpurdtscp:1;
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unsigned int cpufsgsbase:1;
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@ -264,8 +264,10 @@ cld, 0xfc, 0, NoSuf, {}
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cli, 0xfa, 0, NoSuf, {}
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clts, 0xf06, i286, NoSuf, {}
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cmc, 0xf5, 0, NoSuf, {}
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lahf, 0x9f, 0, NoSuf, {}
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sahf, 0x9e, 0, NoSuf, {}
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lahf, 0x9f, No64, NoSuf, {}
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lahf, 0x9f, LAHF_SAHF, NoSuf, {}
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sahf, 0x9e, No64, NoSuf, {}
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sahf, 0x9e, LAHF_SAHF, NoSuf, {}
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pushf, 0x9c, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
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pushf, 0x9c, x64, DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64, {}
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popf, 0x9d, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf, {}
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9494
opcodes/i386-tbl.h
9494
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
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