espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-27 22:48:57 +08:00
Code Issues Packages Projects Releases Wiki Activity

ix86/Intel: don't require memory operand size specifier for PTWRITE

Browse Source 
Other than in 64-bit mode, in 32- and 16-bit modes operand size isn't
ambiguous.
This commit is contained in:
Jan Beulich
2017-11-16 12:28:06 +01:00
committed by Jan Beulich
parent 8c8cad3aa8
commit c2b9da1608
5 changed files with 13 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
gas/ChangeLog
View File

@ -1,3 +1,12 @@
2017-11-16 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (process_suffix): Ignore .no_qsuf outside of
64-bit mode.
* testsuite/gas/i386/ptwrite.s: Add test for memory operand
without DWORD PTR.
* testsuite/gas/i386/ptwrite.d,
testsuite/gas/i386/ptwrite-intel.d: Adjust expectations.
2017-11-15 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/gas/i386/noextreg.s: Replace .code64/.code32 and

2
gas/config/tc-i386.c
View File

@ -5565,7 +5565,7 @@ process_suffix (void)
suffixes |= 1 << 3;
if (!i.tm.opcode_modifier.no_ssuf)
suffixes |= 1 << 4;
if (!i.tm.opcode_modifier.no_qsuf)
if (flag_code == CODE_64BIT && !i.tm.opcode_modifier.no_qsuf)
suffixes |= 1 << 5;
/* There are more than suffix matches. */

1
gas/testsuite/gas/i386/ptwrite-intel.d
View File

@ -15,4 +15,5 @@ Disassembly of section \.text:
+[a-f0-9]+: f3 0f ae 21 ptwrite DWORD PTR \[ecx\]
+[a-f0-9]+: f3 0f ae e1 ptwrite ecx
+[a-f0-9]+: f3 0f ae 21 ptwrite DWORD PTR \[ecx\]
+[a-f0-9]+: f3 0f ae 21 ptwrite DWORD PTR \[ecx\]
#pass

1
gas/testsuite/gas/i386/ptwrite.d
View File

@ -15,4 +15,5 @@ Disassembly of section \.text:
+[a-f0-9]+: f3 0f ae 21 ptwritel \(%ecx\)
+[a-f0-9]+: f3 0f ae e1 ptwrite %ecx
+[a-f0-9]+: f3 0f ae 21 ptwritel \(%ecx\)
+[a-f0-9]+: f3 0f ae 21 ptwritel \(%ecx\)
#pass

1
gas/testsuite/gas/i386/ptwrite.s
View File

@ -9,4 +9,5 @@ _start:
.intel_syntax noprefix
ptwrite ecx
ptwrite [ecx]
ptwrite DWORD PTR [ecx]