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synced 2025-06-22 02:50:08 +08:00
x86: drop "regmask" static variable
Replace its two uses by more direct checks, paralleling what's already there for SIMD registers.
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@ -1907,7 +1907,6 @@ static const i386_operand_type disp16_32 = OPERAND_TYPE_DISP16_32;
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static const i386_operand_type anydisp = OPERAND_TYPE_ANYDISP;
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static const i386_operand_type anyimm = OPERAND_TYPE_ANYIMM;
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static const i386_operand_type regxmm = OPERAND_TYPE_REGXMM;
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static const i386_operand_type regmask = OPERAND_TYPE_REGMASK;
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static const i386_operand_type imm8 = OPERAND_TYPE_IMM8;
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static const i386_operand_type imm8s = OPERAND_TYPE_IMM8S;
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static const i386_operand_type imm16 = OPERAND_TYPE_IMM16;
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@ -8190,7 +8189,7 @@ build_modrm_byte (void)
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|| ((op.bitfield.class != Reg
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|| (!op.bitfield.dword && !op.bitfield.qword))
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&& op.bitfield.class != RegSIMD
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&& !operand_type_equal (&op, ®mask)))
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&& op.bitfield.class != RegMask))
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abort ();
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i.vex.register_specifier = i.op[vvvv].regs;
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dest++;
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@ -8601,7 +8600,7 @@ build_modrm_byte (void)
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if ((type->bitfield.class != Reg
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|| (!type->bitfield.dword && !type->bitfield.qword))
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&& type->bitfield.class != RegSIMD
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&& !operand_type_equal (type, ®mask))
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&& type->bitfield.class != RegMask)
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abort ();
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i.vex.register_specifier = i.op[vex_reg].regs;
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