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opcodes: Correct address for ARC's "isa_config" aux reg

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This patch changes the address for "isa_config" auxiliary register
from 0xC2 to the correct value 0xC1.  Moreover, it only exists in
arc700+ and not all ARCs.

opcodes/ChangeLog:

	* arc-regs.h: Change isa_config address to 0xc1.
	isa_config exists for ARC700 and ARCV2 and not ARCALL.
This commit is contained in:
Shahab Vahedi
2022-11-21 15:56:31 +01:00
parent dc95ee260c
commit b2059307d8
2 changed files with 7 additions and 1 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2022-11-22 Shahab Vahedi <shahab@synopsys.com>
* arc-regs.h: Change isa_config address to 0xc1.
isa_config exists for ARC700 and ARCV2 and not ARCALL.
2022-10-31 Yoshinori Sato <ysato@users.sourceforge.jp>
* rx-decode.opc: Switch arguments of the MVTACGU insn.

3
opcodes/arc-regs.h
View File

@ -207,7 +207,8 @@ DEF (0xac, ARC_OPCODE_ARCALL, NONE, se_dbg_data3)
DEF (0xad, ARC_OPCODE_ARCALL, NONE, se_watch)
DEF (0xc0, ARC_OPCODE_ARCALL, NONE, bpu_build)
DEF (0xc1, ARC_OPCODE_ARC600, NONE, arc600_build_config)
DEF (0xc2, ARC_OPCODE_ARCALL, NONE, isa_config)
DEF (0xc1, ARC_OPCODE_ARC700, NONE, isa_config)
DEF (0xc1, ARC_OPCODE_ARCV2, NONE, isa_config)
DEF (0xf4, ARC_OPCODE_ARCALL, NONE, hwp_build)
DEF (0xf5, ARC_OPCODE_ARCALL, NONE, pct_build)
DEF (0xf6, ARC_OPCODE_ARCALL, NONE, cc_build)