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MIPS/GAS: Correct BFD_RELOC_MIPS16_16_PCREL_S1 fixup size

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Correct the size of a BFD_RELOC_MIPS16_16_PCREL_S1 fixup made in
`md_convert_frag', fixing a bug introduced with commit c9775dde3277
("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support)".  Add test
cases to verify that the overflow of this fixup's in-place addend is
still correctly detected.

	gas/
	* config/tc-mips.c (md_convert_frag): Correct
	BFD_RELOC_MIPS16_16_PCREL_S1 fixup size.
	* testsuite/gas/mips/mips16-branch-addend-4.d: New test.
	* testsuite/gas/mips/mips16-branch-addend-5.d: New test.
	* testsuite/gas/mips/mips16-branch-addend-5.l: New stderr
	output.
	* testsuite/gas/mips/mips16-branch-addend-4.s: New test source.
	* testsuite/gas/mips/mips16-branch-addend-5.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki
2017-04-25 10:20:14 +01:00
parent debed3db48
commit adc1273cb2
8 changed files with 108 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
gas/ChangeLog
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@ -1,3 +1,15 @@
2017-04-25 Maciej W. Rozycki <macro@imgtec.com>
* config/tc-mips.c (md_convert_frag): Correct
BFD_RELOC_MIPS16_16_PCREL_S1 fixup size.
* testsuite/gas/mips/mips16-branch-addend-4.d: New test.
* testsuite/gas/mips/mips16-branch-addend-5.d: New test.
* testsuite/gas/mips/mips16-branch-addend-5.l: New stderr
output.
* testsuite/gas/mips/mips16-branch-addend-4.s: New test source.
* testsuite/gas/mips/mips16-branch-addend-5.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com>
PR gas/21407

6
gas/config/tc-mips.c
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@ -18445,15 +18445,11 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
exp.X_add_symbol = fragp->fr_symbol;
exp.X_add_number = fragp->fr_offset;
fixp = fix_new_exp (fragp, buf - fragp->fr_literal, 2, &exp,
fixp = fix_new_exp (fragp, buf - fragp->fr_literal, 4, &exp,
TRUE, reloc);
fixp->fx_file = fragp->fr_file;
fixp->fx_line = fragp->fr_line;
/* These relocations can have an addend that won't fit
in 2 octets. */
fixp->fx_no_overflow = 1;
}
else
as_bad_where (fragp->fr_file, fragp->fr_line,

2
gas/testsuite/gas/mips/mips.exp
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@ -1552,6 +1552,8 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16-branch-addend-1"
run_dump_test "mips16-branch-addend-2"
run_dump_test "mips16-branch-addend-3"
run_dump_test "mips16-branch-addend-4"
run_dump_test "mips16-branch-addend-5"
run_dump_test "mips16-branch-absolute"
run_dump_test "mips16-branch-absolute-addend"
if $has_newabi {

30
gas/testsuite/gas/mips/mips16-branch-addend-4.d Normal file
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@ -0,0 +1,30 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 branch relocation with addend 4
#as: -32
.*: +file format .*mips.*
Disassembly of section \.text:
\.\.\.
[0-9a-f]+ <[^>]*> f7ef 101f b 00011002 <foo\+0x10002>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f7ef 601f bteqz 00011006 <foo\+0x10006>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f7ef 611f btnez 0001100a <foo\+0x1000a>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f7ef 221f beqz v0,0001100e <foo\+0x1000e>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f7ef 2a1f bnez v0,00011012 <foo\+0x10012>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f010 1000 b ffff1018 <foo\+0xffff0018>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f010 6000 bteqz ffff101c <foo\+0xffff001c>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f010 6100 btnez ffff1020 <foo\+0xffff0020>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f010 2200 beqz v0,ffff1024 <foo\+0xffff0024>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> f010 2a00 bnez v0,ffff1028 <foo\+0xffff0028>
[ ]*[0-9a-f]+: R_MIPS16_PC16_S1 bar
[0-9a-f]+ <[^>]*> 6500 nop
\.\.\.

24
gas/testsuite/gas/mips/mips16-branch-addend-4.s Normal file
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@ -0,0 +1,24 @@
.text
.space 0x1000
.ent foo
.set mips16
foo:
b bar + 4 + (0x7fff << 1)
bteqz bar + 4 + (0x7fff << 1)
btnez bar + 4 + (0x7fff << 1)
beqz $2, bar + 4 + (0x7fff << 1)
bnez $2, bar + 4 + (0x7fff << 1)
b bar + 4 - (0x8000 << 1)
bteqz bar + 4 - (0x8000 << 1)
btnez bar + 4 - (0x8000 << 1)
beqz $2, bar + 4 - (0x8000 << 1)
bnez $2, bar + 4 - (0x8000 << 1)
nop
.set nomips16
.end foo
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
.align 4, 0
.space 16

4
gas/testsuite/gas/mips/mips16-branch-addend-5.d Normal file
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@ -0,0 +1,4 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 branch relocation with addend 5
#as: -32
#error-output: mips16-branch-addend-5.l

11
gas/testsuite/gas/mips/mips16-branch-addend-5.l Normal file
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@ -0,0 +1,11 @@
.*: Assembler messages:
.*:8: Error: relocation overflow
.*:9: Error: relocation overflow
.*:10: Error: relocation overflow
.*:11: Error: relocation overflow
.*:12: Error: relocation overflow
.*:13: Error: relocation overflow
.*:14: Error: relocation overflow
.*:15: Error: relocation overflow
.*:16: Error: relocation overflow
.*:17: Error: relocation overflow

24
gas/testsuite/gas/mips/mips16-branch-addend-5.s Normal file
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@ -0,0 +1,24 @@
.text
.space 0x1000
.ent foo
.set mips16
foo:
b bar + 4 + (0x8000 << 1)
bteqz bar + 4 + (0x8000 << 1)
btnez bar + 4 + (0x8000 << 1)
beqz $2, bar + 4 + (0x8000 << 1)
bnez $2, bar + 4 + (0x8000 << 1)
b bar + 4 - (0x8001 << 1)
bteqz bar + 4 - (0x8001 << 1)
btnez bar + 4 - (0x8001 << 1)
beqz $2, bar + 4 - (0x8001 << 1)
bnez $2, bar + 4 - (0x8001 << 1)
nop
.set nomips16
.end foo
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
.align 4, 0
.space 16