Recognize branch instruction on MIPS in gdb.trace/entry-values.exp

The test entry-values.exp doesn't recognize the call instructions
on MIPS, such as JAL, JALS and etc, so this patch sets call_insn
to match various jump and branch instructions first.

Currently, we assume the next instruction address of call instruction
is the address returned from foo, however it is not correct on MIPS
which has delay slot.  We extend variable call_insn to match one
instruction after jump or branch instruction, so that
$returned_from_foo is correct on MIPS.

All tests in entry-values.exp are PASS.

gdb/testsuite:

2015-01-08  Yao Qi  <yao@codesourcery.com>

	* gdb.trace/entry-values.exp: Set call_insn for MIPS target.

gdb/testsuite/ChangeLog

@@ -1,3 +1,7 @@
+2015-01-08  Yao Qi  <yao@codesourcery.com>
+
+	* gdb.trace/entry-values.exp: Set call_insn for MIPS target.
+
 2015-01-07  Jan Kratochvil  <jan.kratochvil@redhat.com>
 
 	Fix testcase compilation.

gdb/testsuite/gdb.trace/entry-values.exp

@@ -43,6 +43,20 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] } {
     set call_insn "brasl"
 } elseif { [istarget "powerpc*-*-*"] } {
     set call_insn "bl"
+} elseif { [istarget "mips*-*-*"] } {
+    # Skip the delay slot after the instruction used to make a call
+    # (which can be a jump or a branch) if it has one.
+    #
+    #  JUMP (or BRANCH) foo
+    #  insn1
+    #  insn2
+    #
+    # Most MIPS instructions used to make calls have a delay slot.
+    # These include JAL, JALS, JALX, JALR, JALRS, BAL and BALS.
+    # In this case the program continues from `insn2' when `foo'
+    # returns.  The only exception is JALRC, in which case execution
+    # resumes from `insn1' instead.
+    set call_insn {jalrc|[jb]al[sxr]*[ \t][^\r\n]+\r\n}
 } else {
     set call_insn "call"
 }