espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-22 02:50:08 +08:00
Code Issues Packages Projects Releases Wiki Activity

[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers

Browse Source 
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.

This patch adds the new system registers SCXTNUM_ELx and ID_PFR2_EL1.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
	(AARCH64_FEATURE_ID_PFR2): New.
	(AARCH64_ARCH_V8_5): Add both by default.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (aarch64_sys_regs): New entries for
	scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
	(aarch64_sys_reg_supported_p): New checks for above.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/gas/aarch64/sysreg-4.s: Test registers
	scxtnum_el[0,1,2,3,12] and id_pfr2_el1.
	* testsuite/gas/aarch64/sysreg-4.d: Likewise.
	* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
This commit is contained in:
Sudakshina Das
2018-09-26 11:02:28 +01:00
committed by Richard Earnshaw
parent ff6054520c
commit a97330e723
8 changed files with 65 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
include/opcode/aarch64.h
View File

@ -78,6 +78,11 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_RNG 0x80000000000ULL
/* BTI instructions. */
#define AARCH64_FEATURE_BTI 0x100000000000ULL
/* SCXTNUM_ELx. */
#define AARCH64_FEATURE_SCXTNUM 0x200000000000ULL
/* ID_PFR2 instructions. */
#define AARCH64_FEATURE_ID_PFR2 0x400000000000ULL
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@ -108,7 +113,9 @@ typedef uint32_t aarch64_insn;
| AARCH64_FEATURE_SB \
| AARCH64_FEATURE_PREDRES \
| AARCH64_FEATURE_CVADP \
| AARCH64_FEATURE_BTI)
| AARCH64_FEATURE_BTI \
| AARCH64_FEATURE_SCXTNUM \
| AARCH64_FEATURE_ID_PFR2)
#define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0)