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gas/testsuite/

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2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix".

	* gas/i386/x86-64-crx-suffix.d: Minor update.

	* gas/i386/x86-64-drx-suffix.d: New file.
	* gas/i386/x86-64-drx.d: Likewise.
	* gas/i386/x86-64-drx.s: Likewise.

opcodes/

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.
This commit is contained in:
H.J. Lu
2006-02-11 18:08:35 +00:00
parent 6dd5059a06
commit a1cfb73ee0
8 changed files with 78 additions and 3 deletions
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10
gas/testsuite/ChangeLog
View File

@ -1,3 +1,13 @@
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix".
* gas/i386/x86-64-crx-suffix.d: Minor update.
* gas/i386/x86-64-drx-suffix.d: New file.
* gas/i386/x86-64-drx.d: Likewise.
* gas/i386/x86-64-drx.s: Likewise.
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".

2
gas/testsuite/gas/i386/i386.exp
View File

@ -134,6 +134,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-prescott"
run_dump_test "x86-64-crx"
run_dump_test "x86-64-crx-suffix"
run_dump_test "x86-64-drx"
run_dump_test "x86-64-drx-suffix"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]

1
gas/testsuite/gas/i386/x86-64-crx-suffix.d
View File

@ -1,6 +1,5 @@
#objdump: -dwMsuffix
#name: x86-64 control register related opcodes (with suffixes)
#source: x86-64-crx.s
.*: +file format elf64-x86-64

21
gas/testsuite/gas/i386/x86-64-drx-suffix.d Normal file
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@ -0,0 +1,21 @@
#objdump: -dwMsuffix
#name: x86-64 debug register related opcodes (with suffixes)
#source: x86-64-drx.s
.*: +file format elf64-x86-64
Disassembly of section .text:
0+ <_start>:
[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq[ ]+?%db8,%rax
[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq[ ]+?%db8,%rdi
[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq[ ]+?%rax,%db8
[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq[ ]+?%rdi,%db8
[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq[ ]+?%db8,%rax
[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq[ ]+?%db8,%rdi
[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq[ ]+?%rax,%db8
[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq[ ]+?%rdi,%db8
[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq[ ]+?%db8,%rax
[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq[ ]+?%db8,%rdi
[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq[ ]+?%rax,%db8
[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq[ ]+?%rdi,%db8

20
gas/testsuite/gas/i386/x86-64-drx.d Normal file
View File

@ -0,0 +1,20 @@
#objdump: -dw
#name: x86-64 debug register related opcodes
.*: +file format elf64-x86-64
Disassembly of section .text:
0+ <_start>:
[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq?[ ]+?%db8,%rax
[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq?[ ]+?%db8,%rdi
[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq?[ ]+?%rax,%db8
[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq?[ ]+?%rdi,%db8
[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq?[ ]+?%db8,%rax
[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq?[ ]+?%db8,%rdi
[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq?[ ]+?%rax,%db8
[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq?[ ]+?%rdi,%db8
[ ]*[0-9a-f]+: 44 0f 21 c0[ ]+movq?[ ]+?%db8,%rax
[ ]*[0-9a-f]+: 44 0f 21 c7[ ]+movq?[ ]+?%db8,%rdi
[ ]*[0-9a-f]+: 44 0f 23 c0[ ]+movq?[ ]+?%rax,%db8
[ ]*[0-9a-f]+: 44 0f 23 c7[ ]+movq?[ ]+?%rdi,%db8

18
gas/testsuite/gas/i386/x86-64-drx.s Normal file
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@ -0,0 +1,18 @@
.text
_start:
movq %dr8, %rax
movq %dr8, %rdi
movq %rax, %dr8
movq %rdi, %dr8
.att_syntax noprefix
movq dr8, rax
movq dr8, rdi
movq rax, dr8
movq rdi, dr8
.intel_syntax noprefix
mov rax, dr8
mov rdi, dr8
mov dr8, rax
mov dr8, rdi

5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
moves.
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c ('Z'): Add a new macro.

4
opcodes/i386-dis.c
View File

@ -832,9 +832,9 @@ static const struct dis386 dis386_twobyte[] = {
{ "(bad)", XX, XX, XX },
/* 20 */
{ "movZ", Rm, Cm, XX },
{ "movL", Rm, Dm, XX },
{ "movZ", Rm, Dm, XX },
{ "movZ", Cm, Rm, XX },
{ "movL", Dm, Rm, XX },
{ "movZ", Dm, Rm, XX },
{ "movL", Rd, Td, XX },
{ "(bad)", XX, XX, XX },
{ "movL", Td, Rd, XX },