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MASM accepts ESP/RSP being specified second in a memory address

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operand, by silently making it the base register despite not being
specified first.

Consequently, we also permit an xmm/ymm index to be specified first
(possibly alone), nevertheless putting it in as index register.

2012-07-24  Jan Beulich <jbeulich@suse.com>

	* config/tc-i386-intel.c (i386_intel_simplify_register): Handle
	xmm/ymm index register being specified first as well as esp/rsp
	base register being specified last in a memory operand.
This commit is contained in:
Jan Beulich
2012-07-25 11:34:49 +00:00
parent 8280f32685
commit 9e2934f799
2 changed files with 21 additions and 1 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2012-07-24 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register): Handle
xmm/ymm index register being specified first as well as esp/rsp
base register being specified last in a memory operand.
2012-07-24 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register):

16
gas/config/tc-i386-intel.c
View File

@ -278,10 +278,24 @@ i386_intel_simplify_register (expressionS *e)
}
i.op[this_operand].regs = i386_regtab + reg_num;
}
else if (!intel_state.index
&& (i386_regtab[reg_num].reg_type.bitfield.regxmm
|| i386_regtab[reg_num].reg_type.bitfield.regymm))
intel_state.index = i386_regtab + reg_num;
else if (!intel_state.base && !intel_state.in_scale)
intel_state.base = i386_regtab + reg_num;
else if (!intel_state.index)
intel_state.index = i386_regtab + reg_num;
{
if (intel_state.in_scale
|| i386_regtab[reg_num].reg_type.bitfield.baseindex)
intel_state.index = i386_regtab + reg_num;
else
{
/* Convert base to index and make ESP/RSP the base. */
intel_state.index = intel_state.base;
intel_state.base = i386_regtab + reg_num;
}
}
else
{
/* esp is invalid as index */