2005-08-05 Paul Brook <paul@codesourcery.com>

gas/
	* config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
	constants.
	(encode_thumb32_shifted_operand): Prohibit register shifts.
	(encode_thumb32_addr_mode): Fix typo.
	(insns): Correct thumb2 ldm and stm opcodes.
gas/testsuite/
	* gas/arm/thumb32.d: Update ldm/stm dests.
	* gas/arm/thumb32.s: Ditto.
This commit is contained in:
Paul Brook
2005-08-05 12:26:30 +00:00
parent 827a1c67ae
commit 9c3c69f2f1
5 changed files with 34 additions and 13 deletions

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@ -1,3 +1,11 @@
2005-08-05 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
constants.
(encode_thumb32_shifted_operand): Prohibit register shifts.
(encode_thumb32_addr_mode): Fix typo.
(insns): Correct thumb2 ldm and stm opcodes.
2005-08-02 Khem Raj <kraj@mvista.com>
* config/tc-arm.c (do_iwmmxt_wldstd): Correct the offset range for

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@ -3989,14 +3989,14 @@ encode_thumb32_immediate (unsigned int val)
{
unsigned int a, i;
if (val <= 255)
if (val <= 0xff)
return val;
for (i = 0; i < 32; i++)
for (i = 1; i <= 24; i++)
{
a = rotate_left (val, i);
if (a >= 128 && a <= 255)
return (a & 0x7f) | (i << 7);
a = val >> i;
if ((val & ~(0xff << i)) == 0)
return ((val >> i) & 0x7f) | ((32 - i) << 7);
}
a = val & 0xff;
@ -5637,6 +5637,8 @@ encode_thumb32_shifted_operand (int i)
unsigned int value = inst.reloc.exp.X_add_number;
unsigned int shift = inst.operands[i].shift_kind;
constraint (inst.operands[i].immisreg,
_("shift by register not allowed in thumb mode"));
inst.instruction |= inst.operands[i].reg;
if (shift == SHIFT_RRX)
inst.instruction |= SHIFT_ROR << 4;
@ -5695,9 +5697,10 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
{
constraint (inst.reloc.exp.X_op != O_constant,
_("expression too complex"));
constraint (inst.reloc.exp.X_add_number < 0 || inst.reloc.exp.X_add_number > 3,
constraint (inst.reloc.exp.X_add_number < 0
|| inst.reloc.exp.X_add_number > 3,
_("shift out of range"));
inst.instruction |= inst.reloc.exp.X_op << 4;
inst.instruction |= inst.reloc.exp.X_add_number << 4;
}
inst.reloc.type = BFD_RELOC_UNUSED;
}
@ -8268,11 +8271,11 @@ static const struct asm_opcode insns[] =
TC3(strt, 4200000, f8400e00, 2, (RR, ADDR), ldstt, t_ldstt),
TC3(strbt, 4600000, f8200e00, 2, (RR, ADDR), ldstt, t_ldstt),
TC3(stmdb, 9000000, e9100000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(stmfd, 9000000, e9100000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(stmdb, 9000000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(stmfd, 9000000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(ldmdb, 9100000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(ldmea, 9100000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(ldmdb, 9100000, e9100000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TC3(ldmea, 9100000, e9100000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
/* V1 instructions with no Thumb analogue at all. */
CE(rsc, 0e00000, 3, (RR, oRR, SH), arit),

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@ -1,3 +1,8 @@
2005-08-05 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb32.d: Update ldm/stm dests.
* gas/arm/thumb32.s: Ditto.
2005-08-03 Nick Clifton <nickc@redhat.com>
* gas/arm/iwmmxt-bad2.s: New file: Check for error messages about

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@ -634,8 +634,8 @@ Disassembly of section .text:
0+79a <[^>]+> e889 0007 stmia\.w r9, \{r0, r1, r2\}
0+79e <[^>]+> e880 0580 stmia\.w r0, \{r7, r8, sl\}
0+7a2 <[^>]+> e8a0 0580 stmia\.w r0!, \{r7, r8, sl\}
0+7a6 <[^>]+> e900 0580 stmdb r0, \{r7, r8, sl\}
0+7aa <[^>]+> e910 0580 ldmdb r0, \{r7, r8, sl\}
0+7a6 <[^>]+> e910 0580 ldmdb r0, \{r7, r8, sl\}
0+7aa <[^>]+> e900 0580 stmdb r0, \{r7, r8, sl\}
0+7ae <[^>]+> fb00 0000 mla r0, r0, r0, r0
0+7b2 <[^>]+> fb00 0010 mls r0, r0, r0, r0
0+7b6 <[^>]+> fb00 0900 mla r9, r0, r0, r0
@ -1021,3 +1021,5 @@ Disassembly of section .text:
0+d1c <[^>]+> e8d0 f018 tbh \[r0, r8, lsl #1\]
0+d20 <[^>]+> f84d 8d04 str.w r8, \[sp, #-4\]!
0+d24 <[^>]+> f85d 8b04 ldr.w r8, \[sp\], #4
0+d28 <[^>]+> e930 0580 ldmdb r0!, \{r7, r8, sl\}
0+d2c <[^>]+> e920 0580 stmdb r0!, \{r7, r8, sl\}

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@ -756,3 +756,6 @@ xta:
push {r8}
pop {r8}
ldmdb r0!, {r7,r8,r10}
stmdb r0!, {r7,r8,r10}