cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions

The eBPF non-generic load instructions ldind{b,h,w,dw} and ldabs{b,h,w,dw} do not take an explicit destination register as an argument. Instead, they put the loaded value in %r0, implicitly. This patch fixes the CPU BPF description to not expect a 'dst' argument in these arguments, regenerates the corresponding files in opcodes, and updates the impacted GAS tests. Tested in a x86-64 host. cpu/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (dlsi): ldabs and ldind instructions do not take an explicit 'dst' argument. opcodes/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-desc.c: Regenerate. * bpf-opc.c: Likewise. gas/ChangeLog: 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/mem.s: Do not use explicit arguments for ldabs and ldind instructions. * testsuite/gas/bpf/mem.d: Updated accordingly. * testsuite/gas/bpf/mem-be.d: Likewise.
2025-05-31 10:09:16 +08:00 · 2019-07-14 14:45:31 +02:00
parent da73816739
commit 92434a14b9
9 changed files with 91 additions and 74 deletions
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@ -1,3 +1,8 @@
+2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* bpf.cpu (dlsi): ldabs and ldind instructions do not take an
+	explicit 'dst' argument.
+
 2019-06-13  Stafford Horne  <shorne@gmail.com>

 	* or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
--- a/cpu/bpf.cpu
+++ b/cpu/bpf.cpu
@ -477,8 +477,8 @@
  (dni (.sym x-basename x-suffix x-endian)
       (.str x-basename x-suffix)
       ((ISA (.sym ebpf x-endian)))
-       (.str x-basename x-suffix " $dst" x-endian ",$src" x-endian ",$imm32")
-       (+ imm32 (f-offset16 0) (.sym src x-endian) (.sym dst x-endian)
+       (.str x-basename x-suffix " $src" x-endian ",$imm32")
+       (+ imm32 (f-offset16 0) ((.sym f-dst x-endian) 0) (.sym src x-endian)
          (.sym OP_CLASS_ x-class) (.sym OP_SIZE_ x-size)
          (.sym OP_MODE_ x-mode)) () ()))

--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@ -1,3 +1,10 @@
+2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/bpf/mem.s: Do not use explicit arguments for
+	ldabs and ldind instructions.
+	* testsuite/gas/bpf/mem.d: Updated accordingly.
+	* testsuite/gas/bpf/mem-be.d: Likewise.
+
 2019-07-09  Alan Modra  <amodra@gmail.com>

 	* config/obj-elf.c (elf_frob_symbol): Remove mips hacks.
--- a/gas/testsuite/gas/bpf/mem-be.d
+++ b/gas/testsuite/gas/bpf/mem-be.d
@ -8,14 +8,14 @@
 Disassembly of section .text:

 0+ <.text>:
-   0:	20 23 00 00 00 00 be ef 	ldabsw %r2,%r3,0xbeef
-   8:	28 45 00 00 00 00 be ef 	ldabsh %r4,%r5,0xbeef
-  10:	30 67 00 00 00 00 be ef 	ldabsb %ctx,%r7,0xbeef
-  18:	38 89 00 00 00 00 be ef 	ldabsdw %r8,%r9,0xbeef
-  20:	40 23 00 00 00 00 be ef 	ldindw %r2,%r3,0xbeef
-  28:	48 45 00 00 00 00 be ef 	ldindh %r4,%r5,0xbeef
-  30:	50 67 00 00 00 00 be ef 	ldindb %ctx,%r7,0xbeef
-  38:	58 89 00 00 00 00 be ef 	ldinddw %r8,%r9,0xbeef
+   0:	20 03 00 00 00 00 be ef 	ldabsw %r3,0xbeef
+   8:	28 05 00 00 00 00 be ef 	ldabsh %r5,0xbeef
+  10:	30 07 00 00 00 00 be ef 	ldabsb %r7,0xbeef
+  18:	38 09 00 00 00 00 be ef 	ldabsdw %r9,0xbeef
+  20:	40 03 00 00 00 00 be ef 	ldindw %r3,0xbeef
+  28:	48 05 00 00 00 00 be ef 	ldindh %r5,0xbeef
+  30:	50 07 00 00 00 00 be ef 	ldindb %r7,0xbeef
+  38:	58 09 00 00 00 00 be ef 	ldinddw %r9,0xbeef
  40:	61 21 7e ef 00 00 00 00 	ldxw %r2,\[%r1\+0x7eef\]
  48:	69 21 7e ef 00 00 00 00 	ldxh %r2,\[%r1\+0x7eef\]
  50:	71 21 7e ef 00 00 00 00 	ldxb %r2,\[%r1\+0x7eef\]
--- a/gas/testsuite/gas/bpf/mem.d
+++ b/gas/testsuite/gas/bpf/mem.d
@ -7,14 +7,14 @@
 Disassembly of section .text:

 0+ <.text>:
-   0:	20 32 00 00 ef be 00 00 	ldabsw %r2,%r3,0xbeef
-   8:	28 54 00 00 ef be 00 00 	ldabsh %r4,%r5,0xbeef
-  10:	30 76 00 00 ef be 00 00 	ldabsb %ctx,%r7,0xbeef
-  18:	38 98 00 00 ef be 00 00 	ldabsdw %r8,%r9,0xbeef
-  20:	40 32 00 00 ef be 00 00 	ldindw %r2,%r3,0xbeef
-  28:	48 54 00 00 ef be 00 00 	ldindh %r4,%r5,0xbeef
-  30:	50 76 00 00 ef be 00 00 	ldindb %ctx,%r7,0xbeef
-  38:	58 98 00 00 ef be 00 00 	ldinddw %r8,%r9,0xbeef
+   0:	20 30 00 00 ef be 00 00 	ldabsw %r3,0xbeef
+   8:	28 50 00 00 ef be 00 00 	ldabsh %r5,0xbeef
+  10:	30 70 00 00 ef be 00 00 	ldabsb %r7,0xbeef
+  18:	38 90 00 00 ef be 00 00 	ldabsdw %r9,0xbeef
+  20:	40 30 00 00 ef be 00 00 	ldindw %r3,0xbeef
+  28:	48 50 00 00 ef be 00 00 	ldindh %r5,0xbeef
+  30:	50 70 00 00 ef be 00 00 	ldindb %r7,0xbeef
+  38:	58 90 00 00 ef be 00 00 	ldinddw %r9,0xbeef
  40:	61 12 ef 7e 00 00 00 00 	ldxw %r2,\[%r1\+0x7eef\]
  48:	69 12 ef 7e 00 00 00 00 	ldxh %r2,\[%r1\+0x7eef\]
  50:	71 12 ef 7e 00 00 00 00 	ldxb %r2,\[%r1\+0x7eef\]
--- a/gas/testsuite/gas/bpf/mem.s
+++ b/gas/testsuite/gas/bpf/mem.s
@ -2,14 +2,14 @@

        .text

- 	ldabsw %r2, %r3, 0xbeef
-	ldabsh %r4, %r5, 0xbeef
- 	ldabsb %r6, %r7, 0xbeef
- 	ldabsdw %r8, %r9, 0xbeef
-	ldindw %r2, %r3, 0xbeef
- 	ldindh %r4, %r5, 0xbeef
- 	ldindb %r6, %r7, 0xbeef
- 	ldinddw %r8, %r9, 0xbeef
+ 	ldabsw %r3, 0xbeef
+	ldabsh %r5, 0xbeef
+ 	ldabsb %r7, 0xbeef
+ 	ldabsdw %r9, 0xbeef
+	ldindw %r3, 0xbeef
+ 	ldindh %r5, 0xbeef
+ 	ldindb %r7, 0xbeef
+ 	ldinddw %r9, 0xbeef
 	ldxw %r2, [%r1+0x7eef]
 	ldxh %r2, [%r1+0x7eef]
 	ldxb %r2, [%r1+0x7eef]
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@ -1,3 +1,8 @@
+2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* bpf-desc.c: Regenerate.
+	* bpf-opc.c: Likewise.
+
 2019-07-10  Hans-Peter Nilsson  <hp@bitrange.com>

 	* arm-dis.c (print_insn_coprocessor): Rename index to
--- a/opcodes/bpf-desc.c
+++ b/opcodes/bpf-desc.c
@ -824,82 +824,82 @@ static const CGEN_IBASE bpf_cgen_insn_table[MAX_INSNS] =
    BPF_INSN_LDDWBE, "lddwbe", "lddw", 128,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldabsw $dstle,$srcle,$imm32 */
+/* ldabsw $srcle,$imm32 */
  {
    BPF_INSN_LDABSWLE, "ldabswle", "ldabsw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldabsh $dstle,$srcle,$imm32 */
+/* ldabsh $srcle,$imm32 */
  {
    BPF_INSN_LDABSHLE, "ldabshle", "ldabsh", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldabsb $dstle,$srcle,$imm32 */
+/* ldabsb $srcle,$imm32 */
  {
    BPF_INSN_LDABSBLE, "ldabsble", "ldabsb", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldabsdw $dstle,$srcle,$imm32 */
+/* ldabsdw $srcle,$imm32 */
  {
    BPF_INSN_LDABSDWLE, "ldabsdwle", "ldabsdw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldindw $dstle,$srcle,$imm32 */
+/* ldindw $srcle,$imm32 */
  {
    BPF_INSN_LDINDWLE, "ldindwle", "ldindw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldindh $dstle,$srcle,$imm32 */
+/* ldindh $srcle,$imm32 */
  {
    BPF_INSN_LDINDHLE, "ldindhle", "ldindh", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldindb $dstle,$srcle,$imm32 */
+/* ldindb $srcle,$imm32 */
  {
    BPF_INSN_LDINDBLE, "ldindble", "ldindb", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldinddw $dstle,$srcle,$imm32 */
+/* ldinddw $srcle,$imm32 */
  {
    BPF_INSN_LDINDDWLE, "ldinddwle", "ldinddw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }
  },
-/* ldabsw $dstbe,$srcbe,$imm32 */
+/* ldabsw $srcbe,$imm32 */
  {
    BPF_INSN_LDABSWBE, "ldabswbe", "ldabsw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldabsh $dstbe,$srcbe,$imm32 */
+/* ldabsh $srcbe,$imm32 */
  {
    BPF_INSN_LDABSHBE, "ldabshbe", "ldabsh", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldabsb $dstbe,$srcbe,$imm32 */
+/* ldabsb $srcbe,$imm32 */
  {
    BPF_INSN_LDABSBBE, "ldabsbbe", "ldabsb", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldabsdw $dstbe,$srcbe,$imm32 */
+/* ldabsdw $srcbe,$imm32 */
  {
    BPF_INSN_LDABSDWBE, "ldabsdwbe", "ldabsdw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldindw $dstbe,$srcbe,$imm32 */
+/* ldindw $srcbe,$imm32 */
  {
    BPF_INSN_LDINDWBE, "ldindwbe", "ldindw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldindh $dstbe,$srcbe,$imm32 */
+/* ldindh $srcbe,$imm32 */
  {
    BPF_INSN_LDINDHBE, "ldindhbe", "ldindh", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldindb $dstbe,$srcbe,$imm32 */
+/* ldindb $srcbe,$imm32 */
  {
    BPF_INSN_LDINDBBE, "ldindbbe", "ldindb", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
  },
-/* ldinddw $dstbe,$srcbe,$imm32 */
+/* ldinddw $srcbe,$imm32 */
  {
    BPF_INSN_LDINDDWBE, "ldinddwbe", "ldinddw", 64,
    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x40" } } } }
--- a/opcodes/bpf-opc.c
+++ b/opcodes/bpf-opc.c
@ -792,100 +792,100 @@ static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] =
    { { MNEM, ' ', OP (DSTBE), ',', OP (IMM64), 0 } },
    & ifmt_lddwbe, { 0x18 }
  },
-/* ldabsw $dstle,$srcle,$imm32 */
+/* ldabsw $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x20 }
  },
-/* ldabsh $dstle,$srcle,$imm32 */
+/* ldabsh $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x28 }
  },
-/* ldabsb $dstle,$srcle,$imm32 */
+/* ldabsb $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x30 }
  },
-/* ldabsdw $dstle,$srcle,$imm32 */
+/* ldabsdw $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x38 }
  },
-/* ldindw $dstle,$srcle,$imm32 */
+/* ldindw $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x40 }
  },
-/* ldindh $dstle,$srcle,$imm32 */
+/* ldindh $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x48 }
  },
-/* ldindb $dstle,$srcle,$imm32 */
+/* ldindb $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x50 }
  },
-/* ldinddw $dstle,$srcle,$imm32 */
+/* ldinddw $srcle,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswle, { 0x58 }
  },
-/* ldabsw $dstbe,$srcbe,$imm32 */
+/* ldabsw $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x20 }
  },
-/* ldabsh $dstbe,$srcbe,$imm32 */
+/* ldabsh $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x28 }
  },
-/* ldabsb $dstbe,$srcbe,$imm32 */
+/* ldabsb $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x30 }
  },
-/* ldabsdw $dstbe,$srcbe,$imm32 */
+/* ldabsdw $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x38 }
  },
-/* ldindw $dstbe,$srcbe,$imm32 */
+/* ldindw $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x40 }
  },
-/* ldindh $dstbe,$srcbe,$imm32 */
+/* ldindh $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x48 }
  },
-/* ldindb $dstbe,$srcbe,$imm32 */
+/* ldindb $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x50 }
  },
-/* ldinddw $dstbe,$srcbe,$imm32 */
+/* ldinddw $srcbe,$imm32 */
  {
    { 0, 0, 0, 0 },
-    { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (IMM32), 0 } },
+    { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
    & ifmt_ldabswbe, { 0x58 }
  },
 /* ldxw $dstle,[$srcle+$offset16] */