mirror of
https://github.com/espressif/binutils-gdb.git
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x86-64: also diagnose far returns / IRET with ambiguous operand size
Other than near returns these default to 32-bit operand size, and hence it isn't really unlikely that 64-bit forms are meant. Hence these should have disambiguating suffixes. In Intel mode, however, don't error in these cases unconditionally - MASM accepts these without suffix _and_ without warning.
This commit is contained in:
Jan Beulich
@ -1,3 +1,22 @@
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2020-01-30 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_suffix): .
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testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
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testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
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Add LRETQ case.
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testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
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suffix.
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testsuite/gas/i386/x86_64.s: Add RETF cases.
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* testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
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testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
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testsuite/gas/i386/x86-64-opcode.d,
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testsuite/gas/i386/x86-64-suffix-intel.d,
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testsuite/gas/i386/x86-64-suffix.d,
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testsuite/gas/i386/x86_64-intel.d
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testsuite/gas/i386/x86_64.d: Adjust expectations.
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* testsuite/gas/i386/x86-64-suffix.e,
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testsuite/gas/i386/x86_64.e: New.
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2020-01-30 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_suffix): Redo and move FLDENV et al
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@ -6417,7 +6417,11 @@ process_suffix (void)
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}
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if (!i.suffix
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&& !i.tm.opcode_modifier.defaultsize
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&& (!i.tm.opcode_modifier.defaultsize
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/* Also cover lret/retf/iret in 64-bit mode. */
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|| (flag_code == CODE_64BIT
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&& !i.tm.opcode_modifier.no_lsuf
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&& !i.tm.opcode_modifier.no_qsuf))
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&& !i.tm.opcode_modifier.ignoresize
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/* Accept FLDENV et al without suffix. */
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&& (i.tm.opcode_modifier.no_ssuf || i.tm.opcode_modifier.floatmf))
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@ -6439,7 +6443,9 @@ process_suffix (void)
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/* Are multiple suffixes allowed? */
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if (suffixes & (suffixes - 1))
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{
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if (intel_syntax)
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if (intel_syntax
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&& (!i.tm.opcode_modifier.defaultsize
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|| operand_check == check_error))
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{
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as_bad (_("ambiguous operand size for `%s'"), i.tm.name);
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return 0;
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@ -6451,9 +6457,12 @@ process_suffix (void)
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return 0;
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}
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if (operand_check == check_warning)
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as_warn (_("no instruction mnemonic suffix given and "
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"no register operands; using default for `%s'"),
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i.tm.name);
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as_warn (_("%s; using default for `%s'"),
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intel_syntax
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? _("ambiguous operand size")
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: _("no instruction mnemonic suffix given and "
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"no register operands"),
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i.tm.name);
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if (i.tm.opcode_modifier.floatmf)
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i.suffix = SHORT_MNEM_SUFFIX;
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@ -2,6 +2,7 @@
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#as: -J -march=k1om
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#objdump: -dw
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#name: k1om
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#warning_output: x86_64.e
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#notarget: *-*-nacl*
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.*: +file format elf64-k1om.*
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@ -54,7 +55,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
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[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
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[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
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[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
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[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
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[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
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[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
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@ -86,10 +87,10 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
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[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
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[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
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[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
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[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
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[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
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[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
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[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
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[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
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[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
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@ -106,8 +107,16 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
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[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
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[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
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[ ]*[a-f0-9]+: cb lret *
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[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
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[ ]*[a-f0-9]+: 66 cb lretw *
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[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
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[ ]*[a-f0-9]+: cb lret *
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[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
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[ ]*[a-f0-9]+: 48 cb lretq *
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[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
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0+1a7 <bar>:
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[0-9a-f]+ <bar>:
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[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
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[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
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[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
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@ -115,7 +124,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <bar\+0x[0-9a-f]+>
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[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
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[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
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[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
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@ -123,9 +132,9 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <foo>
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0+203 <foo>:
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[0-9a-f]+ <foo>:
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
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[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
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@ -2,6 +2,7 @@
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#as: -J -march=l1om
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#objdump: -dw --insn-width=7
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#name: l1om
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#warning_output: x86_64.e
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#notarget: *-*-nacl*
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.*: +file format elf64-l1om.*
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@ -54,7 +55,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
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[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
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[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
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[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
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[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
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[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
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[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
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@ -86,10 +87,10 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
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[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
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[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
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[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
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[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
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[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
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[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
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[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
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[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
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[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
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[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
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@ -106,8 +107,16 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
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[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
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[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
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[ ]*[a-f0-9]+: cb lret *
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[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
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[ ]*[a-f0-9]+: 66 cb lretw *
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[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
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[ ]*[a-f0-9]+: cb lret *
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[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
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[ ]*[a-f0-9]+: 48 cb lretq *
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[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
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0+1a7 <bar>:
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[0-9a-f]+ <bar>:
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[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
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[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
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[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
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@ -115,7 +124,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <bar\+0x[0-9a-f]+>
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[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
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[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
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[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
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@ -123,9 +132,9 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <foo>
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0+203 <foo>:
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[0-9a-f]+ <foo>:
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
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[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
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@ -66,6 +66,7 @@ Disassembly of section .text:
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*[a-f0-9]+: ff 00 incl \(%rax\)
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*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
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*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
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*[a-f0-9]+: cf iret *
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*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
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*[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
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*[a-f0-9]+: 0f 01 18 lidt \(%rax\)
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@ -73,6 +74,8 @@ Disassembly of section .text:
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||||
*[a-f0-9]+: 0f 01 30 lmsw \(%rax\)
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*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
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*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
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*[a-f0-9]+: cb lret *
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*[a-f0-9]+: ca 04 00 lret \$0x4
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*[a-f0-9]+: 0f 00 18 ltr \(%rax\)
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||||
*[a-f0-9]+: c7 00 12 00 00 00 movl \$0x12,\(%rax\)
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||||
*[a-f0-9]+: c7 00 34 12 00 00 movl \$0x1234,\(%rax\)
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||||
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||||
@ -57,8 +57,11 @@
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.*:[1-9][0-9]*: Warning: .* `inc'
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||||
.*:[1-9][0-9]*: Warning: .* `ins'
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||||
.*:[1-9][0-9]*: Warning: .* `ins'
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||||
.*:[1-9][0-9]*: Warning: .* `iret'
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.*:[1-9][0-9]*: Warning: .* `lods'
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||||
.*:[1-9][0-9]*: Warning: .* `lods'
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.*:[1-9][0-9]*: Warning: .* `lret'
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.*:[1-9][0-9]*: Warning: .* `lret'
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.*:[1-9][0-9]*: Warning: .* `mov'
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.*:[1-9][0-9]*: Warning: .* `mov'
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.*:[1-9][0-9]*: Warning: .* `mov'
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@ -59,6 +59,7 @@ noreg:
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inc (%rax)
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ins
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||||
ins %dx, %es:(%rdi)
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iret
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jmp *(%rax)
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lgdt (%rax)
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lidt (%rax)
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@ -66,6 +67,8 @@ noreg:
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lmsw (%rax)
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lods
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lods (%rsi)
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||||
lret
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||||
lret $4
|
||||
ltr (%rax)
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||||
mov $0x12, (%rax)
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||||
mov $0x1234, (%rax)
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||||
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@ -12,6 +12,7 @@ Disassembly of section .text:
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||||
[ ]*[a-f0-9]+: 41 ff 10 callq \*\(%r8\)
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||||
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
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||||
[ ]*[a-f0-9]+: cb lret
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||||
[ ]*[a-f0-9]+: 48 cb lretq *
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[ ]*[a-f0-9]+: c3 retq
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||||
[ ]*[a-f0-9]+: cf iret
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||||
[ ]*[a-f0-9]+: 66 cf iretw
|
||||
|
||||
@ -9,11 +9,12 @@
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||||
CALLq *(%rax) # -- -- -- -- FF 10
|
||||
|
||||
# RET
|
||||
lret # -- -- -- -- CB
|
||||
lretl # -- -- -- -- CB
|
||||
lretq # -- -- -- 48 CB
|
||||
retq # -- -- -- -- C3
|
||||
|
||||
# IRET
|
||||
IRET # -- -- -- -- CF ; 32-bit operand size
|
||||
IRETL # -- -- -- -- CF ; 32-bit operand size
|
||||
IRETW # 66 -- -- -- CF ; O16 for 16-bit operand size
|
||||
IRETQ # -- -- -- 48 CF ; REX for 64-bit operand size
|
||||
|
||||
|
||||
@ -1,6 +1,7 @@
|
||||
#source: x86-64-suffix.s
|
||||
#objdump: -dw -Msuffix,intel
|
||||
#name: x86-64 suffix (Intel mode)
|
||||
#warning_output: x86-64-suffix.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
@ -15,7 +16,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
|
||||
[ ]*[a-f0-9]+: 66 cf iretw
|
||||
[ ]*[a-f0-9]+: cf iretd
|
||||
[ ]*[a-f0-9]+: cf iretd
|
||||
[ ]*[a-f0-9]+: 48 cf iretq
|
||||
[ ]*[a-f0-9]+: 0f 07 sysretd
|
||||
[ ]*[a-f0-9]+: 48 0f 07 sysretq
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
#objdump: -dwMsuffix
|
||||
#name: x86-64 suffix (AT&T mode)
|
||||
#warning_output: x86-64-suffix.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
@ -14,7 +15,6 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
|
||||
[ ]*[a-f0-9]+: 66 cf iretw
|
||||
[ ]*[a-f0-9]+: cf iretl
|
||||
[ ]*[a-f0-9]+: cf iretl
|
||||
[ ]*[a-f0-9]+: 48 cf iretq
|
||||
[ ]*[a-f0-9]+: 0f 07 sysretl
|
||||
[ ]*[a-f0-9]+: 48 0f 07 sysretq
|
||||
|
||||
2
gas/testsuite/gas/i386/x86-64-suffix.e
Normal file
2
gas/testsuite/gas/i386/x86-64-suffix.e
Normal file
@ -0,0 +1,2 @@
|
||||
.*: Assembler messages:
|
||||
.*:[1-9][0-9]*: Warning: .* `iret'
|
||||
@ -12,7 +12,6 @@ foo:
|
||||
|
||||
iretw
|
||||
iretl
|
||||
iret
|
||||
iretq
|
||||
sysretl
|
||||
sysretq
|
||||
|
||||
@ -2,6 +2,7 @@
|
||||
#as: -J
|
||||
#objdump: -dw -Mintel
|
||||
#name: x86-64 (Intel mode)
|
||||
#warning_output: x86_64.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
@ -52,7 +53,7 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 41 03 00 add eax,DWORD PTR \[r8\]
|
||||
[ ]*[a-f0-9]+: 45 03 00 add r8d,DWORD PTR \[r8\]
|
||||
[ ]*[a-f0-9]+: 49 03 00 add rax,QWORD PTR \[r8\]
|
||||
[ ]*[a-f0-9]+: 03 05 22 22 22 22 add eax,DWORD PTR \[rip\+0x22222222\] # 222222c7 <foo\+0x222220c4>
|
||||
[ ]*[a-f0-9]+: 03 05 22 22 22 22 add eax,DWORD PTR \[rip\+0x22222222\] # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 03 45 00 add eax,DWORD PTR \[rbp\+0x0\]
|
||||
[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add eax,DWORD PTR ds:0x22222222
|
||||
[ ]*[a-f0-9]+: 41 03 45 00 add eax,DWORD PTR \[r13\+0x0\]
|
||||
@ -84,10 +85,10 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 83 04 81 11 add DWORD PTR \[rcx\+rax\*4\],0x11
|
||||
[ ]*[a-f0-9]+: 41 83 04 81 11 add DWORD PTR \[r9\+rax\*4\],0x11
|
||||
[ ]*[a-f0-9]+: 42 83 04 81 11 add DWORD PTR \[rcx\+r8\*4\],0x11
|
||||
[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 add DWORD PTR \[rip\+0x22222222\],0x33 # 22222342 <foo\+0x2222213f>
|
||||
[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 add QWORD PTR \[rip\+0x22222222\],0x33 # 2222234a <foo\+0x22222147>
|
||||
[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 add DWORD PTR \[rip\+0x22222222\],0x33333333 # 22222354 <foo\+0x22222151>
|
||||
[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 add QWORD PTR \[rip\+0x22222222\],0x33333333 # 2222235f <foo\+0x2222215c>
|
||||
[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 add DWORD PTR \[rip\+0x22222222\],0x33 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 add QWORD PTR \[rip\+0x22222222\],0x33 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 add DWORD PTR \[rip\+0x22222222\],0x33333333 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 add QWORD PTR \[rip\+0x22222222\],0x33333333 # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 add DWORD PTR \[rax\*8\+0x22222222\],0x33
|
||||
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 add DWORD PTR \[rax\+0x22222222\],0x33
|
||||
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 add DWORD PTR \[rax\+0x22222222\],0x33
|
||||
@ -104,8 +105,16 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 48 63 c0 movsxd rax,eax
|
||||
[ ]*[a-f0-9]+: 48 0f bf c0 movsx rax,ax
|
||||
[ ]*[a-f0-9]+: 48 0f be c0 movsx rax,al
|
||||
[ ]*[a-f0-9]+: cb retf *
|
||||
[ ]*[a-f0-9]+: ca 10 00 retf 0x10
|
||||
[ ]*[a-f0-9]+: 66 cb retfw *
|
||||
[ ]*[a-f0-9]+: 66 ca 02 00 retfw 0x2
|
||||
[ ]*[a-f0-9]+: cb retf *
|
||||
[ ]*[a-f0-9]+: ca 04 00 retf 0x4
|
||||
[ ]*[a-f0-9]+: 48 cb rex\.W retf *
|
||||
[ ]*[a-f0-9]+: 48 ca 08 00 rex\.W retf 0x8
|
||||
|
||||
0+1a7 <bar>:
|
||||
[0-9a-f]+ <bar>:
|
||||
[ ]*[a-f0-9]+: b0 00 mov al,0x0
|
||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov ax,0x0
|
||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov eax,0x0
|
||||
@ -113,7 +122,7 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs eax,ds:0x0
|
||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov eax,DWORD PTR ds:0x0
|
||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov eax,DWORD PTR \[rax\+0x0\]
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # 1d5 <bar\+0x2e>
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # [0-9a-f]+ <bar\+0x[0-9a-f]+>
|
||||
[ ]*[a-f0-9]+: b0 00 mov al,0x0
|
||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov ax,0x0
|
||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov eax,0x0
|
||||
@ -121,9 +130,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs eax,ds:0x0
|
||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov eax,DWORD PTR ds:0x0
|
||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov eax,DWORD PTR \[rax\+0x0\]
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # 203 <foo>
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov eax,DWORD PTR \[rip\+0x0\] # [0-9a-f]+ <foo>
|
||||
|
||||
0+203 <foo>:
|
||||
[0-9a-f]+ <foo>:
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs al,ds:0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs ax,ds:0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs eax,ds:0x8877665544332211
|
||||
|
||||
@ -1,6 +1,8 @@
|
||||
#as: -J
|
||||
#objdump: -dw
|
||||
#name: x86_64
|
||||
#warning_output: x86_64.e
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
@ -51,7 +53,7 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
|
||||
[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
|
||||
[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
|
||||
[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
|
||||
[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
|
||||
[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
|
||||
[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
|
||||
@ -83,10 +85,10 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
|
||||
[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
|
||||
[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
|
||||
[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
|
||||
[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
|
||||
[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
|
||||
[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
|
||||
[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222[0-9a-f]* <foo\+0x2222[0-9a-f]*>
|
||||
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
|
||||
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
|
||||
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
|
||||
@ -103,8 +105,16 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
|
||||
[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
|
||||
[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
|
||||
[ ]*[a-f0-9]+: cb lret *
|
||||
[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
|
||||
[ ]*[a-f0-9]+: 66 cb lretw *
|
||||
[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
|
||||
[ ]*[a-f0-9]+: cb lret *
|
||||
[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
|
||||
[ ]*[a-f0-9]+: 48 cb lretq *
|
||||
[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
|
||||
|
||||
0+1a7 <bar>:
|
||||
[0-9a-f]+ <bar>:
|
||||
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
|
||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
||||
@ -112,7 +122,7 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <bar\+0x[0-9a-f]+>
|
||||
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
|
||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
||||
@ -120,9 +130,9 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # [0-9a-f]+ <foo>
|
||||
|
||||
0+203 <foo>:
|
||||
[0-9a-f]+ <foo>:
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
|
||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
|
||||
|
||||
3
gas/testsuite/gas/i386/x86_64.e
Normal file
3
gas/testsuite/gas/i386/x86_64.e
Normal file
@ -0,0 +1,3 @@
|
||||
.*: Assembler messages:
|
||||
.*:[1-9][0-9]*: Warning: .* `retf'
|
||||
.*:[1-9][0-9]*: Warning: .* `retf'
|
||||
@ -99,6 +99,14 @@ cdqe
|
||||
movsx rax, eax
|
||||
movsx rax, ax
|
||||
movsx rax, al
|
||||
retf
|
||||
retf 16
|
||||
retfw
|
||||
retfw 2
|
||||
retfd
|
||||
retfd 4
|
||||
retfq
|
||||
retfq 8
|
||||
bar:
|
||||
.att_syntax
|
||||
#testcase for symbol references.
|
||||
|
||||
Reference in New Issue
Block a user