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https://github.com/espressif/binutils-gdb.git
synced 2025-06-23 03:29:47 +08:00
Don't allow movabs with relocation in x32 mode.
gas/ 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (disallow_64bit_disp): New. (x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with X86_64_ABI/X86_64_X32_ABI. (md_assemble): Don't allow movabs with relocation in x32 mode. (i386_target_format): Updated. gas/testsuite/ 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/ilp32.exp: Run inval. * gas/i386/ilp32/inval.l: New. * gas/i386/ilp32/inval.s: Likewise. * gas/i386/ilp32/x86-64.s: Likewise. * gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s. Updated.
This commit is contained in:
H.J. Lu
@ -1,3 +1,11 @@
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2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (disallow_64bit_disp): New.
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(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
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X86_64_ABI/X86_64_X32_ABI.
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(md_assemble): Don't allow movabs with relocation in x32 mode.
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(i386_target_format): Updated.
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2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (OPTION_N32): Renamed to ...
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* config/tc-i386.c (OPTION_N32): Renamed to ...
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@ -389,6 +389,7 @@ enum flag_code {
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static enum flag_code flag_code;
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static enum flag_code flag_code;
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static unsigned int object_64bit;
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static unsigned int object_64bit;
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static unsigned int disallow_64bit_disp;
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static int use_rela_relocations = 0;
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static int use_rela_relocations = 0;
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#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
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#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
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@ -399,8 +400,8 @@ static int use_rela_relocations = 0;
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enum x86_elf_abi
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enum x86_elf_abi
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{
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{
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I386_ABI,
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I386_ABI,
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X86_64_LP64_ABI,
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X86_64_ABI,
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X86_64_ILP32_ABI
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X86_64_X32_ABI
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};
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};
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static enum x86_elf_abi x86_elf_abi = I386_ABI;
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static enum x86_elf_abi x86_elf_abi = I386_ABI;
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@ -3005,10 +3006,21 @@ md_assemble (char *line)
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/* Don't optimize displacement for movabs since it only takes 64bit
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/* Don't optimize displacement for movabs since it only takes 64bit
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displacement. */
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displacement. */
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if (i.disp_operands
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if (i.disp_operands
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&& !i.disp32_encoding
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&& !i.disp32_encoding)
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&& (flag_code != CODE_64BIT
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{
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|| strcmp (mnemonic, "movabs") != 0))
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if (flag_code == CODE_64BIT)
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{
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if (strcmp (mnemonic, "movabs") == 0)
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{
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if (disallow_64bit_disp)
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as_bad (_("'movabs' isn't supported in x32 mode"));
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}
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else
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optimize_disp ();
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optimize_disp ();
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}
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else
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optimize_disp ();
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}
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/* Next, we find a template that matches the given insn,
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/* Next, we find a template that matches the given insn,
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making sure the overlap of the given operands types is consistent
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making sure the overlap of the given operands types is consistent
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@ -8575,9 +8587,9 @@ i386_target_format (void)
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{
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{
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update_code_flag (CODE_64BIT, 1);
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update_code_flag (CODE_64BIT, 1);
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if (default_arch[6] == '\0')
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if (default_arch[6] == '\0')
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x86_elf_abi = X86_64_LP64_ABI;
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x86_elf_abi = X86_64_ABI;
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else
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else
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x86_elf_abi = X86_64_ILP32_ABI;
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x86_elf_abi = X86_64_X32_ABI;
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}
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}
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else if (!strcmp (default_arch, "i386"))
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else if (!strcmp (default_arch, "i386"))
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update_code_flag (CODE_32BIT, 1);
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update_code_flag (CODE_32BIT, 1);
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@ -8617,20 +8629,21 @@ i386_target_format (void)
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default:
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default:
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format = ELF_TARGET_FORMAT;
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format = ELF_TARGET_FORMAT;
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break;
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break;
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case X86_64_LP64_ABI:
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case X86_64_ABI:
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use_rela_relocations = 1;
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use_rela_relocations = 1;
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object_64bit = 1;
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object_64bit = 1;
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format = ELF_TARGET_FORMAT64;
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format = ELF_TARGET_FORMAT64;
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break;
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break;
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case X86_64_ILP32_ABI:
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case X86_64_X32_ABI:
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use_rela_relocations = 1;
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use_rela_relocations = 1;
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object_64bit = 1;
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object_64bit = 1;
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disallow_64bit_disp = 1;
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format = ELF_TARGET_FORMAT32;
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format = ELF_TARGET_FORMAT32;
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break;
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break;
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}
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}
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if (cpu_arch_isa == PROCESSOR_L1OM)
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if (cpu_arch_isa == PROCESSOR_L1OM)
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{
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{
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if (x86_elf_abi != X86_64_LP64_ABI)
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if (x86_elf_abi != X86_64_ABI)
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as_fatal (_("Intel L1OM is 64bit only"));
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as_fatal (_("Intel L1OM is 64bit only"));
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return ELF_TARGET_L1OM_FORMAT;
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return ELF_TARGET_L1OM_FORMAT;
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}
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}
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@ -1,3 +1,13 @@
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2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/ilp32/ilp32.exp: Run inval.
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* gas/i386/ilp32/inval.l: New.
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* gas/i386/ilp32/inval.s: Likewise.
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* gas/i386/ilp32/x86-64.s: Likewise.
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* gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s. Updated.
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2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32.
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* gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32.
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@ -21,5 +21,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check] &&
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}
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}
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}
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}
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run_list_test "inval" "-al"
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set ASFLAGS "$old_ASFLAGS"
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set ASFLAGS "$old_ASFLAGS"
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}
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}
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20
gas/testsuite/gas/i386/ilp32/inval.l
Normal file
20
gas/testsuite/gas/i386/ilp32/inval.l
Normal file
@ -0,0 +1,20 @@
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.*: Assembler messages:
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.*:3: Error: .*
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.*:4: Error: .*
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GAS LISTING .*
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[ ]*1[ ]+\.text
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[ ]*2[ ]+\# All the following should be illegal for x32
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[ ]*3[ ]+\?\?\?\? 48A10000 movabs xxx,%rax
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\*\*\*\* Error:'movabs' isn't supported in x[ ]*32[ ]+mode
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[ ]*3[ ]+00000000
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[ ]*3[ ]+0000
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[ ]*4[ ]+\?\?\?\? 48A10000 movabs foo,%rax
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\*\*\*\* Error:'movabs' isn't supported in x[ ]*32[ ]+mode
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[ ]*4[ ]+00000000
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[ ]*4[ ]+0000
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[ ]*5[ ]+
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[ ]*6[ ]+\.data
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[ ]*7[ ]+xxx:
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[ ]*8[ ]+\?\?\?\? 00 \.byte 0
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8
gas/testsuite/gas/i386/ilp32/inval.s
Normal file
8
gas/testsuite/gas/i386/ilp32/inval.s
Normal file
@ -0,0 +1,8 @@
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.text
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# All the following should be illegal for x32
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movabs xxx,%rax
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movabs foo,%rax
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.data
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xxx:
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.byte 0
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@ -1,4 +1,3 @@
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#source: ../x86_64.s
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#as: -J
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#as: -J
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#objdump: -dw
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#objdump: -dw
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#name: x86-64 (ILP32)
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#name: x86-64 (ILP32)
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@ -53,7 +52,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
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[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
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[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
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[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
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[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
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[ ]*[a-f0-9]+: 49 03 00 add \(%r8\),%rax
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[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220c4>
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[ ]*[a-f0-9]+: 03 05 22 22 22 22 add 0x22222222\(%rip\),%eax # 222222c7 <foo\+0x222220d6>
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[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
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[ ]*[a-f0-9]+: 03 45 00 add 0x0\(%rbp\),%eax
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[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
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[ ]*[a-f0-9]+: 03 04 25 22 22 22 22 add 0x22222222,%eax
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||||||
[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
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[ ]*[a-f0-9]+: 41 03 45 00 add 0x0\(%r13\),%eax
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@ -85,10 +84,10 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
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[ ]*[a-f0-9]+: 83 04 81 11 addl \$0x11,\(%rcx,%rax,4\)
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[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
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[ ]*[a-f0-9]+: 41 83 04 81 11 addl \$0x11,\(%r9,%rax,4\)
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||||||
[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
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[ ]*[a-f0-9]+: 42 83 04 81 11 addl \$0x11,\(%rcx,%r8,4\)
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||||||
[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x2222213f>
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[ ]*[a-f0-9]+: 83 05 22 22 22 22 33 addl \$0x33,0x22222222\(%rip\) # 22222342 <foo\+0x22222151>
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[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222147>
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[ ]*[a-f0-9]+: 48 83 05 22 22 22 22 33 addq \$0x33,0x22222222\(%rip\) # 2222234a <foo\+0x22222159>
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[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222151>
|
[ ]*[a-f0-9]+: 81 05 22 22 22 22 33 33 33 33 addl \$0x33333333,0x22222222\(%rip\) # 22222354 <foo\+0x22222163>
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||||||
[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222215c>
|
[ ]*[a-f0-9]+: 48 81 05 22 22 22 22 33 33 33 33 addq \$0x33333333,0x22222222\(%rip\) # 2222235f <foo\+0x2222216e>
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[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
|
[ ]*[a-f0-9]+: 83 04 c5 22 22 22 22 33 addl \$0x33,0x22222222\(,%rax,8\)
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||||||
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
|
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
|
||||||
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
|
[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
|
||||||
@ -111,20 +110,18 @@ Disassembly of section .text:
|
|||||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
||||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
||||||
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
|
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
|
||||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
|
|
||||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
||||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
||||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
|
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1cc <bar\+0x25>
|
||||||
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
|
[ ]*[a-f0-9]+: b0 00 mov \$0x0,%al
|
||||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
||||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
||||||
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
|
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
|
||||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
|
|
||||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
||||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
||||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
|
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1f1 <foo>
|
||||||
|
|
||||||
0+203 <foo>:
|
0+1f1 <foo>:
|
||||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
|
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
|
||||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
|
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
|
||||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
|
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
|
||||||
|
|||||||
303
gas/testsuite/gas/i386/ilp32/x86-64.s
Normal file
303
gas/testsuite/gas/i386/ilp32/x86-64.s
Normal file
@ -0,0 +1,303 @@
|
|||||||
|
.text
|
||||||
|
.intel_syntax noprefix
|
||||||
|
# REX prefix and addressing modes.
|
||||||
|
add edx,ecx
|
||||||
|
add edx,r9d
|
||||||
|
add r10d,ecx
|
||||||
|
add rdx,rcx
|
||||||
|
add r10,r9
|
||||||
|
add r8d,eax
|
||||||
|
add r8w,ax
|
||||||
|
add r8,rax
|
||||||
|
add eax,0x44332211
|
||||||
|
add rax,0xfffffffff4332211
|
||||||
|
add ax,0x4433
|
||||||
|
add rax,0x44332211
|
||||||
|
add dl,cl
|
||||||
|
add bh,dh
|
||||||
|
add dil,sil
|
||||||
|
add r15b,sil
|
||||||
|
add dil,r14b
|
||||||
|
add r15b,r14b
|
||||||
|
PUSH RAX
|
||||||
|
PUSH R8
|
||||||
|
POP R9
|
||||||
|
ADD AL,0x11
|
||||||
|
ADD AH,0x11
|
||||||
|
ADD SPL,0x11
|
||||||
|
ADD R8B,0x11
|
||||||
|
ADD R12B,0x11
|
||||||
|
MOV RAX,CR0
|
||||||
|
MOV R8,CR0
|
||||||
|
MOV RAX,CR8
|
||||||
|
MOV CR8,RAX
|
||||||
|
REP MOVSQ #[RSI],[RDI]
|
||||||
|
REP MOVSW #[RSI,[RDI]
|
||||||
|
REP MOVSQ #[RSI],[RDI]
|
||||||
|
MOV AL, 0x11
|
||||||
|
MOV AH, 0x11
|
||||||
|
MOV SPL, 0x11
|
||||||
|
MOV R12B, 0x11
|
||||||
|
MOV EAX,0x11223344
|
||||||
|
MOV R8D,0x11223344
|
||||||
|
MOV RAX,0x1122334455667788
|
||||||
|
MOV R8,0x1122334455667788
|
||||||
|
add eax,[rax]
|
||||||
|
ADD EAX,[R8]
|
||||||
|
ADD R8D,[R8]
|
||||||
|
ADD RAX,[R8]
|
||||||
|
ADD EAX,[0x22222222+RIP]
|
||||||
|
ADD EAX,[RBP+0x00]
|
||||||
|
ADD EAX,FLAT:[0x22222222]
|
||||||
|
ADD EAX,[R13+0]
|
||||||
|
ADD EAX,[RAX+RAX*4]
|
||||||
|
ADD EAX,[R8+RAX*4]
|
||||||
|
ADD R8D,[R8+RAX*4]
|
||||||
|
ADD EAX,[R8+R8*4]
|
||||||
|
ADD [RCX+R8*4],R8D
|
||||||
|
ADD EDX,[RAX+RAX*8]
|
||||||
|
ADD EDX,[RAX+RCX*8]
|
||||||
|
ADD EDX,[RAX+RDX*8]
|
||||||
|
ADD EDX,[RAX+RBX*8]
|
||||||
|
ADD EDX,[RAX]
|
||||||
|
ADD EDX,[RAX+RBP*8]
|
||||||
|
ADD EDX,[RAX+RSI*8]
|
||||||
|
ADD EDX,[RAX+RDI*8]
|
||||||
|
ADD EDX,[RAX+R8*8]
|
||||||
|
ADD EDX,[RAX+R9*8]
|
||||||
|
ADD EDX,[RAX+R10*8]
|
||||||
|
ADD EDX,[RAX+R11*8]
|
||||||
|
ADD EDX,[RAX+R12*8]
|
||||||
|
ADD EDX,[RAX+R13*8]
|
||||||
|
ADD EDX,[RAX+R14*8]
|
||||||
|
ADD EDX,[RAX+R15*8]
|
||||||
|
ADD ECX,0x11
|
||||||
|
ADD DWORD PTR [RAX],0x11
|
||||||
|
ADD QWORD PTR [RAX],0x11
|
||||||
|
ADD DWORD PTR [R8],0x11
|
||||||
|
ADD DWORD PTR [RCX+RAX*4],0x11
|
||||||
|
ADD DWORD PTR [R9+RAX*4],0x11
|
||||||
|
ADD DWORD PTR [RCX+R8*4],0x11
|
||||||
|
ADD DWORD PTR [0x22222222+RIP],0x33
|
||||||
|
ADD QWORD PTR [RIP+0x22222222],0x33
|
||||||
|
ADD DWORD PTR [RIP+0x22222222],0x33333333
|
||||||
|
ADD QWORD PTR [RIP+0x22222222],0x33333333
|
||||||
|
ADD DWORD PTR [RAX*8+0x22222222],0x33
|
||||||
|
ADD DWORD PTR [RAX+0x22222222],0x33
|
||||||
|
ADD DWORD PTR [RAX+0x22222222],0x33
|
||||||
|
ADD DWORD PTR [R8+RBP*8],0x33
|
||||||
|
ADD DWORD PTR FLAT:[0x22222222],0x33
|
||||||
|
#new instructions
|
||||||
|
MOV AL,FLAT:[0x8877665544332211]
|
||||||
|
MOV EAX,FLAT:[0x8877665544332211]
|
||||||
|
MOV FLAT:[0x8877665544332211],AL
|
||||||
|
MOV FLAT:[0x8877665544332211],EAX
|
||||||
|
MOV RAX,FLAT:[0x8877665544332211]
|
||||||
|
MOV FLAT:[0x8877665544332211],RAX
|
||||||
|
cqo
|
||||||
|
cdqe
|
||||||
|
movsx rax, eax
|
||||||
|
movsx rax, ax
|
||||||
|
movsx rax, al
|
||||||
|
bar:
|
||||||
|
.att_syntax
|
||||||
|
#testcase for symbol references.
|
||||||
|
|
||||||
|
#immediates - various sizes:
|
||||||
|
|
||||||
|
mov $symbol, %al
|
||||||
|
mov $symbol, %ax
|
||||||
|
mov $symbol, %eax
|
||||||
|
mov $symbol, %rax
|
||||||
|
|
||||||
|
#addressing modes:
|
||||||
|
|
||||||
|
#absolute 32bit addressing
|
||||||
|
mov symbol, %eax
|
||||||
|
|
||||||
|
#arithmetic
|
||||||
|
mov symbol(%rax), %eax
|
||||||
|
|
||||||
|
#RIP relative
|
||||||
|
mov symbol(%rip), %eax
|
||||||
|
|
||||||
|
.intel_syntax noprefix
|
||||||
|
|
||||||
|
#immediates - various sizes:
|
||||||
|
mov al, offset flat:symbol
|
||||||
|
mov ax, offset flat:symbol
|
||||||
|
mov eax, offset flat:symbol
|
||||||
|
mov rax, offset flat:symbol
|
||||||
|
|
||||||
|
#parts aren't supported by the parser, yet (and not at all for symbol refs)
|
||||||
|
#mov eax, high part symbol
|
||||||
|
#mov eax, low part symbol
|
||||||
|
|
||||||
|
#addressing modes
|
||||||
|
|
||||||
|
#absolute 32bit addressing
|
||||||
|
mov eax, [symbol]
|
||||||
|
|
||||||
|
#arithmetic
|
||||||
|
mov eax, [rax+symbol]
|
||||||
|
|
||||||
|
#RIP relative
|
||||||
|
mov eax, [rip+symbol]
|
||||||
|
|
||||||
|
foo:
|
||||||
|
.att_syntax
|
||||||
|
#absolute 64bit addressing
|
||||||
|
mov 0x8877665544332211,%al
|
||||||
|
mov 0x8877665544332211,%ax
|
||||||
|
mov 0x8877665544332211,%eax
|
||||||
|
mov 0x8877665544332211,%rax
|
||||||
|
mov %al,0x8877665544332211
|
||||||
|
mov %ax,0x8877665544332211
|
||||||
|
mov %eax,0x8877665544332211
|
||||||
|
mov %rax,0x8877665544332211
|
||||||
|
movb 0x8877665544332211,%al
|
||||||
|
movw 0x8877665544332211,%ax
|
||||||
|
movl 0x8877665544332211,%eax
|
||||||
|
movq 0x8877665544332211,%rax
|
||||||
|
movb %al,0x8877665544332211
|
||||||
|
movw %ax,0x8877665544332211
|
||||||
|
movl %eax,0x8877665544332211
|
||||||
|
movq %rax,0x8877665544332211
|
||||||
|
|
||||||
|
#absolute signed 32bit addressing
|
||||||
|
mov 0xffffffffff332211,%al
|
||||||
|
mov 0xffffffffff332211,%ax
|
||||||
|
mov 0xffffffffff332211,%eax
|
||||||
|
mov 0xffffffffff332211,%rax
|
||||||
|
mov %al,0xffffffffff332211
|
||||||
|
mov %ax,0xffffffffff332211
|
||||||
|
mov %eax,0xffffffffff332211
|
||||||
|
mov %rax,0xffffffffff332211
|
||||||
|
movb 0xffffffffff332211,%al
|
||||||
|
movw 0xffffffffff332211,%ax
|
||||||
|
movl 0xffffffffff332211,%eax
|
||||||
|
movq 0xffffffffff332211,%rax
|
||||||
|
movb %al,0xffffffffff332211
|
||||||
|
movw %ax,0xffffffffff332211
|
||||||
|
movl %eax,0xffffffffff332211
|
||||||
|
movq %rax,0xffffffffff332211
|
||||||
|
|
||||||
|
cmpxchg16b (%rax)
|
||||||
|
|
||||||
|
.intel_syntax noprefix
|
||||||
|
cmpxchg16b oword ptr [rax]
|
||||||
|
|
||||||
|
.att_syntax
|
||||||
|
movsx %al, %si
|
||||||
|
movsx %al, %esi
|
||||||
|
movsx %al, %rsi
|
||||||
|
movsx %ax, %esi
|
||||||
|
movsx %ax, %rsi
|
||||||
|
movsx %eax, %rsi
|
||||||
|
movsx (%rax), %edx
|
||||||
|
movsx (%rax), %rdx
|
||||||
|
movsx (%rax), %dx
|
||||||
|
movsbl (%rax), %edx
|
||||||
|
movsbq (%rax), %rdx
|
||||||
|
movsbw (%rax), %dx
|
||||||
|
movswl (%rax), %edx
|
||||||
|
movswq (%rax), %rdx
|
||||||
|
|
||||||
|
movzx %al, %si
|
||||||
|
movzx %al, %esi
|
||||||
|
movzx %al, %rsi
|
||||||
|
movzx %ax, %esi
|
||||||
|
movzx %ax, %rsi
|
||||||
|
movzx (%rax), %edx
|
||||||
|
movzx (%rax), %rdx
|
||||||
|
movzx (%rax), %dx
|
||||||
|
movzb (%rax), %edx
|
||||||
|
movzb (%rax), %rdx
|
||||||
|
movzb (%rax), %dx
|
||||||
|
movzbl (%rax), %edx
|
||||||
|
movzbq (%rax), %rdx
|
||||||
|
movzbw (%rax), %dx
|
||||||
|
movzwl (%rax), %edx
|
||||||
|
movzwq (%rax), %rdx
|
||||||
|
|
||||||
|
.intel_syntax noprefix
|
||||||
|
movsx si,al
|
||||||
|
movsx esi,al
|
||||||
|
movsx rsi,al
|
||||||
|
movsx esi,ax
|
||||||
|
movsx rsi,ax
|
||||||
|
movsx rsi,eax
|
||||||
|
movsx edx,BYTE PTR [rax]
|
||||||
|
movsx rdx,BYTE PTR [rax]
|
||||||
|
movsx dx,BYTE PTR [rax]
|
||||||
|
movsx edx,WORD PTR [rax]
|
||||||
|
movsx rdx,WORD PTR [rax]
|
||||||
|
|
||||||
|
movzx si,al
|
||||||
|
movzx esi,al
|
||||||
|
movzx rsi,al
|
||||||
|
movzx esi,ax
|
||||||
|
movzx rsi,ax
|
||||||
|
movzx edx,BYTE PTR [rax]
|
||||||
|
movzx rdx,BYTE PTR [rax]
|
||||||
|
movzx dx,BYTE PTR [rax]
|
||||||
|
movzx edx,WORD PTR [rax]
|
||||||
|
movzx rdx,WORD PTR [rax]
|
||||||
|
|
||||||
|
movq xmm1,QWORD PTR [rsp]
|
||||||
|
movq xmm1,[rsp]
|
||||||
|
movq QWORD PTR [rsp],xmm1
|
||||||
|
movq [rsp],xmm1
|
||||||
|
|
||||||
|
.att_syntax
|
||||||
|
fnstsw
|
||||||
|
fnstsw %ax
|
||||||
|
fstsw
|
||||||
|
fstsw %ax
|
||||||
|
|
||||||
|
.intel_syntax noprefix
|
||||||
|
fnstsw
|
||||||
|
fnstsw ax
|
||||||
|
fstsw
|
||||||
|
fstsw ax
|
||||||
|
|
||||||
|
.att_syntax
|
||||||
|
movsx (%rax),%ax
|
||||||
|
movsx (%rax),%eax
|
||||||
|
movsx (%rax),%rax
|
||||||
|
movsxb (%rax), %dx
|
||||||
|
movsxb (%rax), %edx
|
||||||
|
movsxb (%rax), %rdx
|
||||||
|
movsxw (%rax), %edx
|
||||||
|
movsxw (%rax), %rdx
|
||||||
|
movsxl (%rax), %rdx
|
||||||
|
movsxd (%rax),%rax
|
||||||
|
movzx (%rax),%ax
|
||||||
|
movzx (%rax),%eax
|
||||||
|
movzx (%rax),%rax
|
||||||
|
movzxb (%rax), %dx
|
||||||
|
movzxb (%rax), %edx
|
||||||
|
movzxb (%rax), %rdx
|
||||||
|
movzxw (%rax), %edx
|
||||||
|
movzxw (%rax), %rdx
|
||||||
|
|
||||||
|
movnti %eax, (%rax)
|
||||||
|
movntil %eax, (%rax)
|
||||||
|
movnti %rax, (%rax)
|
||||||
|
movntiq %rax, (%rax)
|
||||||
|
|
||||||
|
.intel_syntax noprefix
|
||||||
|
|
||||||
|
movsx ax, BYTE PTR [rax]
|
||||||
|
movsx eax, BYTE PTR [rax]
|
||||||
|
movsx eax, WORD PTR [rax]
|
||||||
|
movsx rax, WORD PTR [rax]
|
||||||
|
movsx rax, DWORD PTR [rax]
|
||||||
|
movsxd rax, [rax]
|
||||||
|
movzx ax, BYTE PTR [rax]
|
||||||
|
movzx eax, BYTE PTR [rax]
|
||||||
|
movzx eax, WORD PTR [rax]
|
||||||
|
movzx rax, WORD PTR [rax]
|
||||||
|
|
||||||
|
movnti dword ptr [rax], eax
|
||||||
|
movnti qword ptr [rax], rax
|
||||||
Reference in New Issue
Block a user