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LoongArch: binutils: Add support for linker relaxation.
Add support for relocs related to relax to readelf. binutils/ChangeLog: * readelf.c (target_specific_reloc_handling): Handle ULEB128 reloc. (is_32bit_inplace_add_reloc): Handle new reloc. (is_32bit_inplace_sub_reloc): Likewise. (is_64bit_inplace_add_reloc): Likewise. (is_64bit_inplace_sub_reloc): Likewise. (is_16bit_inplace_add_reloc): Likewise. (is_16bit_inplace_sub_reloc): Likewise. (is_8bit_inplace_add_reloc): Likewise. (is_8bit_inplace_sub_reloc): Likewise. (is_6bit_inplace_sub_reloc): Likewise. (is_6bit_inplace_add_reloc): New function. (apply_relocations): Handle new reloc. * testsuite/binutils-all/readelf.exp: Add -mno-relax option for LoongArch.
This commit is contained in:
mengqinggang
committed by
liuzhensong
liuzhensong
parent
7ad9de1188
commit
7624446235
@ -14008,6 +14008,51 @@ target_specific_reloc_handling (Filedata *filedata,
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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{
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switch (reloc_type)
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{
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/* For .uleb128 .LFE1-.LFB1, loongarch write 0 to object file
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at assembly time. */
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case 107: /* R_LARCH_ADD_ULEB128. */
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case 108: /* R_LARCH_SUB_ULEB128. */
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{
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uint64_t value;
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unsigned int reloc_size = 0;
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int leb_ret = 0;
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value = read_leb128 (start + reloc->r_offset, end, false,
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&reloc_size, &leb_ret);
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if (leb_ret != 0 || reloc_size == 0 || reloc_size > 8)
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error (_("LoongArch ULEB128 field at 0x%lx contains invalid "
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"ULEB128 value\n"),
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(long) reloc->r_offset);
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if (107 == reloc_type)
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value += (reloc->r_addend + symtab[sym_index].st_value);
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else if (108 == reloc_type)
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value -= (reloc->r_addend + symtab[sym_index].st_value);
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/* Write uleb128 value to p. */
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bfd_byte c;
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bfd_byte *p = start + reloc->r_offset;
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do
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{
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c = value & 0x7f;
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if (reloc_size > 1)
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c |= 0x80;
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*(p++) = c;
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value >>= 7;
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reloc_size--;
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}
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while (reloc_size);
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return true;
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}
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}
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break;
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}
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case EM_MSP430:
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case EM_MSP430_OLD:
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{
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@ -14734,6 +14779,8 @@ is_32bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 50; /* R_LARCH_ADD32. */
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case EM_RISCV:
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return reloc_type == 35; /* R_RISCV_ADD32. */
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default:
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@ -14750,6 +14797,8 @@ is_32bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 55; /* R_LARCH_SUB32. */
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case EM_RISCV:
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return reloc_type == 39; /* R_RISCV_SUB32. */
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default:
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@ -14766,6 +14815,8 @@ is_64bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 51; /* R_LARCH_ADD64. */
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case EM_RISCV:
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return reloc_type == 36; /* R_RISCV_ADD64. */
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default:
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@ -14782,6 +14833,8 @@ is_64bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 56; /* R_LARCH_SUB64. */
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case EM_RISCV:
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return reloc_type == 40; /* R_RISCV_SUB64. */
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default:
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@ -14798,6 +14851,8 @@ is_16bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 48; /* R_LARCH_ADD16. */
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case EM_RISCV:
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return reloc_type == 34; /* R_RISCV_ADD16. */
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default:
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@ -14814,6 +14869,8 @@ is_16bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 53; /* R_LARCH_SUB16. */
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case EM_RISCV:
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return reloc_type == 38; /* R_RISCV_SUB16. */
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default:
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@ -14830,6 +14887,8 @@ is_8bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 47; /* R_LARCH_ADD8. */
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case EM_RISCV:
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return reloc_type == 33; /* R_RISCV_ADD8. */
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default:
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@ -14846,6 +14905,8 @@ is_8bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
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/* Please keep this table alpha-sorted for ease of visual lookup. */
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 52; /* R_LARCH_SUB8. */
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case EM_RISCV:
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return reloc_type == 37; /* R_RISCV_SUB8. */
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default:
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@ -14853,6 +14914,21 @@ is_8bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
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}
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}
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/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
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a 6-bit inplace add RELA relocation used in DWARF debug sections. */
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static bool
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is_6bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type)
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{
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 105; /* R_LARCH_ADD6. */
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default:
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return false;
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}
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}
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/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is
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a 6-bit inplace sub RELA relocation used in DWARF debug sections. */
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@ -14861,6 +14937,8 @@ is_6bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type)
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{
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switch (filedata->file_header.e_machine)
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{
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case EM_LOONGARCH:
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return reloc_type == 106; /* R_LARCH_SUB6. */
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case EM_RISCV:
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return reloc_type == 52; /* R_RISCV_SUB6. */
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default:
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@ -15108,7 +15186,8 @@ apply_relocations (Filedata *filedata,
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reloc_inplace = true;
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}
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else if ((reloc_subtract = is_6bit_inplace_sub_reloc (filedata,
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reloc_type)))
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reloc_type))
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|| is_6bit_inplace_add_reloc (filedata, reloc_type))
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{
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reloc_size = 1;
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reloc_inplace = true;
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@ -15200,7 +15279,8 @@ apply_relocations (Filedata *filedata,
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reloc_size);
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}
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else if (is_6bit_abs_reloc (filedata, reloc_type)
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|| is_6bit_inplace_sub_reloc (filedata, reloc_type))
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|| is_6bit_inplace_sub_reloc (filedata, reloc_type)
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|| is_6bit_inplace_add_reloc (filedata, reloc_type))
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{
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if (reloc_subtract)
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addend -= sym->st_value;
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@ -489,18 +489,23 @@ if {![binutils_assemble $srcdir/$subdir/z.s tmpdir/z.o]} then {
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readelf_test {--decompress --hex-dump .debug_loc} $tempfile readelf.z
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}
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set hpux ""
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set flags ""
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# Skip the next test for the RISCV architectures because they
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# do not support .ULEB128 pseudo-ops with non-constant values.
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if ![istarget "riscv*-*-*"] then {
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if [istarget "hppa*64*-*-hpux*"] {
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set hpux "--defsym HPUX=1"
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set flags "--defsym HPUX=1"
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}
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# LoongArch relax align add nops, so label subtractions will increase
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if [istarget "loongarch*-*-*"] {
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set flags "-mno-relax"
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}
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# Assemble the DWARF-5 test file.
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if {![binutils_assemble_flags $srcdir/$subdir/dw5.S tmpdir/dw5.o $hpux]} then {
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if {![binutils_assemble_flags $srcdir/$subdir/dw5.S tmpdir/dw5.o $flags]} then {
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unsupported "readelf -wiaoRlL dw5 (failed to assemble)"
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} else {
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@ -612,7 +617,7 @@ if ![is_remote host] {
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}
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# Check dwarf-5 support for DW_OP_addrx.
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if {![binutils_assemble_flags $srcdir/$subdir/dw5-op.S tmpdir/dw5-op.o $hpux]} then {
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if {![binutils_assemble_flags $srcdir/$subdir/dw5-op.S tmpdir/dw5-op.o $flags]} then {
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unsupported "readelf -wi dw5-op (failed to assemble)"
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} else {
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