RISC-V: Error for relaxable branch in absolute section.

Emit an error instead of crashing in frag_new, handling this same as the
i386 port.

gas/
	PR 26400
	* config/tc-riscv.c (append_insn): If in absolute section, emit
	error before add_relaxed_insn call.
	* testsuite/gas/riscv/absolute-sec.d: New.
	* testsuite/gas/riscv/absolute-sec.l: New.
	* testsuite/gas/riscv/absolute-sec.s: New.
This commit is contained in:
Jim Wilson
2020-09-24 15:08:52 -07:00
parent debd1a62c4
commit 743f5cfc00
5 changed files with 23 additions and 0 deletions

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@ -1,3 +1,12 @@
2020-09-24 Jim Wilson <jimw@sifive.com>
PR 26400
* config/tc-riscv.c (append_insn): If in absolute section, emit
error before add_relaxed_insn call.
* testsuite/gas/riscv/absolute-sec.d: New.
* testsuite/gas/riscv/absolute-sec.l: New.
* testsuite/gas/riscv/absolute-sec.s: New.
2020-09-23 Mark Wielaard <mark@klomp.org>
* testsuite/gas/elf/dwarf-5-cu.d: Adjust expected output.

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@ -1106,6 +1106,13 @@ append_insn (struct riscv_cl_insn *ip, expressionS *address_expr,
int j = reloc_type == BFD_RELOC_RISCV_JMP;
int best_case = riscv_insn_length (ip->insn_opcode);
unsigned worst_case = relaxed_branch_length (NULL, NULL, 0);
if (now_seg == absolute_section)
{
as_bad (_("relaxable branches not supported in absolute section"));
return;
}
add_relaxed_insn (ip, worst_case, best_case,
RELAX_BRANCH_ENCODE (j, best_case == 2, worst_case),
address_expr->X_add_symbol,

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@ -0,0 +1,3 @@
#as:
#source absolute-sec.s
#error_output: absolute-sec.l

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.*: Assembler messages:
.*: Error: relaxable branches not supported in absolute section

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.offset 0
jal x0, 100