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Fixed interpretation of SR bit in list18 structures.

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Nick Clifton
1997-08-20 20:57:05 +00:00
parent 9f19768a57
commit 70caad98c1
2 changed files with 1949 additions and 646 deletions
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sim/v850/ChangeLog
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@ -1,3 +1,15 @@
Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
interpretation of SR bit in list18 structure.
start-sanitize-v850eq
Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
with US bit set in the PSW.
start-sanitize-v850eq
Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
* interp.c (sim_resume): Opcode functions return amount to be

2583
sim/v850/simops.c
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