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RISC-V: Update ABI to the elf_flags after parsing elf attributes.
Originally, if the -mabi option isn't set, then assembler will set the abi according to the architecture string in the riscv_after_parse_args. But we should also check and reset the abi later since the architecture string may be reset by the elf attributes. Therefore, set the abi to the elf_flags in the riscv_after_parse_args seems too early. Besides, we have to set the abi_xlen before assembling any instruction, so it should be safe to call riscv_set_abi_by_arch at the place that we set start_assemble to TRUE. However, one minor case is that we won't call the md_assemble when we are assembling an file without any instruction. It seems that we still need to set the abi in riscv_elf_final_processing, to make sure that abi can be updated according to the elf arch attributes. For the rv32i and most elf toolchains, this patch can fix the mis-matched ABI errors for Run pr26391-5 and Run pr26391-6 testcases. Besides, it also correct the elf header flags of the output objects. Consider the new testcases, mabi-fail-02 and mabi-noabi-attr-[01|02|03], they are failed before applying this patch. But I still get the mis-matched ABI errors for the following toolchains when runnung the riscv-gnu-toolchain regressions, newlib-rv32imafc-ilp32f-[medlow|medany] linux-rv32imac-ilp32-[medlow|medany] linux-rv32imafdc-ilp32-[medlow|medany} linux-rv64imac-lp64-[medlow|medany] linux-rv64imafdc-lp64-[medlow|medany} For the newlib-rv32imafc-ilp32f, although we try to choose the abi according to the elf attributes, we will use FLOAT_ABI_SOFT rather than the FLOAT_ABI_SINGLE for the assmebly file wihtout setting the -mabi, but compiler will set the abi to FLOAT_ABI_SINGLE for the C files. As for the linux toolchains, we also get fails for Run pr26391-5 and Run pr26391-6 testcases. Since the linux toolchain won't generate elf attributes to correct the ISA, and the --with-arch configure option isn't set, assembler will try to set the default arch to rv[32|64]g, which means the FLOAT_ABI_DOUBLE will be choosed, and may be conflict with the abi set by the toolchain. Therefore, I would suggest that it's is more safe to set the --with-arch when building binutils, but it may break some testcases. For example, ld-scripts/fill and ld-scripts/empty-address-2 may be broken when c-ext is set. We might insert R_RISCV_ALIGN to make sure the 4-byte alignment, but the dump result will be a bit different from what the testcase expected. However, this patch only fix the problem - the abi, elf_flags and the instruction, which is generated according to the abi_xlen, are all fixed once the elf attributes are set for most elf toolchains. Other mis-matched ABI problems should be fixed when we always build the binutils with the --with-arch= configure option. gas/ * config/tc-riscv.c (explicit_mabi): New boolean to indicate if the -mabi= option is explictly set. (md_parse_option): Set explicit_mabi to TRUE if -mabi is set. (riscv_set_abi_by_arch): New function. If the -mabi option isn't set, then we set the abi according to the architecture string. Otherwise, check if there are conflicts between architecture and abi setting. (riscv_after_parse_args): Move the abi setting to md_assemble nad riscv_elf_final_processing. (md_assemble): Call the riscv_set_abi_by_arch when we set the start_assemble to TRUE. (riscv_elf_final_processing): Likewise, in case the file without any instruction. * testsuite/gas/riscv/mabi-attr-01.s: New testcase. * testsuite/gas/riscv/mabi-attr-02.s: Likewise. * testsuite/gas/riscv/mabi-attr-03.s: Likewise. * testsuite/gas/riscv/mabi-fail-01.d: Likewise. * testsuite/gas/riscv/mabi-fail-01.l: Likewise. * testsuite/gas/riscv/mabi-fail-02.d: Likewise. * testsuite/gas/riscv/mabi-fail-02.l: Likewise. * testsuite/gas/riscv/mabi-noabi-attr-01a.d: Likewise. * testsuite/gas/riscv/mabi-noabi-attr-01b.d: Likewise. * testsuite/gas/riscv/mabi-noabi-attr-02a.d: Likewise. * testsuite/gas/riscv/mabi-noabi-attr-02b.d: Likewise. * testsuite/gas/riscv/mabi-noabi-attr-03a.d: Likewise. * testsuite/gas/riscv/mabi-noabi-attr-03b.d: Likewise. * testsuite/gas/riscv/mabi-noabi-march-01.d: Likewise. * testsuite/gas/riscv/mabi-noabi-march-02.d: Likewise. * testsuite/gas/riscv/mabi-noabi-march-03.d: Likewise.
This commit is contained in:
@ -1,3 +1,35 @@
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2020-11-09 Nelson Chu <nelson.chu@sifive.com>
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* config/tc-riscv.c (explicit_mabi): New boolean to indicate if
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the -mabi= option is explictly set.
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(md_parse_option): Set explicit_mabi to TRUE if -mabi is set.
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(riscv_set_abi_by_arch): New function. If the -mabi option isn't
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set, then we set the abi according to the architecture string.
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Otherwise, check if there are conflicts between architecture
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and abi setting.
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(riscv_after_parse_args): Move the abi setting to md_assemble nad
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riscv_elf_final_processing.
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(md_assemble): Call the riscv_set_abi_by_arch when we set the
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start_assemble to TRUE.
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(riscv_elf_final_processing): Likewise, in case the file without
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any instruction.
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* testsuite/gas/riscv/mabi-attr-01.s: New testcase.
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* testsuite/gas/riscv/mabi-attr-02.s: Likewise.
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* testsuite/gas/riscv/mabi-attr-03.s: Likewise.
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* testsuite/gas/riscv/mabi-fail-01.d: Likewise.
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* testsuite/gas/riscv/mabi-fail-01.l: Likewise.
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* testsuite/gas/riscv/mabi-fail-02.d: Likewise.
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* testsuite/gas/riscv/mabi-fail-02.l: Likewise.
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* testsuite/gas/riscv/mabi-noabi-attr-01a.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-attr-01b.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-attr-02a.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-attr-02b.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-attr-03a.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-attr-03b.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-march-01.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-march-02.d: Likewise.
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* testsuite/gas/riscv/mabi-noabi-march-03.d: Likewise.
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2020-11-04 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
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* testsuite/gas/aarch64/armv8-ras-1_1-invalid.d: New test.
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@ -91,6 +91,14 @@ static enum riscv_priv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE;
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static unsigned xlen = 0; /* width of an x-register */
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static unsigned abi_xlen = 0; /* width of a pointer in the ABI */
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static bfd_boolean rve_abi = FALSE;
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enum float_abi {
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FLOAT_ABI_DEFAULT = -1,
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FLOAT_ABI_SOFT,
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FLOAT_ABI_SINGLE,
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FLOAT_ABI_DOUBLE,
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FLOAT_ABI_QUAD
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};
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static enum float_abi float_abi = FLOAT_ABI_DEFAULT;
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#define LOAD_ADDRESS_INSN (abi_xlen == 64 ? "ld" : "lw")
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#define ADD32_INSN (xlen == 64 ? "addiw" : "addi")
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@ -311,6 +319,50 @@ riscv_set_arch (const char *s)
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riscv_parse_subset (&rps, s);
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}
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/* Indicate -mabi= option is explictly set. */
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static bfd_boolean explicit_mabi = FALSE;
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static void
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riscv_set_abi (unsigned new_xlen, enum float_abi new_float_abi, bfd_boolean rve)
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{
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abi_xlen = new_xlen;
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float_abi = new_float_abi;
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rve_abi = rve;
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}
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/* If the -mabi option isn't set, then we set the abi according to the arch
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string. Otherwise, check if there are conflicts between architecture
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and abi setting. */
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static void
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riscv_set_abi_by_arch (void)
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{
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if (!explicit_mabi)
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{
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if (riscv_subset_supports ("q"))
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riscv_set_abi (xlen, FLOAT_ABI_QUAD, FALSE);
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else if (riscv_subset_supports ("d"))
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riscv_set_abi (xlen, FLOAT_ABI_DOUBLE, FALSE);
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else
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riscv_set_abi (xlen, FLOAT_ABI_SOFT, FALSE);
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}
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else
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{
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gas_assert (abi_xlen != 0 && xlen != 0 && float_abi != FLOAT_ABI_DEFAULT);
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if (abi_xlen > xlen)
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as_bad ("can't have %d-bit ABI on %d-bit ISA", abi_xlen, xlen);
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else if (abi_xlen < xlen)
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as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, xlen);
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}
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/* Update the EF_RISCV_FLOAT_ABI field of elf_flags. */
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elf_flags &= ~EF_RISCV_FLOAT_ABI;
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elf_flags |= float_abi << 1;
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if (rve_abi)
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elf_flags |= EF_RISCV_RVE;
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}
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/* Handle of the OPCODE hash table. */
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static htab_t op_hash = NULL;
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@ -2542,6 +2594,7 @@ md_assemble (char *str)
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if (!start_assemble)
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{
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start_assemble = TRUE;
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riscv_set_abi_by_arch ();
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/* Set the default_priv_spec according to the priv attributes. */
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if (!riscv_set_default_priv_spec (NULL))
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@ -2613,23 +2666,6 @@ struct option md_longopts[] =
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};
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size_t md_longopts_size = sizeof (md_longopts);
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enum float_abi {
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FLOAT_ABI_DEFAULT = -1,
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FLOAT_ABI_SOFT,
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FLOAT_ABI_SINGLE,
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FLOAT_ABI_DOUBLE,
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FLOAT_ABI_QUAD
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};
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static enum float_abi float_abi = FLOAT_ABI_DEFAULT;
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static void
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riscv_set_abi (unsigned new_xlen, enum float_abi new_float_abi, bfd_boolean rve)
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{
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abi_xlen = new_xlen;
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float_abi = new_float_abi;
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rve_abi = rve;
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}
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int
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md_parse_option (int c, const char *arg)
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{
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@ -2670,6 +2706,7 @@ md_parse_option (int c, const char *arg)
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riscv_set_abi (64, FLOAT_ABI_QUAD, FALSE);
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else
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return 0;
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explicit_mabi = TRUE;
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break;
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case OPTION_RELAX:
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@ -2754,36 +2791,6 @@ riscv_after_parse_args (void)
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if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
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riscv_set_default_priv_spec (DEFAULT_RISCV_PRIV_SPEC);
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/* Infer ABI from ISA if not specified on command line. */
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if (abi_xlen == 0)
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abi_xlen = xlen;
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else if (abi_xlen > xlen)
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as_bad ("can't have %d-bit ABI on %d-bit ISA", abi_xlen, xlen);
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else if (abi_xlen < xlen)
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as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, xlen);
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if (float_abi == FLOAT_ABI_DEFAULT)
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{
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riscv_subset_t *subset;
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/* Assume soft-float unless D extension is present. */
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float_abi = FLOAT_ABI_SOFT;
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for (subset = riscv_subsets.head; subset != NULL; subset = subset->next)
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{
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if (strcasecmp (subset->name, "D") == 0)
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float_abi = FLOAT_ABI_DOUBLE;
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if (strcasecmp (subset->name, "Q") == 0)
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float_abi = FLOAT_ABI_QUAD;
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}
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}
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if (rve_abi)
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elf_flags |= EF_RISCV_RVE;
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/* Insert float_abi into the EF_RISCV_FLOAT_ABI field of elf_flags. */
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elf_flags |= float_abi * (EF_RISCV_FLOAT_ABI & ~(EF_RISCV_FLOAT_ABI << 1));
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/* If the CIE to be produced has not been overridden on the command line,
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then produce version 3 by default. This allows us to use the full
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range of registers in a .cfi_return_column directive. */
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@ -3514,6 +3521,7 @@ tc_riscv_regname_to_dw2regnum (char *regname)
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void
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riscv_elf_final_processing (void)
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{
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riscv_set_abi_by_arch ();
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elf_elfheader (stdoutput)->e_flags |= elf_flags;
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}
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6
gas/testsuite/gas/riscv/mabi-attr-01.s
Normal file
6
gas/testsuite/gas/riscv/mabi-attr-01.s
Normal file
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.attribute arch,"rv32i"
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.option pic
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.extern foo
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.text
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foo:
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la a0, foo
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6
gas/testsuite/gas/riscv/mabi-attr-02.s
Normal file
6
gas/testsuite/gas/riscv/mabi-attr-02.s
Normal file
@ -0,0 +1,6 @@
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.attribute arch,"rv32ifd"
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.option pic
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.extern foo
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.text
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foo:
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la a0, foo
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6
gas/testsuite/gas/riscv/mabi-attr-03.s
Normal file
6
gas/testsuite/gas/riscv/mabi-attr-03.s
Normal file
@ -0,0 +1,6 @@
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.attribute arch,"rv64ifdq"
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.option pic
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.extern foo
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.text
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foo:
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la a0, foo
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3
gas/testsuite/gas/riscv/mabi-fail-01.d
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3
gas/testsuite/gas/riscv/mabi-fail-01.d
Normal file
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#as: -march-attr -mabi=lp64d
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#source: mabi-attr-01.s
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#error_output: mabi-fail-01.l
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2
gas/testsuite/gas/riscv/mabi-fail-01.l
Normal file
2
gas/testsuite/gas/riscv/mabi-fail-01.l
Normal file
@ -0,0 +1,2 @@
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.*Assembler messages:
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.*Error: can't have 64-bit ABI on 32-bit ISA
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3
gas/testsuite/gas/riscv/mabi-fail-02.d
Normal file
3
gas/testsuite/gas/riscv/mabi-fail-02.d
Normal file
@ -0,0 +1,3 @@
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#as: -march-attr -mabi=ilp32
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#source: mabi-attr-03.s
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#error_output: mabi-fail-02.l
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2
gas/testsuite/gas/riscv/mabi-fail-02.l
Normal file
2
gas/testsuite/gas/riscv/mabi-fail-02.l
Normal file
@ -0,0 +1,2 @@
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.*Assembler messages:
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.*Error: 32-bit ABI not yet supported on 64-bit ISA
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10
gas/testsuite/gas/riscv/mabi-noabi-attr-01a.d
Normal file
10
gas/testsuite/gas/riscv/mabi-noabi-attr-01a.d
Normal file
@ -0,0 +1,10 @@
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#as: -march-attr -march=rv64ifd
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#readelf: -h
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#source: mabi-attr-01.s
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ELF Header:
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#...
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[ ]+Class:[ ]+ELF32
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#...
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[ ]+Flags:[ ]+0x0
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#...
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12
gas/testsuite/gas/riscv/mabi-noabi-attr-01b.d
Normal file
12
gas/testsuite/gas/riscv/mabi-noabi-attr-01b.d
Normal file
@ -0,0 +1,12 @@
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#as: -march-attr -march=rv64ifd
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#objdump: -d
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#source: mabi-attr-01.s
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.*:[ ]+file format elf32.*
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Disassembly of section .text:
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0+000 <foo>:
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#...
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[ ]+[0-9a-f]+:[ ]+00052503[ ]+lw[ ]+a0,0\(a0\) # .*
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10
gas/testsuite/gas/riscv/mabi-noabi-attr-02a.d
Normal file
10
gas/testsuite/gas/riscv/mabi-noabi-attr-02a.d
Normal file
@ -0,0 +1,10 @@
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#as: -march-attr -march=rv64i
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#readelf: -h
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#source: mabi-attr-02.s
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ELF Header:
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#...
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[ ]+Class:[ ]+ELF32
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#...
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[ ]+Flags:[ ]+0x4, double-float ABI
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#...
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12
gas/testsuite/gas/riscv/mabi-noabi-attr-02b.d
Normal file
12
gas/testsuite/gas/riscv/mabi-noabi-attr-02b.d
Normal file
@ -0,0 +1,12 @@
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#as: -march-attr -march=rv64i
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#objdump: -d
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#source: mabi-attr-02.s
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.*:[ ]+file format elf32.*
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Disassembly of section .text:
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0+000 <foo>:
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#...
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[ ]+[0-9a-f]+:[ ]+00052503[ ]+lw[ ]+a0,0\(a0\) # .*
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10
gas/testsuite/gas/riscv/mabi-noabi-attr-03a.d
Normal file
10
gas/testsuite/gas/riscv/mabi-noabi-attr-03a.d
Normal file
@ -0,0 +1,10 @@
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#as: -march-attr -march=rv32i
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#readelf: -h
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#source: mabi-attr-03.s
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ELF Header:
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#...
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[ ]+Class:[ ]+ELF64
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#...
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[ ]+Flags:[ ]+0x6, quad-float ABI
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#...
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12
gas/testsuite/gas/riscv/mabi-noabi-attr-03b.d
Normal file
12
gas/testsuite/gas/riscv/mabi-noabi-attr-03b.d
Normal file
@ -0,0 +1,12 @@
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#as: -march-attr -march=rv32i
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#objdump: -d
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#source: mabi-attr-03.s
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.*:[ ]+file format elf64.*
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Disassembly of section .text:
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0+000 <foo>:
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#...
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[ ]+[0-9a-f]+:[ ]+00053503[ ]+ld[ ]+a0,0\(a0\) # .*
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10
gas/testsuite/gas/riscv/mabi-noabi-march-01.d
Normal file
10
gas/testsuite/gas/riscv/mabi-noabi-march-01.d
Normal file
@ -0,0 +1,10 @@
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#as: -march=rv32i
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#readelf: -h
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#source: empty.s
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ELF Header:
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#...
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[ ]+Class:[ ]+ELF32
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#...
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[ ]+Flags:[ ]+0x0
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#...
|
10
gas/testsuite/gas/riscv/mabi-noabi-march-02.d
Normal file
10
gas/testsuite/gas/riscv/mabi-noabi-march-02.d
Normal file
@ -0,0 +1,10 @@
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#as: -march=rv32ifd
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#readelf: -h
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#source: empty.s
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ELF Header:
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#...
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[ ]+Class:[ ]+ELF32
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#...
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[ ]+Flags:[ ]+0x4, double-float ABI
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#...
|
10
gas/testsuite/gas/riscv/mabi-noabi-march-03.d
Normal file
10
gas/testsuite/gas/riscv/mabi-noabi-march-03.d
Normal file
@ -0,0 +1,10 @@
|
||||
#as: -march=rv64ifdq
|
||||
#readelf: -h
|
||||
#source: empty.s
|
||||
|
||||
ELF Header:
|
||||
#...
|
||||
[ ]+Class:[ ]+ELF64
|
||||
#...
|
||||
[ ]+Flags:[ ]+0x6, quad-float ABI
|
||||
#...
|
Reference in New Issue
Block a user