[PATCH,rs6000] Fix vsx-regs.exp testcase failure

Hi,
  This test exercise updates to the F* and VS* registers
and verifies updates to the same.  Note that the registers
overlap; the doubleword[1] portion of any VS0-VS31
register contains the F0-F31 register contents, so any updates
to one can be measured in the other.

Per a brief investigation, we see that dl_main() currently
uses some VSX instructions, so the VS* values are not
going to be zero when this testcase reaches main, where these
tests begin.  The test harness does not explicitly
initialize the full VS* values, so the first test loop
that updates the F* values means our VS* values are
uninitalized and will fail the first set of checks.
This update explicitly initializes the doubleword[0] portion
of the VS* registers, to allow this test to succeed.

2021-04-12  Will Schmidt  <will_schmidt@vnet.ibm.com>

gdb/testsuite/ChangeLog:
        * gdb.arch/vsx-regs.exp: Initialize vs* doublewords.
This commit is contained in:
Will Schmidt
2021-04-12 14:17:43 -05:00
parent c8a379440e
commit 6b142048ad
2 changed files with 16 additions and 1 deletions

View File

@ -1,3 +1,7 @@
2021-04-12 Will Schmidt <will_schmidt@vnet.ibm.com>
* gdb.arch/powerpc-vsx-regs.exp: Initialize vs* doublewords.
2021-04-12 Will Schmidt <will_schmidt@vnet.ibm.com>
* gdb.arch/powerpc-plxv-nonrel.s: Testcase using

View File

@ -89,7 +89,18 @@ if {$endianness == "big"} {
set float_register ".raw 0xdeadbeefdeadbeef."
# First run the F0~F31/VS0~VS31 tests
# Note that the F0-F31 registers are shared with the doubleword 0 portion of
# the VS0-VS31 registers, the doubleword 1 portions of VS* remain unchanged
# after updates to F*.
# Since dl_main uses some VS* registers, and per inspection their values are
# no longer zero when our test reaches main(), we need to explicitly
# initialize the doubleword1 portions before we run our tests against
# values currently in those registers.
# 0: Initialize the (doubleword 1) portion of the VS0-VS31 registers.
for {set i 0} {$i < 32} {incr i 1} {
gdb_test_no_output "set \$vs$i.v2_double\][0\] = 0"
}
# 1: Set F0~F31 registers and check if it reflects on VS0~VS31.
for {set i 0} {$i < 32} {incr i 1} {