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[AArch64][binutils] Add support for ARMv8.2 PSTATE.UAO.

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ARMv8.2 adds a new control bit PSTATE.UAO. This patch adds support for
this bit to binutils, following the same basic pattern as for
PSTATE.PAN. The new control bit is only available when -march=armv8.2-a
is specified.

gas/testsuite/
2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/uao-directive.d: New.
	* gas/aarch64/uao.d: New.
	* gas/aarch64/uao.s: New.

opcodes/
2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_regs): Add "uao".
	(aarch64_sys_reg_supported_p): Add comment.  Add checks for "uao".
	(aarch64_pstatefields): Add "uao".
	(aarch64_pstatefield_supported_p): Add checks for "uao".

Change-Id: Id571628ac5227b78aaf1876e85d15d7b6c0a2896
This commit is contained in:
Matthew Wahab
2015-12-10 16:01:29 +00:00
parent 7039122d13
commit 6479e48ef9
6 changed files with 84 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
gas/testsuite/ChangeLog
View File

@ -1,3 +1,9 @@
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/uao-directive.d: New.
* gas/aarch64/uao.d: New.
* gas/aarch64/uao.s: New.
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/sysreg-2.d: Add tests for new registers.

13
gas/testsuite/gas/aarch64/uao-directive.d Normal file
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@ -0,0 +1,13 @@
#objdump: -dr
#as: --defsym DIRECTIVE=1
#source: uao.s
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
[0-9a-f]:+ d500417f msr uao, #0x1
[0-9a-f]:+ d500407f msr uao, #0x0
[0-9a-f]:+ d5184280 msr uao, x0
[0-9a-f]:+ d5384281 mrs x1, uao

12
gas/testsuite/gas/aarch64/uao.d Normal file
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@ -0,0 +1,12 @@
#objdump: -dr
#as: -march=armv8.2-a
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
[0-9a-f]:+ d500417f msr uao, #0x1
[0-9a-f]:+ d500407f msr uao, #0x0
[0-9a-f]:+ d5184280 msr uao, x0
[0-9a-f]:+ d5384281 mrs x1, uao

32
gas/testsuite/gas/aarch64/uao.s Normal file
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@ -0,0 +1,32 @@
/* uao.s Test file for AArch64 UAO instructions.
Copyright (C) 2015 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the license, or
(at your option) any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING3. If not,
see <http://www.gnu.org/licenses/>. */
.text
.ifdef DIRECTIVE
.arch armv8.2-a
.endif
msr uao, #1
msr uao, #0
msr uao, x0
mrs x1, uao

7
opcodes/ChangeLog
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@ -1,3 +1,10 @@
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (aarch64_sys_regs): Add "uao".
(aarch64_sys_reg_supported_p): Add comment. Add checks for "uao".
(aarch64_pstatefields): Add "uao".
(aarch64_pstatefield_supported_p): Add checks for "uao".
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (aarch64_sys_regs): Add "vsesr_el2", "erridr_el1",

14
opcodes/aarch64-opc.c
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@ -2771,6 +2771,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
{ "daif", CPEN_(3,C2,1), 0 },
{ "currentel", CPEN_(0,C2,2), 0 }, /* RO */
{ "pan", CPEN_(0,C2,3), F_ARCHEXT },
{ "uao", CPEN_ (0, C2, 4), F_ARCHEXT },
{ "nzcv", CPEN_(3,C2,0), 0 },
{ "fpcr", CPEN_(3,C4,0), 0 },
{ "fpsr", CPEN_(3,C4,1), 0 },
@ -3169,10 +3170,17 @@ aarch64_sys_reg_supported_p (const aarch64_feature_set features,
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_1))
/* ARMv8.2 features. */
/* ID_AA64MMFR2_EL1. */
if (reg->value == CPENC (3, 0, C0, C7, 2)
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
return FALSE;
/* PSTATE.UAO. */
if (reg->value == CPEN_ (0, C2, 4)
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
return FALSE;
/* RAS extension. */
/* ERRIDR_EL1 and ERRSELR_EL1. */
@ -3208,6 +3216,7 @@ const aarch64_sys_reg aarch64_pstatefields [] =
{ "daifset", 0x1e, 0 },
{ "daifclr", 0x1f, 0 },
{ "pan", 0x04, F_ARCHEXT },
{ "uao", 0x03, F_ARCHEXT },
{ 0, CPENC(0,0,0,0,0), 0 },
};
@ -3223,6 +3232,11 @@ aarch64_pstatefield_supported_p (const aarch64_feature_set features,
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PAN))
return FALSE;
/* UAO. Values are from aarch64_pstatefields. */
if (reg->value == 0x03
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
return FALSE;
return TRUE;
}