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https://github.com/espressif/binutils-gdb.git
synced 2025-06-22 19:09:31 +08:00
x86: drop vex_mode and vex_scalar_mode
These are fully redundant with, respectively, x_mode and scalar_mode.
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@ -384,10 +384,10 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define XMM0 { XMM_Fixup, 0 }
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#define FXSAVE { FXSAVE_Fixup, 0 }
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#define Vex { OP_VEX, vex_mode }
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#define VexW { OP_VexW, vex_mode }
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#define VexScalar { OP_VEX, vex_scalar_mode }
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#define VexScalarR { OP_VexR, vex_scalar_mode }
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#define Vex { OP_VEX, x_mode }
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#define VexW { OP_VexW, x_mode }
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#define VexScalar { OP_VEX, scalar_mode }
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#define VexScalarR { OP_VexR, scalar_mode }
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#define VexGatherD { OP_VEX, vex_vsib_d_w_dq_mode }
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#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
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#define VexGdq { OP_VEX, dq_mode }
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@ -546,8 +546,6 @@ enum
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dw_mode,
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/* registers like dq_mode, memory like d_mode. */
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dqd_mode,
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/* normal vex mode */
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vex_mode,
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/* Operand size depends on the VEX.W bit, with VSIB dword indices. */
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vex_vsib_d_w_dq_mode,
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@ -558,8 +556,6 @@ enum
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/* scalar, ignore vector length. */
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scalar_mode,
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/* like vex_mode, ignore vector length. */
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vex_scalar_mode,
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/* Operand size depends on the VEX.W bit, ignore vector length. */
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vex_scalar_w_dq_mode,
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@ -13274,7 +13270,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
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switch (bytemode)
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{
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case vex_scalar_mode:
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case scalar_mode:
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oappend (names_xmm[reg]);
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return;
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@ -13343,7 +13339,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
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case 128:
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switch (bytemode)
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{
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case vex_mode:
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case x_mode:
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names = names_xmm;
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break;
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case dq_mode:
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@ -13369,7 +13365,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
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case 256:
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switch (bytemode)
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{
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case vex_mode:
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case x_mode:
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names = names_ymm;
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break;
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case mask_bd_mode:
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