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PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbti extension

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gas/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* config/tc-arm.c (T16_32_TAB): Add '_pacg'.
	(do_t_pacbti_pacg): New function.
	(insns): Define 'pacg' insn.
	* testsuite/gas/arm/armv8_1-m-pacbti.d: Add 'pacg' test.
	* testsuite/gas/arm/armv8_1-m-pacbti.s: Likewise.

opcodes/
2021-06-11  Andrea Corallo  <andrea.corallo@arm.com>

	* arm-dis.c (thumb32_opcodes): Add 'pacg'.
This commit is contained in:
Andrea Corallo
2021-06-08 19:03:29 +02:00
parent be05908c0c
commit 5c43020d83
4 changed files with 18 additions and 0 deletions
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14
gas/config/tc-arm.c
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@ -11513,6 +11513,7 @@ encode_thumb32_addr_mode (int i, bool is_t, bool is_d)
X(_orrs, 4300, ea500000), \
X(_pac, 0000, f3af801d), \
X(_pacbti, 0000, f3af800d), \
X(_pacg, 0000, fb60f000), \
X(_pop, bc00, e8bd0000), /* ldmia sp!,... */ \
X(_push, b400, e92d0000), /* stmdb sp!,... */ \
X(_rev, ba00, fa90f080), \
@ -22357,6 +22358,18 @@ do_t_pacbti_nonop (void)
inst.instruction |= inst.operands[2].reg;
}
static void
do_t_pacbti_pacg (void)
{
constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, pacbti_ext),
_(BAD_PACBTI));
inst.instruction = THUMB_OP32 (inst.instruction);
inst.instruction |= inst.operands[0].reg << 8;
inst.instruction |= inst.operands[1].reg << 16;
inst.instruction |= inst.operands[2].reg;
}
/* Overall per-instruction processing. */
@ -26351,6 +26364,7 @@ static const struct asm_opcode insns[] =
toU("bxaut", _bxaut, 3, (RR, RR, RR), t_pacbti_nonop),
toU("pac", _pac, 3, (R12, LR, SP), t_pacbti),
toU("pacbti", _pacbti, 3, (R12, LR, SP), t_pacbti),
toU("pacg", _pacg, 3, (RR, RR, RR), t_pacbti_pacg),
toU("cinc", _cinc, 3, (RRnpcsp, RR_ZR, COND), t_cond),
toU("cinv", _cinv, 3, (RRnpcsp, RR_ZR, COND), t_cond),
toU("cneg", _cneg, 3, (RRnpcsp, RR_ZR, COND), t_cond),

1
gas/testsuite/gas/arm/armv8_1-m-pacbti.d
View File

@ -12,4 +12,5 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f3af 801d pac r12, lr, sp
0[0-9a-f]+ <[^>]+> fb54 3f15 bxaut r3, r4, r5
0[0-9a-f]+ <[^>]+> fb54 3f05 autg r3, r4, r5
0[0-9a-f]+ <[^>]+> fb64 f305 pacg r3, r4, r5
#...

1
gas/testsuite/gas/arm/armv8_1-m-pacbti.s
View File

@ -8,3 +8,4 @@
pac r12, lr, sp
bxaut r3, r4, r5
autg r3, r4, r5
pacg r3, r4, r5

2
opcodes/arm-dis.c
View File

@ -4666,6 +4666,8 @@ static const struct opcode32 thumb32_opcodes[] =
0xf3af801d, 0xffffffff, "pac\tr12, lr, sp"},
{ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_1M_MAIN),
0xf3af800d, 0xffffffff, "pacbti\tr12, lr, sp"},
{ARM_FEATURE_CORE_HIGH_HIGH (ARM_EXT3_PACBTI),
0xfb60f000, 0xfff0f0f0, "pacg%c\t%8-11r, %16-19r, %0-3r"},
/* Armv8.1-M Mainline and Armv8.1-M Mainline Security Extensions
instructions. */