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ppc/svp64: support svstep instructions

Browse Source 
https://libre-soc.org/openpower/sv/
https://libre-soc.org/openpower/sv/svstep/
https://libre-soc.org/openpower/isa/simplev/
This commit is contained in:
Dmitry Selyutin
2022-07-25 16:10:17 +03:00
committed by Alan Modra
parent 5eafd6deb4
commit 4c388a8e2c
4 changed files with 22 additions and 0 deletions
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1
gas/testsuite/gas/ppc/ppc.exp
View File

@ -156,3 +156,4 @@ run_dump_test "pr27676"
run_dump_test "raw"
run_dump_test "setvl"
run_dump_test "svstep"

13
gas/testsuite/gas/ppc/svstep.d Normal file
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@ -0,0 +1,13 @@
#as: -mlibresoc
#objdump: -dr -Mlibresoc
.*: file format .*
Disassembly of section \.text:
0+ <\.text>:
.*: (27 00 00 58|58 00 00 27) svstep. r0,1,0
.*: (26 00 00 58|58 00 00 26) svstep r0,1,0
.*: (26 00 e0 5b|5b e0 00 26) svstep r31,1,0
.*: (26 7e 00 58|58 00 7e 26) svstep r0,64,0
.*: (66 00 00 58|58 00 00 66) svstep r0,1,1

5
gas/testsuite/gas/ppc/svstep.s Normal file
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@ -0,0 +1,5 @@
svstep. 0,1,0
svstep 0,1,0
svstep 31,1,0
svstep 0,64,0
svstep 0,1,1

3
opcodes/ppc-opc.c
View File

@ -6788,6 +6788,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"rlmi", M(22,0), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}},
{"rlmi.", M(22,1), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}},
{"svstep", SVL(22,19,0), SVL_MASK, SVP64, PPCVLE, {RT, SVi, vf}},
{"svstep.", SVL(22,19,1), SVL_MASK, SVP64, PPCVLE, {RT, SVi, vf}},
{"setvl", SVL(22,27,0), SVL_MASK, SVP64, PPCVLE, {RT, RA, SVi, vf, vs, ms}},
{"setvl.", SVL(22,27,1), SVL_MASK, SVP64, PPCVLE, {RT, RA, SVi, vf, vs, ms}},