mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-20 18:08:24 +08:00
sim: h8300: invert sim_cpu storage
This commit is contained in:
@ -57,13 +57,13 @@ static int memory_size;
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static unsigned int
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h8_get_reg (sim_cpu *cpu, int regnum)
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{
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return cpu->regs[regnum];
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return H8300_SIM_CPU (cpu)->regs[regnum];
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}
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static void
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h8_set_reg (sim_cpu *cpu, int regnum, int val)
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{
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cpu->regs[regnum] = val;
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H8300_SIM_CPU (cpu)->regs[regnum] = val;
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}
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#define h8_get_ccr(cpu) h8_get_reg (cpu, CCR_REGNUM)
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@ -88,25 +88,25 @@ h8_set_reg (sim_cpu *cpu, int regnum, int val)
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static int
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h8_get_mask (sim_cpu *cpu)
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{
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return cpu->mask;
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return H8300_SIM_CPU (cpu)->mask;
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}
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static void
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h8_set_mask (sim_cpu *cpu, int val)
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{
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cpu->mask = val;
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H8300_SIM_CPU (cpu)->mask = val;
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}
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#if 0
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static int
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h8_get_exception (sim_cpu *cpu)
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{
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return cpu->exception;
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return H8300_SIM_CPU (cpu)->exception;
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}
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static void
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h8_set_exception (sim_cpu *cpu, int val)
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{
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cpu->exception = val;
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H8300_SIM_CPU (cpu)->exception = val;
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}
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static enum h8300_sim_state
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@ -125,7 +125,7 @@ h8_set_state (SIM_DESC sd, enum h8300_sim_state val)
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static unsigned int *
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h8_get_reg_buf (sim_cpu *cpu)
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{
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return &cpu->regs[0];
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return &H8300_SIM_CPU (cpu)->regs[0];
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}
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#ifdef ADEBUG
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@ -145,77 +145,77 @@ h8_increment_stats (SIM_DESC sd, int idx)
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static unsigned char *
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h8_get_memory_buf (sim_cpu *cpu)
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{
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return cpu->memory;
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return H8300_SIM_CPU (cpu)->memory;
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}
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static void
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h8_set_memory_buf (sim_cpu *cpu, unsigned char *ptr)
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{
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cpu->memory = ptr;
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H8300_SIM_CPU (cpu)->memory = ptr;
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}
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static unsigned char
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h8_get_memory (sim_cpu *cpu, int idx)
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{
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ASSERT (idx < memory_size);
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return cpu->memory[idx];
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return H8300_SIM_CPU (cpu)->memory[idx];
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}
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static void
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h8_set_memory (sim_cpu *cpu, int idx, unsigned int val)
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{
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ASSERT (idx < memory_size);
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cpu->memory[idx] = (unsigned char) val;
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H8300_SIM_CPU (cpu)->memory[idx] = (unsigned char) val;
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}
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static unsigned int
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h8_get_delayed_branch (sim_cpu *cpu)
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{
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return cpu->delayed_branch;
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return H8300_SIM_CPU (cpu)->delayed_branch;
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}
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static void
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h8_set_delayed_branch (sim_cpu *cpu, unsigned int dest)
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{
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cpu->delayed_branch = dest;
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H8300_SIM_CPU (cpu)->delayed_branch = dest;
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}
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static char **
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h8_get_command_line (sim_cpu *cpu)
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{
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return cpu->command_line;
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return H8300_SIM_CPU (cpu)->command_line;
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}
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static void
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h8_set_command_line (sim_cpu *cpu, char ** val)
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{
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cpu->command_line = val;
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H8300_SIM_CPU (cpu)->command_line = val;
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}
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static char *
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h8_get_cmdline_arg (sim_cpu *cpu, int index)
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{
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return cpu->command_line[index];
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return H8300_SIM_CPU (cpu)->command_line[index];
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}
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static void
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h8_set_cmdline_arg (sim_cpu *cpu, int index, char * val)
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{
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cpu->command_line[index] = val;
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H8300_SIM_CPU (cpu)->command_line[index] = val;
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}
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/* MAC Saturation Mode */
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static int
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h8_get_macS (sim_cpu *cpu)
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{
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return cpu->macS;
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return H8300_SIM_CPU (cpu)->macS;
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}
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#if 0
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static void
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h8_set_macS (sim_cpu *cpu, int val)
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{
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cpu->macS = (val != 0);
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H8300_SIM_CPU (cpu)->macS = (val != 0);
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}
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#endif
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@ -223,39 +223,39 @@ h8_set_macS (sim_cpu *cpu, int val)
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static int
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h8_get_macZ (sim_cpu *cpu)
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{
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return cpu->macZ;
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return H8300_SIM_CPU (cpu)->macZ;
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}
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static void
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h8_set_macZ (sim_cpu *cpu, int val)
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{
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cpu->macZ = (val != 0);
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H8300_SIM_CPU (cpu)->macZ = (val != 0);
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}
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/* MAC Negative Flag */
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static int
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h8_get_macN (sim_cpu *cpu)
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{
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return cpu->macN;
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return H8300_SIM_CPU (cpu)->macN;
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}
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static void
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h8_set_macN (sim_cpu *cpu, int val)
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{
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cpu->macN = (val != 0);
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H8300_SIM_CPU (cpu)->macN = (val != 0);
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}
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/* MAC Overflow Flag */
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static int
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h8_get_macV (sim_cpu *cpu)
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{
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return cpu->macV;
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return H8300_SIM_CPU (cpu)->macV;
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}
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static void
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h8_set_macV (sim_cpu *cpu, int val)
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{
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cpu->macV = (val != 0);
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H8300_SIM_CPU (cpu)->macV = (val != 0);
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}
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/* End CPU data object. */
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@ -1593,7 +1593,7 @@ init_pointers (SIM_DESC sd)
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h8_set_mask (cpu, memory_size - 1);
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memset (h8_get_reg_buf (cpu), 0, sizeof (cpu->regs));
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memset (h8_get_reg_buf (cpu), 0, sizeof (H8300_SIM_CPU (cpu)->regs));
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for (i = 0; i < 8; i++)
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{
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@ -4592,13 +4592,13 @@ static const OPTION h8300_options[] =
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static sim_cia
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h8300_pc_get (sim_cpu *cpu)
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{
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return cpu->pc;
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return H8300_SIM_CPU (cpu)->pc;
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}
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static void
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h8300_pc_set (sim_cpu *cpu, sim_cia pc)
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{
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cpu->pc = pc;
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H8300_SIM_CPU (cpu)->pc = pc;
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}
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/* Cover function of sim_state_free to free the cpu buffers as well. */
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@ -4629,7 +4629,8 @@ sim_open (SIM_OPEN_KIND kind,
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current_target_byte_order = BFD_ENDIAN_BIG;
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
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if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct h8300_sim_cpu))
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!= SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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@ -5,6 +5,8 @@
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define SIM_HAVE_COMMON_SIM_CPU
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#define DEBUG
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/* These define the size of main memory for the simulator.
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@ -114,7 +116,7 @@ typedef struct
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#endif
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} decoded_inst;
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struct _sim_cpu {
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struct h8300_sim_cpu {
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unsigned int regs[20]; /* 8 GR's plus ZERO, SBR, and VBR. */
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unsigned int pc;
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@ -128,9 +130,8 @@ struct _sim_cpu {
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unsigned char *memory;
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int mask;
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sim_cpu_base base;
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};
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#define H8300_SIM_CPU(sd) ((struct h8300_sim_cpu *) CPU_ARCH_DATA (sd))
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struct h8300_sim_state {
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unsigned long memory_size;
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@ -142,8 +143,8 @@ struct h8300_sim_state {
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/* The current state of the processor; registers, memory, etc. */
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#define cpu_set_pc(CPU, VAL) (((CPU)->pc) = (VAL))
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#define cpu_get_pc(CPU) (((CPU)->pc))
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#define cpu_set_pc(cpu, val) (H8300_SIM_CPU (cpu)->pc = (val))
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#define cpu_get_pc(cpu) (H8300_SIM_CPU (cpu)->pc)
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/* Magic numbers used to distinguish an exit from a breakpoint. */
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#define LIBC_EXIT_MAGIC1 0xdead
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