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x86: fold AVX scalar to/from int conversion insns

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There's no point doing a separate decode of the VEX.L bit - both decoded
forms are identical.
This commit is contained in:
Jan Beulich
2019-06-27 08:50:28 +02:00
committed by Jan Beulich
parent c1dc7af521
commit 2b7bcc8740
2 changed files with 15 additions and 48 deletions
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9
opcodes/ChangeLog
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@ -1,3 +1,12 @@
2019-06-27 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3,
VEX_LEN_0F2C_P_1, VEX_LEN_0F2C_P_3, VEX_LEN_0F2D_P_1,
VEX_LEN_0F2D_P_3): Delete.
(vex_len_table): Move vcvtsi2ss, vcvtsi2sd, vcvttss2si,
vcvttsd2si, vcvtss2si, and vcvtsd2si leaf entries ...
(prefix_table): ... here.
2019-06-27 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (Iq): Delete.

54
opcodes/i386-dis.c
View File

@ -1818,12 +1818,6 @@ enum
VEX_LEN_0F16_P_0_M_1,
VEX_LEN_0F16_P_2,
VEX_LEN_0F17_M_0,
VEX_LEN_0F2A_P_1,
VEX_LEN_0F2A_P_3,
VEX_LEN_0F2C_P_1,
VEX_LEN_0F2C_P_3,
VEX_LEN_0F2D_P_1,
VEX_LEN_0F2D_P_3,
VEX_LEN_0F41_P_0,
VEX_LEN_0F41_P_2,
VEX_LEN_0F42_P_0,
@ -4696,25 +4690,25 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_VEX_0F2A */
{
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F2A_P_1) },
{ "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F2A_P_3) },
{ "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
},
/* PREFIX_VEX_0F2C */
{
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F2C_P_1) },
{ "vcvttss2si", { Gdq, EXdScalar }, 0 },
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F2C_P_3) },
{ "vcvttsd2si", { Gdq, EXqScalar }, 0 },
},
/* PREFIX_VEX_0F2D */
{
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F2D_P_1) },
{ "vcvtss2si", { Gdq, EXdScalar }, 0 },
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F2D_P_3) },
{ "vcvtsd2si", { Gdq, EXqScalar }, 0 },
},
/* PREFIX_VEX_0F2E */
@ -9341,42 +9335,6 @@ static const struct dis386 vex_len_table[][2] = {
{ "vmovhpX", { EXq, XM }, 0 },
},
/* VEX_LEN_0F2A_P_1 */
{
{ "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
{ "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
},
/* VEX_LEN_0F2A_P_3 */
{
{ "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
{ "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
},
/* VEX_LEN_0F2C_P_1 */
{
{ "vcvttss2si", { Gdq, EXdScalar }, 0 },
{ "vcvttss2si", { Gdq, EXdScalar }, 0 },
},
/* VEX_LEN_0F2C_P_3 */
{
{ "vcvttsd2si", { Gdq, EXqScalar }, 0 },
{ "vcvttsd2si", { Gdq, EXqScalar }, 0 },
},
/* VEX_LEN_0F2D_P_1 */
{
{ "vcvtss2si", { Gdq, EXdScalar }, 0 },
{ "vcvtss2si", { Gdq, EXdScalar }, 0 },
},
/* VEX_LEN_0F2D_P_3 */
{
{ "vcvtsd2si", { Gdq, EXqScalar }, 0 },
{ "vcvtsd2si", { Gdq, EXqScalar }, 0 },
},
/* VEX_LEN_0F41_P_0 */
{
{ Bad_Opcode },