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MIPS/LD: Skip overflow check for %pcrel_hi relocations

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Overflow checks were removed for all hi16 relocations except PC-relative
high relocations per PR ld/16720.  Remove overflow checks from %pcrel_hi
relocations so that we can correctly handle negative offsets from PC.

bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_PCHI16>:
	Remove overflow check.

ld/
	* testsuite/ld-mips-elf/undefweak-overflow.s: Remove test case
	for pcrel_hi/pcrel_lo.
	* testsuite/ld-mips-elf/undefweak-overflow.d: Update to match.
	* testsuite/ld-mips-elf/reloc-pcrel-r6.s: New test source.
	* testsuite/ld-mips-elf/reloc-pcrel-r6.d: New test linker script.
	* testsuite/ld-mips-elf/reloc-pcrel-r6.ld: New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
This commit is contained in:
Faraz Shahbazker
2019-05-23 18:16:08 -07:00
parent a2f4b66c9e
commit 1e129bbefa
9 changed files with 78 additions and 13 deletions
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5
bfd/ChangeLog
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@ -1,3 +1,8 @@
2019-05-28 Faraz Shahbazker <fshahbazker@wavecomp.com>
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_PCHI16>:
Remove overflow check.
2019-05-28 Alan Modra <amodra@gmail.com>
PR 24596

2
bfd/elfxx-mips.c
View File

@ -6326,8 +6326,6 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
case R_MIPS_PCHI16:
value = mips_elf_high (symbol + addend - p);
if (was_local_p || h->root.root.type != bfd_link_hash_undefweak)
overflowed_p = mips_elf_overflow_p (value, 16);
value &= howto->dst_mask;
break;

10
ld/ChangeLog
View File

@ -1,3 +1,13 @@
2019-05-28 Faraz Shahbazker <fshahbazker@wavecomp.com>
* testsuite/ld-mips-elf/undefweak-overflow.s: Remove test case
for pcrel_hi/pcrel_lo.
* testsuite/ld-mips-elf/undefweak-overflow.d: Update to match.
* testsuite/ld-mips-elf/reloc-pcrel-r6.s: New test source.
* testsuite/ld-mips-elf/reloc-pcrel-r6.d: New test linker script.
* testsuite/ld-mips-elf/reloc-pcrel-r6.ld: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2019-05-28 Alan Modra <amodra@gmail.com>
PR 24596

2
ld/testsuite/ld-mips-elf/mips-elf.exp
View File

@ -1656,3 +1656,5 @@ run_dump_test_o32 "pic-reloc-6"
run_dump_test_n64 "pic-reloc-7"
run_dump_test_n64 "pic-reloc-7" [list [list name (microMIPS)] \
[list as "-mmicromips"]]
run_dump_test_o32 "reloc-pcrel-r6"

18
ld/testsuite/ld-mips-elf/reloc-pcrel-r6.d Normal file
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@ -0,0 +1,18 @@
#name: MIPS r6 PC-relative hi+lo relocations
#ld: -Treloc-pcrel-r6.ld -e0
#as: -mips32r6
#objdump: -dr --prefix-addresses --show-raw-insn
#dump: reloc-pcrel-r6.d
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <test> ec9ed000 auipc a0,0xd000
[0-9a-f]+ <[^>]*> 24840001 addiu a0,a0,1
[0-9a-f]+ <[^>]*> ec9e0000 auipc a0,0x0
[0-9a-f]+ <[^>]*> 2484eff8 addiu a0,a0,-4104
[0-9a-f]+ <[^>]*> ec9e0001 auipc a0,0x1
[0-9a-f]+ <[^>]*> 2484eff0 addiu a0,a0,-4112
[0-9a-f]+ <[^>]*> ec9e4000 auipc a0,0x4000
[0-9a-f]+ <[^>]*> 2484ffe9 addiu a0,a0,-23
\.\.\.

9
ld/testsuite/ld-mips-elf/reloc-pcrel-r6.ld Normal file
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@ -0,0 +1,9 @@
SECTIONS
{
x1 = 0x10000001; /* lower and far */
x2 = 0x3ffff000; /* lower and near */
. = 0x40000000;
.text : { *(.text) }
x3 = 0x4000f000; /* high and near */
x4 = 0x80000001; /* high and far */
}

27
ld/testsuite/ld-mips-elf/reloc-pcrel-r6.s Normal file
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@ -0,0 +1,27 @@
.text
.globl test
.globl x1
.globl x2
.globl x3
.globl x4
.ent test
test:
1:
auipc $a0,%pcrel_hi(x1)
2:
addiu $a0,$a0,%pcrel_lo(x1+(2b-1b))
1:
auipc $a0,%pcrel_hi(x2)
2:
addiu $a0,$a0, %pcrel_lo(x2+(2b-1b))
1:
auipc $a0,%pcrel_hi(x3)
2:
addiu $a0,$a0,%pcrel_lo(x3+(2b-1b))
1:
auipc $a0,%pcrel_hi(x4)
2:
addiu $a0,$a0,%pcrel_lo(x4+(2b-1b))
.end test
.align 2, 0
.space 8

16
ld/testsuite/ld-mips-elf/undefweak-overflow.d
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@ -10,11 +10,9 @@
[ 0-9a-f]+: ec4ffffd lwpc v0,20000000 <_ftext>
[ 0-9a-f]+: ec5bfffe ldpc v0,20000000 <_ftext>
[ 0-9a-f]+: cbfffffa bc 20000000 <_ftext>
[ 0-9a-f]+: ec9ee000 auipc a0,0xe000
[ 0-9a-f]+: 2484ffe8 addiu a0,a0,-24
[ 0-9a-f]+: 1000fff7 b 20000000 <_ftext>
[ 0-9a-f]+: 1000fff9 b 20000000 <_ftext>
[ 0-9a-f]+: 00000000 nop
[ 0-9a-f]+: 0411fff5 bal 20000000 <_ftext>
[ 0-9a-f]+: 0411fff7 bal 20000000 <_ftext>
[ 0-9a-f]+: 3c...... lui a0,0x....
[ 0-9a-f]+: 0c000000 jal 20000000 <_ftext>
[ 0-9a-f]+: 00000000 nop
@ -22,13 +20,13 @@
[ 0-9a-f]+: 00000000 nop
[0-9a-f]+ <micro>:
[ 0-9a-f]+: 8e5f beqz a0,20000000 <_ftext>
[ 0-9a-f]+: 8e63 beqz a0,20000000 <_ftext>
[ 0-9a-f]+: 0c00 nop
[ 0-9a-f]+: cfdd b 20000000 <_ftext>
[ 0-9a-f]+: cfe1 b 20000000 <_ftext>
[ 0-9a-f]+: 0c00 nop
[ 0-9a-f]+: 9400 ffda b 20000000 <_ftext>
[ 0-9a-f]+: 9400 ffde b 20000000 <_ftext>
[ 0-9a-f]+: 0c00 nop
[ 0-9a-f]+: 4060 ffd7 bal 20000000 <_ftext>
[ 0-9a-f]+: 4060 ffdb bal 20000000 <_ftext>
[ 0-9a-f]+: 0000 0000 nop
[ 0-9a-f]+: f400 0000 jal 20000000 <_ftext>
[ 0-9a-f]+: 0000 0000 nop
@ -36,7 +34,7 @@
[ 0-9a-f]+: 0c00 nop
[0-9a-f]+ <mips16>:
[ 0-9a-f]+: f7df 100c b 20000000 <_ftext>
[ 0-9a-f]+: f7df 1010 b 20000000 <_ftext>
[ 0-9a-f]+: 1800 0000 jal 20000000 <_ftext>
[ 0-9a-f]+: 6500 nop
#pass

2
ld/testsuite/ld-mips-elf/undefweak-overflow.s
View File

@ -13,8 +13,6 @@ start:
lwpc $2, foo
ldpc $2, foo
bc foo
auipc $4, %pcrel_hi(foo)
addiu $4, $4, %pcrel_lo(foo+4)
b foo
nop