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x86-64: REX prefix is invalid with VEX etc
Just like for the data size prefix (see commit 7a8655d2bbdc ["x86: don't abort() upon DATA16 prefix on (E)VEX encoded insn"]), any form of REX prefix is invalid with VEX/XOP/EVEX.
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@ -1,3 +1,16 @@
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2020-06-25 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (md_assemble): Also reject explicit REX
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prefixes with VEX and alike encoded insns. Zap consumed bits
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from i.rex.
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(output_insn): Don't ignore REX prefix for VEX and alike
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encodings; abort() instead if encountered.
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* testsuite/gas/i386/x86-64-pseudos.s: Move REX-with-VEX cases
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...
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* testsuite/gas/i386/x86-64-pseudos-bad.s: ... here.
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* testsuite/gas/i386/x86-64-pseudos.d,
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testsuite/gas/i386/x86-64-pseudos-bad.l: Adjust expectations.
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2020-06-25 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_operands): Translate explicit REX
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@ -4893,10 +4893,20 @@ md_assemble (char *line)
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return;
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}
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/* Check for explicit REX prefix. */
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if (i.prefix[REX_PREFIX] || i.rex_encoding)
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{
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as_bad (_("REX prefix invalid with `%s'"), i.tm.name);
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return;
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}
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if (i.tm.opcode_modifier.vex)
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build_vex_prefix (t);
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else
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build_evex_prefix ();
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/* The individual REX.RXBW bits got consumed. */
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i.rex &= REX_OPCODE;
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}
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/* Handle conversion of 'int $3' --> special int3 insn. XOP or FMA4
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@ -9275,9 +9285,6 @@ output_insn (void)
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if (*q)
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switch (j)
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{
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case REX_PREFIX:
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/* REX byte is encoded in VEX prefix. */
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break;
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case SEG_PREFIX:
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case ADDR_PREFIX:
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FRAG_APPEND_1_CHAR (*q);
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@ -1,3 +1,6 @@
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.*: Assembler messages:
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.*:3: Error: .*`vmovaps'.*
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.*:4: Error: .*`vmovaps'.*
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.*:5: Error: .*`vmovaps'.*
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.*:6: Error: .*`vmovaps'.*
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.*:7: Error: .*`rorx'.*
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@ -2,3 +2,6 @@
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pseudos:
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{vex} vmovaps %xmm0, %xmm30
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{vex3} vmovaps %xmm30, %xmm0
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{rex} vmovaps %xmm7,%xmm2
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{rex} vmovaps %xmm17,%xmm2
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{rex} rorx $7,%eax,%ebx
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@ -310,9 +310,6 @@ Disassembly of section .text:
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+[a-f0-9]+: 41 0f 28 10 movaps \(%r8\),%xmm2
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+[a-f0-9]+: 40 0f 38 01 01 rex phaddw \(%rcx\),%mm0
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+[a-f0-9]+: 41 0f 38 01 00 phaddw \(%r8\),%mm0
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+[a-f0-9]+: c5 f8 28 d7 vmovaps %xmm7,%xmm2
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+[a-f0-9]+: 62 b1 7c 08 28 d1 vmovaps %xmm17,%xmm2
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+[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
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+[a-f0-9]+: c4 e1 78 28 d7 vmovaps %xmm7,%xmm2
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+[a-f0-9]+: c4 e1 78 28 d7 vmovaps %xmm7,%xmm2
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+[a-f0-9]+: c4 e1 78 29 fa vmovaps %xmm7,%xmm2
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@ -351,7 +348,4 @@ Disassembly of section .text:
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+[a-f0-9]+: 41 0f 28 10 movaps \(%r8\),%xmm2
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+[a-f0-9]+: 40 0f 38 01 01 rex phaddw \(%rcx\),%mm0
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+[a-f0-9]+: 41 0f 38 01 00 phaddw \(%r8\),%mm0
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+[a-f0-9]+: c5 f8 28 d7 vmovaps %xmm7,%xmm2
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+[a-f0-9]+: 62 b1 7c 08 28 d1 vmovaps %xmm17,%xmm2
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+[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
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#pass
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@ -314,9 +314,6 @@ _start:
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{rex} movaps (%r8),%xmm2
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{rex} phaddw (%rcx),%mm0
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{rex} phaddw (%r8),%mm0
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{rex} vmovaps %xmm7,%xmm2
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{rex} vmovaps %xmm17,%xmm2
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{rex} rorx $7,%eax,%ebx
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.intel_syntax noprefix
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{vex3} vmovaps xmm2,xmm7
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@ -357,6 +354,3 @@ _start:
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{rex} movaps xmm2,XMMWORD PTR [r8]
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{rex} phaddw mm0,QWORD PTR [rcx]
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{rex} phaddw mm0,QWORD PTR [r8]
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{rex} vmovaps xmm2,xmm7
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{rex} vmovaps xmm2,xmm17
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{rex} rorx ebx,eax,0x7
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