espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-20 18:08:24 +08:00
Code Issues Packages Projects Releases Wiki Activity

sim: ppc: change spreg switch table generation to compile-time

Browse Source 
Simplify the generator by always outputting the switch tables, and
leave the choice of whether to use them to the compiler via a -D
flag.
This commit is contained in:
Mike Frysinger
2022-11-10 02:50:52 +07:00
parent 09d236daec
commit 043f950abe
4 changed files with 16 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
sim/ppc/Makefile.in
View File

@ -70,6 +70,7 @@ FLOAT_CFLAGS = @sim_float@
MONITOR_CFLAGS = @sim_monitor@
MODEL_CFLAGS = @sim_model@ @sim_default_model@ @sim_model_issue@
TERMIO_CFLAGS = @sim_termio@
SWITCH_CFLAGS = @sim_switch@
CONFIG_CFLAGS = \
$(SMP_CFLAGS) \
$(XOR_ENDIAN_CFLAGS) \
@ -79,7 +80,8 @@ CONFIG_CFLAGS = \
$(FLOAT_CFLAGS) \
$(MONITOR_CFLAGS) \
$(MODEL_CFLAGS) \
$(TERMIO_CFLAGS)
$(TERMIO_CFLAGS) \
$(SWITCH_CFLAGS)
SIM_FPU_CFLAGS = -DHAVE_COMMON_FPU -I../common -I${srcdir}/../common
STD_CFLAGS = $(CFLAGS) $(WERROR_CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(INCGNU) $(SIM_FPU_CFLAGS)
@ -99,7 +101,7 @@ IGEN_FILTER = @sim_filter@
IGEN_ICACHE = @sim_icache@
IGEN_SMP = @sim_igen_smp@
IGEN_LINE_NR = @sim_line_nr@
DGEN_FLAGS = @sim_switch@
DGEN_FLAGS =
IGEN_FLAGS = \
$(IGEN_DECODE_MECHANISM) \

2
sim/ppc/configure vendored
View File

@ -3498,7 +3498,7 @@ fi
# Check whether --enable-sim-switch was given.
if test "${enable_sim_switch+set}" = set; then :
enableval=$enable_sim_switch; case "${enableval}" in
yes) sim_switch="-s";;
yes) sim_switch="-DWITH_SPREG_SWITCH_TABLE";;
no) sim_switch="";;
*) as_fn_error $? "\"--enable-sim-switch does not take a value\"" "$LINENO" 5; sim_switch="";;
esac

2
sim/ppc/configure.ac
View File

@ -345,7 +345,7 @@ fi])dnl
AC_ARG_ENABLE(sim-switch,
[ --enable-sim-switch Use a switch instead of a table for instruction call.],
[case "${enableval}" in
yes) sim_switch="-s";;
yes) sim_switch="-DWITH_SPREG_SWITCH_TABLE";;
no) sim_switch="";;
*) AC_MSG_ERROR("--enable-sim-switch does not take a value"); sim_switch="";;
esac

21
sim/ppc/dgen.c
View File

@ -39,7 +39,6 @@
/****************************************************************/
int spreg_lookup_table = 1;
enum {
nr_of_sprs = 1024,
};
@ -185,6 +184,7 @@ gen_spreg_c(spreg_table *table, lf *file)
spreg_table_entry *entry;
char **attribute;
int spreg_nr;
int spreg_lookup_table;
lf_print__gnu_copyleft(file);
lf_printf(file, "\n");
@ -229,13 +229,11 @@ gen_spreg_c(spreg_table *table, lf *file)
}
lf_printf(file, "spr_%s(sprs spr)\n", *attribute);
lf_printf(file, "{\n");
if (spreg_lookup_table
|| strcmp(*attribute, "name") == 0
|| strcmp(*attribute, "index") == 0)
lf_printf(file, " return spr_info[spr].%s;\n",
*attribute);
else {
spreg_lookup_table = !(strcmp(*attribute, "name") == 0
|| strcmp(*attribute, "index") == 0);
if (spreg_lookup_table) {
spreg_table_entry *entry;
lf_printf(file, "#ifdef WITH_SPREG_SWITCH_TABLE\n");
lf_printf(file, " switch (spr) {\n");
for (entry = table->sprs; entry != NULL; entry = entry->next) {
if (strcmp(*attribute, "is_valid") == 0) {
@ -261,7 +259,12 @@ gen_spreg_c(spreg_table *table, lf *file)
lf_printf(file, " return 1;\n");
lf_printf(file, " }\n");
lf_printf(file, " return 0;\n");
lf_printf(file, "#else\n");
}
lf_printf(file, " return spr_info[spr].%s;\n",
*attribute);
if (spreg_lookup_table)
lf_printf(file, "#endif\n");
lf_printf(file, "}\n");
}
@ -288,7 +291,6 @@ main(int argc,
if (argc <= 1) {
printf("Usage: dgen ...\n");
printf("-s Use switch instead of table\n");
printf("-n <file-name> Use this as cpp line numbering name\n");
printf("-h Output header file\n");
printf("-p <spreg-file> Output spreg.h(P) or spreg.c(p)\n");
@ -301,9 +303,6 @@ main(int argc,
fprintf(stderr, "\t-%c %s\n", ch, ( optarg ? optarg : ""));
#endif
switch(ch) {
case 's':
spreg_lookup_table = 0;
break;
case 'r':
sprs = spreg_table_load(optarg);
break;