mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-06-18 21:03:17 +08:00
fix(system): Fix wdt crash issue
1. only lock nmi in soft isr; 2. simplify PendSV; 3. more log info when wdt happen; 4. Fix nmi reentried issue; 5. Add some protection code; internal: 5c208f68
This commit is contained in:
6
VERSION
6
VERSION
@ -1,10 +1,10 @@
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gwen:
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gwen:
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crypto: 9ec59b5
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crypto: 9ec59b5
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espnow: 9ec59b5
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espnow: 9ec59b5
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main: cc0968d
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main: e9e3ace
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minic: 9ec59b5
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minic: 9ec59b5
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net80211: f2108f6
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net80211: f2108f6
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pp: 1cf9bb0
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pp: e9e3ace
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pwm: 9ec59b5
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pwm: 9ec59b5
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smartconfig:9ec59b5
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smartconfig:9ec59b5
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wpa: f2108f6
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wpa: f2108f6
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@ -12,7 +12,7 @@ gwen:
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gitlab:
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gitlab:
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espconn: 3a998034
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espconn: 3a998034
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freertos: 66a199b7
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freertos: a9985a9c
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lwip: 4dd2bcd3
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lwip: 4dd2bcd3
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driver: 7bee5263
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driver: 7bee5263
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mbedtls: 1ac9f1f4
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mbedtls: 1ac9f1f4
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Binary file not shown.
BIN
lib/libmain.a
BIN
lib/libmain.a
Binary file not shown.
BIN
lib/libpp.a
BIN
lib/libpp.a
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161
third_party/freertos/port.c
vendored
161
third_party/freertos/port.c
vendored
@ -80,7 +80,6 @@
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extern char NMIIrqIsOn;
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extern char NMIIrqIsOn;
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static char HdlMacSig = 0;
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static char HdlMacSig = 0;
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static char SWReq = 0;
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static char SWReq = 0;
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static char PendSvIsPosted = 0;
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unsigned cpu_sr;
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unsigned cpu_sr;
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@ -103,8 +102,9 @@ pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *p
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sp = (portSTACK_TYPE*)(((INT32U)(pxTopOfStack + 1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
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sp = (portSTACK_TYPE*)(((INT32U)(pxTopOfStack + 1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
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/* Clear the entire frame (do not use memset() because we don't depend on C library) */
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/* Clear the entire frame (do not use memset() because we don't depend on C library) */
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for (tp = sp; tp <= pxTopOfStack; ++tp)
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for (tp = sp; tp <= pxTopOfStack; ++tp) {
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*tp = 0;
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*tp = 0;
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}
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/* Explicitly initialize certain saved registers */
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/* Explicitly initialize certain saved registers */
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SET_STKREG(XT_STK_PC, pxCode); /* task entrypoint */
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SET_STKREG(XT_STK_PC, pxCode); /* task entrypoint */
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@ -124,101 +124,46 @@ pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *p
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return sp;
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return sp;
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}
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}
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void PendSV(char req)
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void PendSV(char req)
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{
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{
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char tmp=0;
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if (req == 1) {
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//ETS_INTR_LOCK();
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if( NMIIrqIsOn == 0 )
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{
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vPortEnterCritical();
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vPortEnterCritical();
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//PortDisableInt_NoNest();
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tmp = 1;
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}
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if(req ==1)
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{
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SWReq = 1;
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SWReq = 1;
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}
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xthal_set_intset(1 << ETS_SOFT_INUM);
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else if(req ==2)
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vPortExitCritical();
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} else if (req == 2) {
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HdlMacSig = 1;
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HdlMacSig = 1;
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#if 0
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GPIO_REG_WRITE(GPIO_STATUS_W1TS_ADDRESS, 0x40);
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#else
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if(PendSvIsPosted == 0)
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{
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PendSvIsPosted = 1;
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xthal_set_intset(1 << ETS_SOFT_INUM);
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xthal_set_intset(1 << ETS_SOFT_INUM);
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}
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}
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#endif
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if(tmp == 1)
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vPortExitCritical();
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}
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}
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extern portBASE_TYPE MacIsrSigPostDefHdl(void);
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extern portBASE_TYPE MacIsrSigPostDefHdl(void);
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#if 0
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void IRAM_FUNC_ATTR
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GPIOIntrHdl(void)
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{
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//if( (GPIO_REG_READ(GPIO_STATUS_ADDRESS) & (1<<6)) == 0 )
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//printf("i");
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//printf("g,%08x\n",GPIO_REG_READ(GPIO_STATUS_ADDRESS));
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//SDIO_CLK GPIO interrupt
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if( (GPIO_REG_READ(GPIO_STATUS_ADDRESS) & (1<<6)) != 0 )
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{
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//CloseNMI();
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portBASE_TYPE xHigherPriorityTaskWoken=pdFALSE ;
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if(HdlMacSig == 1)
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{
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HdlMacSig = 0;
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xHigherPriorityTaskWoken = MacIsrSigPostDefHdl();
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}
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if( xHigherPriorityTaskWoken || (SWReq==1))
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{
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SWReq = 0;
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_xt_timer_int1();
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}
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//OpenNMI();
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 0x40);
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}
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}
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#else
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void SoftIsrHdl(void* arg)
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void SoftIsrHdl(void* arg)
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{
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{
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//if(DbgVal5==1)
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ETS_NMI_LOCK();
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//printf("GP_%d,",SWReq);
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PendSvIsPosted = 0;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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if(HdlMacSig == 1)
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{
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if (HdlMacSig == 1) {
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xHigherPriorityTaskWoken = MacIsrSigPostDefHdl();
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HdlMacSig = 0;
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HdlMacSig = 0;
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xHigherPriorityTaskWoken = MacIsrSigPostDefHdl();
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}
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}
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if( xHigherPriorityTaskWoken || (SWReq==1))
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{
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if (xHigherPriorityTaskWoken || (SWReq == 1)) {
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//if( DbgVal5==1 || DbgVal10==1 )
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//printf("_x_s,");
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_xt_timer_int1();
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_xt_timer_int1();
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SWReq = 0;
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SWReq = 0;
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}
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}
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ETS_NMI_UNLOCK();
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}
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}
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#endif
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void xPortSysTickHandle(void)
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void xPortSysTickHandle(void)
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{
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{
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//CloseNMI();
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if (xTaskIncrementTick() != pdFALSE) {
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{
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if(xTaskIncrementTick() !=pdFALSE )
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{
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//GPIO_REG_WRITE(GPIO_STATUS_W1TS_ADDRESS, 0x40);
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vTaskSwitchContext();
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vTaskSwitchContext();
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}
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}
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}
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}
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//OpenNMI();
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}
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/*
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/*
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* See header file for description.
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* See header file for description.
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@ -226,27 +171,16 @@ void xPortSysTickHandle (void)
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portBASE_TYPE ICACHE_FLASH_ATTR
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portBASE_TYPE ICACHE_FLASH_ATTR
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xPortStartScheduler(void)
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xPortStartScheduler(void)
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{
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{
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//set pendsv and systemtick as lowest priority ISR.
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//pendsv setting
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/*******GPIO sdio_clk isr*********/
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#if 0
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_xt_isr_attach(ETS_GPIO_INUM, GPIOIntrHdl, NULL);
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_xt_isr_unmask(1<<ETS_GPIO_INUM);
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#else
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/*******software isr*********/
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/*******software isr*********/
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_xt_isr_attach(ETS_SOFT_INUM, SoftIsrHdl, NULL);
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_xt_isr_attach(ETS_SOFT_INUM, SoftIsrHdl, NULL);
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_xt_isr_unmask(1 << ETS_SOFT_INUM);
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_xt_isr_unmask(1 << ETS_SOFT_INUM);
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#endif
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/* Initialize system tick timer interrupt and schedule the first tick. */
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/* Initialize system tick timer interrupt and schedule the first tick. */
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_xt_tick_timer_init();
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_xt_tick_timer_init();
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// os_printf("xPortStartScheduler\n");
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vTaskSwitchContext();
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vTaskSwitchContext();
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// REG_SET_BIT(0x3ff2006c, BIT(4));
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/* Restore the context of the first task that is going to run. */
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/* Restore the context of the first task that is going to run. */
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XT_RTOS_INT_EXIT();
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XT_RTOS_INT_EXIT();
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/* Should not get here as the tasks are now running! */
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/* Should not get here as the tasks are now running! */
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@ -261,25 +195,17 @@ vPortEndScheduler( void )
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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static unsigned int tick_lock=0;
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static char ClosedLv1Isr = 0;
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static char ClosedLv1Isr = 0;
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void vPortEnterCritical(void)
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void vPortEnterCritical(void)
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{
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{
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if(NMIIrqIsOn == 0)
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if (NMIIrqIsOn == 0) {
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{
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if (ClosedLv1Isr != 1) {
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//if( uxCriticalNesting == 0 )
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{
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if( ClosedLv1Isr !=1 )
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{
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portDISABLE_INTERRUPTS();
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portDISABLE_INTERRUPTS();
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ClosedLv1Isr = 1;
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ClosedLv1Isr = 1;
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}
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}
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//tick_lock = WDEV_NOW();
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}
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uxCriticalNesting++;
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uxCriticalNesting++;
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}
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}
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}
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}
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@ -287,35 +213,32 @@ void vPortEnterCritical( void )
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void vPortExitCritical(void)
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void vPortExitCritical(void)
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{
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{
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if(NMIIrqIsOn == 0)
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if (NMIIrqIsOn == 0) {
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{
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if (uxCriticalNesting > 0) {
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if(uxCriticalNesting > 0)
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{
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uxCriticalNesting--;
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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if (uxCriticalNesting == 0) {
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if( ClosedLv1Isr ==1 )
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if (ClosedLv1Isr == 1) {
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{
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ClosedLv1Isr = 0;
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ClosedLv1Isr = 0;
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portENABLE_INTERRUPTS();
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portENABLE_INTERRUPTS();
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}
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}
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}
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}
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}
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} else {
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else
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{
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ets_printf("E:C:%d\n", uxCriticalNesting);
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ets_printf("E:C:%d\n", uxCriticalNesting);
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PORT_ASSERT((uxCriticalNesting > 0));
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PORT_ASSERT((uxCriticalNesting > 0));
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}
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}
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}
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}
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}
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}
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void ShowCritical(void)
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void ICACHE_FLASH_ATTR ShowCritical(void)
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{
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{
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ets_printf("ShowCritical:%d\n",uxCriticalNesting);
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os_printf("ShowCritical:%d\n", uxCriticalNesting);
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os_printf("HdlMacSig:%d\n", HdlMacSig);
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os_printf("SWReq:%d\n", SWReq);
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ets_delay_us(50000);
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ets_delay_us(50000);
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}
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}
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void vPortETSIntrLock(void)
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void vPortETSIntrLock(void)
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{
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{
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ETS_INTR_LOCK();
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ETS_INTR_LOCK();
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@ -326,29 +249,20 @@ void vPortETSIntrUnlock( void )
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ETS_INTR_UNLOCK();
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ETS_INTR_UNLOCK();
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}
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}
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void
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void PortDisableInt_NoNest(void)
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PortDisableInt_NoNest( void )
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{
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// printf("ERRRRRRR\n");
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if(NMIIrqIsOn == 0)
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{
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if( ClosedLv1Isr !=1 )
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{
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{
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if (NMIIrqIsOn == 0) {
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if (ClosedLv1Isr != 1) {
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portDISABLE_INTERRUPTS();
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portDISABLE_INTERRUPTS();
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ClosedLv1Isr = 1;
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ClosedLv1Isr = 1;
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}
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}
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}
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}
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}
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}
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void
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void PortEnableInt_NoNest(void)
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PortEnableInt_NoNest( void )
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{
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// printf("ERRRRR\n");
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if(NMIIrqIsOn == 0)
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{
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if( ClosedLv1Isr ==1 )
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{
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{
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if (NMIIrqIsOn == 0) {
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if (ClosedLv1Isr == 1) {
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ClosedLv1Isr = 0;
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ClosedLv1Isr = 0;
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portENABLE_INTERRUPTS();
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portENABLE_INTERRUPTS();
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}
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}
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@ -358,7 +272,6 @@ PortEnableInt_NoNest( void )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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void ICACHE_FLASH_ATTR ResetCcountVal(unsigned int cnt_val)
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void ICACHE_FLASH_ATTR ResetCcountVal(unsigned int cnt_val)
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{
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{
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// XT_WSR_CCOUNT(cnt_val);
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asm volatile("wsr a2, ccount");
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asm volatile("wsr a2, ccount");
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}
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}
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@ -377,10 +290,8 @@ uint16 _xt_isr_handler(uint16 i)
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uint8 index;
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uint8 index;
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if (i & (1 << ETS_WDT_INUM)) {
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if (i & (1 << ETS_WDT_INUM)) {
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// printf("i %x %u\n", i, REG_READ(0x3ff20c00));
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index = ETS_WDT_INUM;
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index = ETS_WDT_INUM;
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}
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} else if (i & (1 << ETS_GPIO_INUM)) {
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else if (i & (1 << ETS_GPIO_INUM)) {
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index = ETS_GPIO_INUM;
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index = ETS_GPIO_INUM;
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} else {
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} else {
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index = __builtin_ffs(i) - 1;
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index = __builtin_ffs(i) - 1;
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Block a user