diff --git a/VERSION b/VERSION
index 8214120a..37395a61 100644
--- a/VERSION
+++ b/VERSION
@@ -1,10 +1,10 @@
 gwen:
     crypto:     9ec59b5
     espnow:     9ec59b5
-    main:       cc0968d
+    main:       e9e3ace
     minic:      9ec59b5
     net80211:   f2108f6
-    pp:         1cf9bb0
+    pp:         e9e3ace
     pwm:        9ec59b5
     smartconfig:9ec59b5
     wpa:        f2108f6
@@ -12,7 +12,7 @@ gwen:
 
 gitlab:
     espconn:    3a998034
-    freertos:   66a199b7
+    freertos:   a9985a9c
     lwip:       4dd2bcd3
     driver:     7bee5263
     mbedtls:    1ac9f1f4
diff --git a/lib/libfreertos.a b/lib/libfreertos.a
index fe1d8bdd..837c9c6b 100644
Binary files a/lib/libfreertos.a and b/lib/libfreertos.a differ
diff --git a/lib/libmain.a b/lib/libmain.a
index 9fd42ec2..6b5988bd 100644
Binary files a/lib/libmain.a and b/lib/libmain.a differ
diff --git a/lib/libpp.a b/lib/libpp.a
index 441a7be4..dfe26118 100644
Binary files a/lib/libpp.a and b/lib/libpp.a differ
diff --git a/third_party/freertos/port.c b/third_party/freertos/port.c
index 415c9d07..ab8472ed 100644
--- a/third_party/freertos/port.c
+++ b/third_party/freertos/port.c
@@ -80,7 +80,6 @@
 extern char NMIIrqIsOn;
 static char HdlMacSig = 0;
 static char SWReq = 0;
-static char PendSvIsPosted = 0;
 
 unsigned cpu_sr;
 
@@ -88,277 +87,191 @@ unsigned cpu_sr;
 variable. */
 static unsigned portBASE_TYPE uxCriticalNesting = 0;
 
-void vPortEnterCritical( void );
-void vPortExitCritical( void );
+void vPortEnterCritical(void);
+void vPortExitCritical(void);
 /*
  * See header file for description.
  */
-portSTACK_TYPE * ICACHE_FLASH_ATTR
-pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
+portSTACK_TYPE* ICACHE_FLASH_ATTR
+pxPortInitialiseStack(portSTACK_TYPE* pxTopOfStack, pdTASK_CODE pxCode, void* pvParameters)
 {
-	#define SET_STKREG(r,v) sp[(r) >> 2] = (portSTACK_TYPE)(v)
-    portSTACK_TYPE *sp, *tp;
+#define SET_STKREG(r,v) sp[(r) >> 2] = (portSTACK_TYPE)(v)
+    portSTACK_TYPE* sp, *tp;
 
     /* Create interrupt stack frame aligned to 16 byte boundary */
-    sp = (portSTACK_TYPE*) (((INT32U)(pxTopOfStack+1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
+    sp = (portSTACK_TYPE*)(((INT32U)(pxTopOfStack + 1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
 
     /* Clear the entire frame (do not use memset() because we don't depend on C library) */
-    for (tp = sp; tp <= pxTopOfStack; ++tp)
+    for (tp = sp; tp <= pxTopOfStack; ++tp) {
         *tp = 0;
+    }
 
     /* Explicitly initialize certain saved registers */
-    SET_STKREG( XT_STK_PC,      pxCode                        );  /* task entrypoint                  */
-    SET_STKREG( XT_STK_A0,      0                           );  /* to terminate GDB backtrace       */
-    SET_STKREG( XT_STK_A1,      (INT32U)sp + XT_STK_FRMSZ   );  /* physical top of stack frame      */
-    SET_STKREG( XT_STK_A2,      pvParameters   );           /* parameters      */
-    SET_STKREG( XT_STK_EXIT,    _xt_user_exit               );  /* user exception exit dispatcher   */
+    SET_STKREG(XT_STK_PC,   pxCode);                        /* task entrypoint                  */
+    SET_STKREG(XT_STK_A0,   0);                             /* to terminate GDB backtrace       */
+    SET_STKREG(XT_STK_A1,   (INT32U)sp + XT_STK_FRMSZ);     /* physical top of stack frame      */
+    SET_STKREG(XT_STK_A2,   pvParameters);                  /* parameters      */
+    SET_STKREG(XT_STK_EXIT, _xt_user_exit);                 /* user exception exit dispatcher   */
 
     /* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
-    #ifdef __XTENSA_CALL0_ABI__
-    SET_STKREG( XT_STK_PS,      PS_UM | PS_EXCM     );
-    #else
+#ifdef __XTENSA_CALL0_ABI__
+    SET_STKREG(XT_STK_PS,      PS_UM | PS_EXCM);
+#else
     /* + for windowed ABI also set WOE and CALLINC (pretend task was 'call4'd). */
-    SET_STKREG( XT_STK_PS,      PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1) );
-    #endif
+    SET_STKREG(XT_STK_PS,      PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1));
+#endif
 
-	return sp;
+    return sp;
 }
 
-
-void PendSV( char req )
+void PendSV(char req)
 {
-	char tmp=0;
-//ETS_INTR_LOCK();
-
-	if( NMIIrqIsOn == 0 )
-	{
-		vPortEnterCritical();
-		//PortDisableInt_NoNest();
-		tmp = 1;
-	}
-
-	if(req ==1)
-	{
-		SWReq = 1;
-	}
-	else if(req ==2)
-		HdlMacSig= 1;
-#if 0
-	GPIO_REG_WRITE(GPIO_STATUS_W1TS_ADDRESS, 0x40);	
-#else
-	if(PendSvIsPosted == 0)
-	{
-		PendSvIsPosted = 1;
-		xthal_set_intset(1<<ETS_SOFT_INUM);
-	}
-#endif
-	if(tmp == 1)
-		vPortExitCritical();
+    if (req == 1) {
+        vPortEnterCritical();
+        SWReq = 1;
+        xthal_set_intset(1 << ETS_SOFT_INUM);
+        vPortExitCritical();
+    } else if (req == 2) {
+        HdlMacSig = 1;
+        xthal_set_intset(1 << ETS_SOFT_INUM);
+    }
 }
 
 extern portBASE_TYPE MacIsrSigPostDefHdl(void);
-#if 0
-void IRAM_FUNC_ATTR
-GPIOIntrHdl(void)
+
+void SoftIsrHdl(void* arg)
 {
-//if( (GPIO_REG_READ(GPIO_STATUS_ADDRESS) & (1<<6)) == 0 )
-	//printf("i");
-	//printf("g,%08x\n",GPIO_REG_READ(GPIO_STATUS_ADDRESS));
-//SDIO_CLK GPIO interrupt
+    ETS_NMI_LOCK();
 
-	if( (GPIO_REG_READ(GPIO_STATUS_ADDRESS) & (1<<6)) != 0 )
-	{
-		//CloseNMI();
+    portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
 
-		portBASE_TYPE xHigherPriorityTaskWoken=pdFALSE ;
-		if(HdlMacSig == 1)
-		{
-			HdlMacSig = 0;
-			xHigherPriorityTaskWoken = MacIsrSigPostDefHdl();
-		}
-		if( xHigherPriorityTaskWoken || (SWReq==1)) 
-		{
-			SWReq = 0;
-			_xt_timer_int1();
-		}
-		//OpenNMI();
-		GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 0x40);
-	}
+    if (HdlMacSig == 1) {
+        HdlMacSig = 0;
+        xHigherPriorityTaskWoken = MacIsrSigPostDefHdl();
+    }
+
+    if (xHigherPriorityTaskWoken || (SWReq == 1)) {
+        _xt_timer_int1();
+        SWReq = 0;
+    }
+
+    ETS_NMI_UNLOCK();
 }
-#else
-void SoftIsrHdl(void *arg)
-{
-//if(DbgVal5==1)
-	//printf("GP_%d,",SWReq);
-	PendSvIsPosted = 0;
-	portBASE_TYPE xHigherPriorityTaskWoken=pdFALSE ;
-	if(HdlMacSig == 1)
-	{
-		xHigherPriorityTaskWoken = MacIsrSigPostDefHdl();
-		HdlMacSig = 0;
-	}
-	if( xHigherPriorityTaskWoken || (SWReq==1)) 
-	{
-//if( DbgVal5==1 || DbgVal10==1 )
-	//printf("_x_s,");
-		_xt_timer_int1();
-		SWReq = 0;
-	}
-}
-#endif
 
-void xPortSysTickHandle (void)
+void xPortSysTickHandle(void)
 {
-	//CloseNMI();
-	{
-		if(xTaskIncrementTick() !=pdFALSE )
-		{
-			//GPIO_REG_WRITE(GPIO_STATUS_W1TS_ADDRESS, 0x40);
-			vTaskSwitchContext();
-		}
-	}
-	//OpenNMI();
+    if (xTaskIncrementTick() != pdFALSE) {
+        vTaskSwitchContext();
+    }
 }
 
 /*
  * See header file for description.
  */
 portBASE_TYPE ICACHE_FLASH_ATTR
-xPortStartScheduler( void )
+xPortStartScheduler(void)
 {
-	//set pendsv and systemtick as lowest priority ISR.
-	//pendsv setting
-			/*******GPIO sdio_clk isr*********/
-#if 0
-    _xt_isr_attach(ETS_GPIO_INUM, GPIOIntrHdl, NULL);
-    _xt_isr_unmask(1<<ETS_GPIO_INUM);
-#else
-			/*******software isr*********/
-   	_xt_isr_attach(ETS_SOFT_INUM, SoftIsrHdl, NULL);
-    _xt_isr_unmask(1<<ETS_SOFT_INUM);
-#endif
+    /*******software isr*********/
+    _xt_isr_attach(ETS_SOFT_INUM, SoftIsrHdl, NULL);
+    _xt_isr_unmask(1 << ETS_SOFT_INUM);
 
     /* Initialize system tick timer interrupt and schedule the first tick. */
     _xt_tick_timer_init();
 
-//    os_printf("xPortStartScheduler\n");
     vTaskSwitchContext();
 
-//    REG_SET_BIT(0x3ff2006c, BIT(4));
-	/* Restore the context of the first task that is going to run. */
+    /* Restore the context of the first task that is going to run. */
+    XT_RTOS_INT_EXIT();
 
-	XT_RTOS_INT_EXIT();
-
-	/* Should not get here as the tasks are now running! */
-	return pdTRUE;
+    /* Should not get here as the tasks are now running! */
+    return pdTRUE;
 }
 
 void ICACHE_FLASH_ATTR
-vPortEndScheduler( void )
+vPortEndScheduler(void)
 {
-	/* It is unlikely that the CM3 port will require this function as there
-	is nothing to return to.  */
+    /* It is unlikely that the CM3 port will require this function as there
+    is nothing to return to.  */
 }
 /*-----------------------------------------------------------*/
 
-
 /*-----------------------------------------------------------*/
 
-static unsigned int tick_lock=0;
 static char ClosedLv1Isr = 0;
 
-void vPortEnterCritical( void )
+void vPortEnterCritical(void)
 {
-	if(NMIIrqIsOn == 0)
-	{	
-		//if( uxCriticalNesting == 0 )
-		{
-			if( ClosedLv1Isr !=1 )
-			{
-				portDISABLE_INTERRUPTS();
-				ClosedLv1Isr = 1;
-			}
-			//tick_lock = WDEV_NOW();
-		}
-		uxCriticalNesting++;
-	}
+    if (NMIIrqIsOn == 0) {
+        if (ClosedLv1Isr != 1) {
+            portDISABLE_INTERRUPTS();
+            ClosedLv1Isr = 1;
+        }
+        uxCriticalNesting++;
+    }
 }
 /*-----------------------------------------------------------*/
 
-void vPortExitCritical( void )
+void vPortExitCritical(void)
 {
-	if(NMIIrqIsOn == 0)
-	{
-		if(uxCriticalNesting > 0)
-		{	
-			uxCriticalNesting--;
-			if( uxCriticalNesting == 0 )
-			{
-				if( ClosedLv1Isr ==1 )
-				{
-					ClosedLv1Isr = 0;
-					portENABLE_INTERRUPTS();
-				}
-			}
-		}		
-		else
-		{
-			ets_printf("E:C:%d\n",uxCriticalNesting);
-			PORT_ASSERT((uxCriticalNesting>0));
-		}
-	}
+    if (NMIIrqIsOn == 0) {
+        if (uxCriticalNesting > 0) {
+            uxCriticalNesting--;
+
+            if (uxCriticalNesting == 0) {
+                if (ClosedLv1Isr == 1) {
+                    ClosedLv1Isr = 0;
+                    portENABLE_INTERRUPTS();
+                }
+            }
+        } else {
+            ets_printf("E:C:%d\n", uxCriticalNesting);
+            PORT_ASSERT((uxCriticalNesting > 0));
+        }
+    }
 }
 
-void ShowCritical(void)
+void ICACHE_FLASH_ATTR ShowCritical(void)
 {
-	ets_printf("ShowCritical:%d\n",uxCriticalNesting);
+    os_printf("ShowCritical:%d\n", uxCriticalNesting);
+    os_printf("HdlMacSig:%d\n", HdlMacSig);
+    os_printf("SWReq:%d\n", SWReq);
+
     ets_delay_us(50000);
 }
 
-
-void vPortETSIntrLock( void )
+void vPortETSIntrLock(void)
 {
-	ETS_INTR_LOCK();
+    ETS_INTR_LOCK();
 }
 
-void vPortETSIntrUnlock( void )
+void vPortETSIntrUnlock(void)
 {
-	ETS_INTR_UNLOCK();
+    ETS_INTR_UNLOCK();
 }
 
-void 
-PortDisableInt_NoNest( void )
+void PortDisableInt_NoNest(void)
 {
-//	printf("ERRRRRRR\n");
-	if(NMIIrqIsOn == 0)	
-	{
-		if( ClosedLv1Isr !=1 )
-		{
-			portDISABLE_INTERRUPTS();
-			ClosedLv1Isr = 1;
-		}
-	}
+    if (NMIIrqIsOn == 0) {
+        if (ClosedLv1Isr != 1) {
+            portDISABLE_INTERRUPTS();
+            ClosedLv1Isr = 1;
+        }
+    }
 }
 
-void 
-PortEnableInt_NoNest( void )
+void PortEnableInt_NoNest(void)
 {
-//	printf("ERRRRR\n");
-
-	if(NMIIrqIsOn == 0)
-	{		
-		if( ClosedLv1Isr ==1 )
-		{
-			ClosedLv1Isr = 0;
-			portENABLE_INTERRUPTS();
-		}
-	}
+    if (NMIIrqIsOn == 0) {
+        if (ClosedLv1Isr == 1) {
+            ClosedLv1Isr = 0;
+            portENABLE_INTERRUPTS();
+        }
+    }
 }
 
 /*-----------------------------------------------------------*/
-void ICACHE_FLASH_ATTR ResetCcountVal( unsigned int cnt_val )
+void ICACHE_FLASH_ATTR ResetCcountVal(unsigned int cnt_val)
 {
-//  XT_WSR_CCOUNT(cnt_val);
     asm volatile("wsr a2, ccount");
 }
 
@@ -366,7 +279,7 @@ _xt_isr_entry isr[16];
 char _xt_isr_status = 0;
 
 void ICACHE_FLASH_ATTR
-_xt_isr_attach(uint8 i, _xt_isr func, void *arg)
+_xt_isr_attach(uint8 i, _xt_isr func, void* arg)
 {
     isr[i].handler = func;
     isr[i].arg = arg;
@@ -374,24 +287,22 @@ _xt_isr_attach(uint8 i, _xt_isr func, void *arg)
 
 uint16 _xt_isr_handler(uint16 i)
 {
-	uint8 index;
+    uint8 index;
 
-	if (i & (1 << ETS_WDT_INUM)) {
-//		printf("i %x %u\n", i, REG_READ(0x3ff20c00));
-		index = ETS_WDT_INUM;
-	} 
-	else if (i & (1 << ETS_GPIO_INUM)) {
-		index = ETS_GPIO_INUM;
-	}else {
-		index = __builtin_ffs(i) - 1;
+    if (i & (1 << ETS_WDT_INUM)) {
+        index = ETS_WDT_INUM;
+    } else if (i & (1 << ETS_GPIO_INUM)) {
+        index = ETS_GPIO_INUM;
+    } else {
+        index = __builtin_ffs(i) - 1;
 
-		if (index == ETS_MAX_INUM) {
-			i &= ~(1 << ETS_MAX_INUM);
-			index = __builtin_ffs(i) - 1;
-		}
-	}
+        if (index == ETS_MAX_INUM) {
+            i &= ~(1 << ETS_MAX_INUM);
+            index = __builtin_ffs(i) - 1;
+        }
+    }
 
-    _xt_clear_ints(1<<index);
+    _xt_clear_ints(1 << index);
 
     _xt_isr_status = 1;
     isr[index].handler(isr[index].arg);