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feat(heap): add heap private config to enable/disable using IRAM as heap

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This commit is contained in:
Chen Wen
2019-07-17 20:58:34 +08:00
committed by dongheng
parent e9d2281335
commit a7aeeb28d5
7 changed files with 49 additions and 24 deletions
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10
components/heap/Kconfig Normal file
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@ -0,0 +1,10 @@
menu "Heap memory"
config HEAP_DISABLE_IRAM
bool "Disable IRAM as heap memory"
default n
help
Disable IRAM as heap memory, and heap memory only use DRAM.
endmenu

26
components/heap/port/esp8266/esp_heap_init.c
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@ -14,26 +14,36 @@
#include "esp_heap_caps.h"
#define HEAP_REGION_IRAM_MIN 512
#define HEAP_REGION_IRAM_MAX 0x00010000
heap_region_t g_heap_region[HEAP_REGIONS_MAX];
/**
* @brief Initialize the capability-aware heap allocator.
*/
void heap_caps_init(void)
{
extern char _bss_end;
size_t heap_region_num = 0;
#ifndef CONFIG_SOC_FULL_ICACHE
#ifndef CONFIG_HEAP_DISABLE_IRAM
extern char _iram_end;
const size_t iram_size = 0x40100000 + CONFIG_SOC_IRAM_SIZE - ((size_t)&_iram_end);
g_heap_region[0].start_addr = (uint8_t *)&_iram_end;
g_heap_region[0].total_size = ((size_t)(0x4010C000 - (uint32_t)&_iram_end));
g_heap_region[0].caps = MALLOC_CAP_32BIT;
if (iram_size > HEAP_REGION_IRAM_MIN && iram_size < HEAP_REGION_IRAM_MAX) {
g_heap_region[heap_region_num].start_addr = (uint8_t *)&_iram_end;
g_heap_region[heap_region_num].total_size = iram_size;
g_heap_region[heap_region_num].caps = MALLOC_CAP_32BIT;
heap_region_num++;
}
#endif
g_heap_region[HEAP_REGIONS_MAX - 1].start_addr = (uint8_t *)&_bss_end;
g_heap_region[HEAP_REGIONS_MAX - 1].total_size = ((size_t)(0x40000000 - (uint32_t)&_bss_end));
g_heap_region[HEAP_REGIONS_MAX - 1].caps = MALLOC_CAP_8BIT | MALLOC_CAP_32BIT | MALLOC_CAP_DMA;
g_heap_region[heap_region_num].start_addr = (uint8_t *)&_bss_end;
g_heap_region[heap_region_num].total_size = ((size_t)(0x40000000 - (uint32_t)&_bss_end));
g_heap_region[heap_region_num].caps = MALLOC_CAP_8BIT | MALLOC_CAP_32BIT | MALLOC_CAP_DMA;
heap_region_num++;
esp_heap_caps_init_region(g_heap_region, HEAP_REGIONS_MAX);
esp_heap_caps_init_region(g_heap_region, heap_region_num);
}

2
components/heap/port/esp8266/include/esp_heap_config.h
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@ -18,7 +18,7 @@
#define HEAP_ALIGN_SIZE 4
#ifdef CONFIG_SOC_FULL_ICACHE
#ifdef CONFIG_HEAP_DISABLE_IRAM
#define HEAP_REGIONS_MAX 1
#else
#define HEAP_REGIONS_MAX 2

6
components/heap/port/esp8266/include/priv/esp_heap_caps_priv.h
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@ -103,9 +103,11 @@ static inline size_t blk_link_size(mem_blk_t *blk)
static inline size_t get_blk_region(void *ptr)
{
size_t num;
extern heap_region_t g_heap_region[HEAP_REGIONS_MAX];
extern size_t g_heap_region_num;
extern heap_region_t g_heap_region[];
for (num = 0; num < HEAP_REGIONS_MAX; num++) {
for (num = 0; num < g_heap_region_num; num++) {
if ((uint8_t *)ptr > (uint8_t *)g_heap_region[num].start_addr
&& (uint8_t *)ptr < ((uint8_t *)g_heap_region[num].start_addr + g_heap_region[num].total_size)) {
break;

23
components/heap/src/esp_heap_caps.c
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@ -28,8 +28,10 @@
#include "esp_log.h"
static const char *TAG = "heap_caps";
extern heap_region_t g_heap_region[HEAP_REGIONS_MAX];
extern heap_region_t g_heap_region[];
static const char *TAG = "heap_init";
size_t g_heap_region_num;
int __g_heap_trace_mode = HEAP_TRACE_NONE;
/**
@ -47,10 +49,6 @@ void esp_heap_caps_init_region(heap_region_t *region, size_t max_num)
mem_end = (mem_blk_t *)((uint8_t *)mem_end - sizeof(void *));
mem_end = (mem_blk_t *)((uint8_t *)mem_end - MEM_HEAD_SIZE);
ESP_EARLY_LOGV(TAG, "heap %d start from %p to %p total %d bytes, mem_blk from %p to %p total",
num, region[num].start_addr, region[num].start_addr + region[num].total_size,
region[num].total_size, mem_start, mem_end);
mem_start->prev = NULL;
mem_start->next = mem_end;
@ -60,6 +58,7 @@ void esp_heap_caps_init_region(heap_region_t *region, size_t max_num)
g_heap_region[num].free_blk = mem_start;
g_heap_region[num].min_free_bytes = g_heap_region[num].free_bytes = blk_link_size(mem_start);
}
g_heap_region_num = max_num;
}
/**
@ -69,7 +68,7 @@ size_t heap_caps_get_free_size(uint32_t caps)
{
size_t bytes = 0;
for (int i = 0; i < HEAP_REGIONS_MAX; i++)
for (int i = 0; i < g_heap_region_num; i++)
if (caps == (caps & g_heap_region[i].caps))
bytes += g_heap_region[i].free_bytes;
@ -83,7 +82,7 @@ size_t heap_caps_get_minimum_free_size(uint32_t caps)
{
size_t bytes = 0;
for (int i = 0; i < HEAP_REGIONS_MAX; i++)
for (int i = 0; i < g_heap_region_num; i++)
if (caps == (caps & g_heap_region[i].caps))
bytes += g_heap_region[i].min_free_bytes;
@ -106,12 +105,14 @@ void IRAM_ATTR *_heap_caps_malloc(size_t size, uint32_t caps, const char *file,
ESP_EARLY_LOGV(TAG, "caller file %s line %d", file, line);
}
for (num = 0; num < HEAP_REGIONS_MAX; num++) {
for (num = 0; num < g_heap_region_num; num++) {
bool trace;
size_t head_size;
if ((g_heap_region[num].caps & caps) != caps)
if ((g_heap_region[num].caps & caps) != caps) {
ESP_EARLY_LOGV(TAG, "caps in %x, num %d region %x @ %p", caps, num, g_heap_region[num].caps, &g_heap_region[num]);
continue;
}
_heap_caps_lock(num);
@ -236,7 +237,7 @@ void IRAM_ATTR _heap_caps_free(void *ptr, const char *file, size_t line)
num = get_blk_region(ptr);
if (num >= HEAP_REGIONS_MAX) {
if (num >= g_heap_region_num) {
ESP_EARLY_LOGE(TAG, "free(ptr_region=NULL)");
return;
}

5
components/heap/src/esp_heap_trace.c
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@ -43,7 +43,8 @@
static const char *TAG = "heap_trace";
extern heap_region_t g_heap_region[HEAP_REGIONS_MAX];
extern size_t g_heap_region_num;
extern heap_region_t g_heap_region[];
extern int __g_heap_trace_mode;
/**
@ -100,7 +101,7 @@ void heap_trace_dump(void)
uint8_t num;
mem_blk_t *mem_start, *mem_end, *p;
for (num = 0; num < HEAP_REGIONS_MAX; num++) {
for (num = 0; num < g_heap_region_num; num++) {
mem_start = (mem_blk_t *)HEAP_ALIGN(g_heap_region[num].start_addr);
mem_end = (mem_blk_t *)(HEAP_ALIGN(g_heap_region[num].start_addr + g_heap_region[num].total_size));
if ((uint8_t *)mem_end != g_heap_region[num].start_addr + g_heap_region[num].total_size)

1
components/lwip/Kconfig
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@ -11,6 +11,7 @@ config LWIP_HIGH_THROUGHPUT
select TCP_HIGH_SPEED_RETRANSMISSION
select SOC_FULL_ICACHE
select WIFI_TX_RATE_SEQUENCE_FROM_HIGH
select HEAP_DISABLE_IRAM
help
Enable this option, also enable "TCP_QUEUE_OOSEQ", "TCP_HIGH_SPEED_RETRANSMISSION" and
"SOC_FULL_ICACHE", so lwip should cache TCP message received in disorder sequence and