espressif/ESP8266_RTOS_SDK
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feature(spi_ram_fifo): add timetick

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This commit is contained in:
xiongyu
2019-06-03 16:51:47 +08:00
parent 1e40a85cec
commit 42c06647ba
2 changed files with 16 additions and 6 deletions
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8
components/spi_ram/include/spi_ram_fifo.h
View File

@ -41,13 +41,15 @@ typedef struct {
* @param handle spi ram fifo handle
* @param data Pointer to the write data buffer
* @param len Length of write data, range: len > 0
* @param timeout_ticks freertos timeout ticks
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_TIMEOUT spi ram fifo write timeout
* - ESP_FAIL spi ram fifo not created yet
*/
esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int len);
esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int len, uint32_t timeout_ticks);
/**
* @brief spi ram fifo read function
@ -57,13 +59,15 @@ esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int le
* @param handle spi ram fifo handle
* @param data Pointer to the read data buffer
* @param len Length of read data, range: len > 0
* @param timeout_ticks freertos timeout ticks
*
* @return
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_ERR_TIMEOUT spi ram fifo read timeout
* - ESP_FAIL spi ram fifo not created yet
*/
esp_err_t spi_ram_fifo_read(spi_ram_fifo_handle_t handle, uint8_t *data, int len);
esp_err_t spi_ram_fifo_read(spi_ram_fifo_handle_t handle, uint8_t *data, int len, uint32_t timeout_ticks);
/**
* @brief Get spi ram fifo filled length

14
components/spi_ram/spi_ram_fifo.c
View File

@ -45,7 +45,7 @@ typedef struct {
return (ret_val); \
}
esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int len)
esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int len, uint32_t timeout_ticks)
{
spi_ram_fifo_obj_t *obj = (spi_ram_fifo_obj_t *)handle;
int n;
@ -69,7 +69,10 @@ esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int le
// Not enough free room in FIFO. Wait till there's some read and try again.
obj->overflow_num++;
xSemaphoreGive(obj->mux);
xSemaphoreTake(obj->write_sem, portMAX_DELAY);
if (pdFALSE == xSemaphoreTake(obj->write_sem, timeout_ticks)) {
xSemaphoreGive(obj->mux);
return ESP_ERR_TIMEOUT;
}
} else {
//Write the data.
spi_ram_write(obj->ram_num, obj->start_addr + obj->write_pos, data, n);
@ -90,7 +93,7 @@ esp_err_t spi_ram_fifo_write(spi_ram_fifo_handle_t handle, uint8_t *data, int le
return ESP_OK;
}
esp_err_t spi_ram_fifo_read(spi_ram_fifo_handle_t handle, uint8_t *data, int len)
esp_err_t spi_ram_fifo_read(spi_ram_fifo_handle_t handle, uint8_t *data, int len, uint32_t timeout_ticks)
{
spi_ram_fifo_obj_t *obj = (spi_ram_fifo_obj_t *)handle;
int n;
@ -114,7 +117,10 @@ esp_err_t spi_ram_fifo_read(spi_ram_fifo_handle_t handle, uint8_t *data, int len
// Not enough data in FIFO. Wait till there's some written and try again.
obj->underrun_num++;
xSemaphoreGive(obj->mux);
xSemaphoreTake(obj->read_sem, portMAX_DELAY);
if (pdFALSE == xSemaphoreTake(obj->read_sem, timeout_ticks)) {
xSemaphoreGive(obj->mux);
return ESP_ERR_TIMEOUT;
}
} else {
// Read the data.
spi_ram_read(obj->ram_num, obj->start_addr + obj->read_pos, data, n);