mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-09-21 13:15:15 +08:00
feat(esp8266): Remove old drivers
This commit is contained in:
Dong Heng
@ -1,88 +0,0 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
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||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef __HW_TIMER_H__
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#define __HW_TIMER_H__
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** \defgroup HW_Timer_APIs Hardware timer APIs
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* @brief Hardware timer APIs
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*
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* @attention Hardware timer can not interrupt other ISRs.
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*
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*/
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/** @addtogroup HW_Timer_APIs
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* @{
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*/
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/**
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* @brief Initialize the hardware ISR timer.
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*
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* @param null
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*
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* @return null
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*/
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void hw_timer_init(void);
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/**
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* @brief Set a trigger timer delay to enable this timer.
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*
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* @param uint32_t val : Timing
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* - In autoload mode, range : 50 ~ 0x7fffff
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* - In non-autoload mode, range : 10 ~ 0x7fffff
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*
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* @param uint8_t req : 0, not autoload; 1, autoload mode.
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*
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* @return null
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*/
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void hw_timer_arm(uint32_t val, bool req);
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/**
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* @brief disable this timer.
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*
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* @param null
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*
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* @return null
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*/
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void hw_timer_disarm(void);
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/**
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* @brief Set timer callback function.
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*
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* For enabled timer, timer callback has to be set.
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*
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* @param uint32_t val : Timing
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* - In autoload mode, range : 50 ~ 0x7fffff
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* - In non-autoload mode, range : 10 ~ 0x7fffff
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*
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* @return null
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*/
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void hw_timer_set_func(void (* user_hw_timer_cb_set)(void));
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -1,189 +0,0 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
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// http://www.apache.org/licenses/LICENSE-2.0
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//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
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// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
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#ifndef __I2C_MASTER_H__
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#define __I2C_MASTER_H__
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#include <stdint.h>
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#include "rom/ets_sys.h"
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#include "esp8266/pin_mux_register.h"
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#include "gpio.h"
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#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U
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#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO4_U
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#define I2C_MASTER_SDA_GPIO 2
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#define I2C_MASTER_SCL_GPIO 4
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#define I2C_MASTER_SDA_FUNC FUNC_GPIO2
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#define I2C_MASTER_SCL_FUNC FUNC_GPIO4
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//#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U
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//#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO0_U
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//#define I2C_MASTER_SDA_GPIO 2
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//#define I2C_MASTER_SCL_GPIO 0
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//#define I2C_MASTER_SDA_FUNC FUNC_GPIO2
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//#define I2C_MASTER_SCL_FUNC FUNC_GPIO0
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#if 0
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#define I2C_MASTER_GPIO_SET(pin) \
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gpio_output_set(1<<pin,0,1<<pin,0)
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#define I2C_MASTER_GPIO_CLR(pin) \
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gpio_output_set(0,1<<pin,1<<pin,0)
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#define I2C_MASTER_GPIO_OUT(pin,val) \
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if(val) I2C_MASTER_GPIO_SET(pin);\
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else I2C_MASTER_GPIO_CLR(pin)
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#endif
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#define I2C_MASTER_SDA_HIGH_SCL_HIGH() \
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gpio_output_conf(1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
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#define I2C_MASTER_SDA_HIGH_SCL_LOW() \
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gpio_output_conf(1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
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#define I2C_MASTER_SDA_LOW_SCL_HIGH() \
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gpio_output_conf(1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
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#define I2C_MASTER_SDA_LOW_SCL_LOW() \
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gpio_output_conf(0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
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/** \defgroup Driver_APIs Driver APIs
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* @brief Driver APIs
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*/
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/** @addtogroup Driver_APIs
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* @{
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*/
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/** \defgroup I2C_Driver_APIs I2C_MASTER Driver APIs
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* @brief UART driver APIs
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*/
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/** @addtogroup I2C_MASTER_Driver_APIs
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* @{
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*/
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/**
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* @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode.
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*
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* @param null
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*
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* @return null
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*/
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void i2c_master_gpio_init(void);
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/**
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* @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode.
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*
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* @param initilize I2C bus to enable i2c operations.
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*
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* @return null
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*/
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void i2c_master_init(void);
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#define i2c_master_wait os_delay_us
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/**
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* @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode.
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*
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* @param set i2c to stop sending state.
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*
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* @return null
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*/
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void i2c_master_stop(void);
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/**
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* @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode.
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*
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* @param set i2c to start sending state.
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*
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* @return null
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*/
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void i2c_master_start(void);
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/**
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* @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode.
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*
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* @param set ack to i2c bus as level value.
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*
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* @return null
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*/
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void i2c_master_setAck(uint8_t level);
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/**
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* @brief confirm if peer send ack.
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*
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* @param null
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*
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* @return null
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*/
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uint8_t i2c_master_getAck(void);
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/**
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* @brief read Byte from i2c bus.
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*
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* @param null
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*
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* @return the byte which read from i2c bus.
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*/
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uint8_t i2c_master_readByte(void);
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/**
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* @brief write wrdata value(one byte) into i2c.
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*
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* @param uint8_t wrdata:write value
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*
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* @return null
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*/
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void i2c_master_writeByte(uint8_t wrdata);
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/**
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* @brief i2c_master_checkAck.
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*
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* @param null
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*
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* @return the result of check ack
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*/
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bool i2c_master_checkAck(void);
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/**
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* @brief i2c master send Ack.
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*
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* @param null
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*
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* @return null
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*/
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void i2c_master_send_ack(void);
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/**
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* @brief i2c master send Nack.
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*
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* @param null
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*
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* @return null
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*/
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void i2c_master_send_nack(void);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif
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@ -1,314 +0,0 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
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// limitations under the License.
|
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/**
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* @file spi_interface.h
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* @brief Defines and Macros for the SPI.
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*/
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#ifndef __SPI_INTERFACE_H__
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#define __SPI_INTERFACE_H__
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#include <stdint.h>
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#include "spi_register.h"
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//*****************************************************************************
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//
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// Make sure all of the definitions in this header have a C binding.
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//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* @brief Defines slave commands. Default value based on slave ESP8266.
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*/
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#define MASTER_WRITE_DATA_TO_SLAVE_CMD 2
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#define MASTER_READ_DATA_FROM_SLAVE_CMD 3
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#define MASTER_WRITE_STATUS_TO_SLAVE_CMD 1
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#define MASTER_READ_STATUS_FROM_SLAVE_CMD 4
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/**
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* @brief Support HSPI and SPI module.
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*
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*/
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typedef enum {
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SpiNum_SPI = 0,
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SpiNum_HSPI = 1,
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} SpiNum;
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/**
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* @brief The SPI module can work in either master or slave mode.
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*
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*/
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typedef enum {
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SpiMode_Master = 0,
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SpiMode_Slave = 1,
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} SpiMode;
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/**
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* @brief SPI sub mode
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*
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* Support 4 sub modes based on SPI clock polarity and phase.
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* SPI_CPOL SPI_CPHA SubMode
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* 0 0 0
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* 0 1 1
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* 1 0 2
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* 1 1 3
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*/
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typedef enum {
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SpiSubMode_0 = 0,
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SpiSubMode_1 = 1,
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SpiSubMode_2 = 2,
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SpiSubMode_3 = 3,
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} SpiSubMode;
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/**
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* @brief The SPI module working speed.
|
||||
*
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||||
* @attention Max speed 80MHz
|
||||
*
|
||||
*/
|
||||
typedef enum {
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SpiSpeed_2MHz = 40 - 1,
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SpiSpeed_5MHz = 16 - 1,
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SpiSpeed_10MHz = 8 - 1,
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SpiSpeed_16MHz = 5 - 1,
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SpiSpeed_20MHz = 4 - 1,
|
||||
} SpiSpeed;
|
||||
|
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/**
|
||||
* @brief The SPI mode working speed.
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
SpiBitOrder_MSBFirst = 0,
|
||||
SpiBitOrder_LSBFirst = 1,
|
||||
} SpiBitOrder;
|
||||
|
||||
// @brief SPI interrupt soource defined.
|
||||
typedef enum {
|
||||
SpiIntSrc_TransDoneEn = SPI_TRANS_DONE_EN,
|
||||
SpiIntSrc_WrStaDoneEn = SPI_SLV_WR_STA_DONE_EN,
|
||||
SpiIntSrc_RdStaDoneEn = SPI_SLV_RD_STA_DONE_EN,
|
||||
SpiIntSrc_WrBufDoneEn = SPI_SLV_WR_BUF_DONE_EN,
|
||||
SpiIntSrc_RdBufDoneEn = SPI_SLV_RD_BUF_DONE_EN,
|
||||
} SpiIntSrc;
|
||||
|
||||
// @brief SPI CS pin.
|
||||
typedef enum {
|
||||
SpiPinCS_0 = 0,
|
||||
SpiPinCS_1 = 1,
|
||||
SpiPinCS_2 = 2,
|
||||
} SpiPinCS;
|
||||
|
||||
/**
|
||||
* @brief SPI attribute
|
||||
*/
|
||||
typedef struct {
|
||||
SpiMode mode; ///< Master or slave mode
|
||||
SpiSubMode subMode; ///< SPI SPI_CPOL SPI_CPHA mode
|
||||
SpiSpeed speed; ///< SPI Clock
|
||||
SpiBitOrder bitOrder; ///< SPI bit order
|
||||
} SpiAttr;
|
||||
|
||||
/**
|
||||
* @brief SPI attribute
|
||||
*/
|
||||
typedef struct {
|
||||
uint16_t cmd; ///< Command value
|
||||
uint8_t cmdLen; ///< Command byte length
|
||||
uint32_t* addr; ///< Point to address value
|
||||
uint8_t addrLen; ///< Address byte length
|
||||
uint32_t* data; ///< Point to data buffer
|
||||
uint8_t dataLen; ///< Data byte length.
|
||||
} SpiData;
|
||||
|
||||
#define SHOWREG() __ShowRegValue(__func__, __LINE__);
|
||||
|
||||
/**
|
||||
* @brief Print debug information.
|
||||
*
|
||||
*/
|
||||
void __ShowRegValue(const char* func, uint32_t line);
|
||||
|
||||
/**
|
||||
* @brief Initialize SPI module.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pAttr
|
||||
* Pointer to a struct SpiAttr that indicates SPI working attribution.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIInit(SpiNum spiNum, SpiAttr* pAttr);
|
||||
|
||||
/**
|
||||
* @brief Set slave address value by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] addr
|
||||
* Slave address to be set.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr);
|
||||
|
||||
/**
|
||||
* @brief Set command value by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] cmd
|
||||
* Command will be send to slave.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd);
|
||||
|
||||
/**
|
||||
* @brief Send data to slave from master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pInData
|
||||
* Pointer to a strcuture that will be send.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*/
|
||||
int SPIMasterSendData(SpiNum spiNum, SpiData* pInData);
|
||||
|
||||
/**
|
||||
* @brief Receive data from slave by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pOutData
|
||||
* Point to data buffer.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*
|
||||
*/
|
||||
int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData);
|
||||
|
||||
/**
|
||||
* @brief Load data to slave send buffer.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pInData
|
||||
* Point to data buffer.
|
||||
* @param [in] outLen
|
||||
* The number of bytes to be set.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*/
|
||||
int SPISlaveSendData(SpiNum spiNum, uint32_t* pInData, uint8_t outLen);
|
||||
|
||||
/**
|
||||
* @brief Receive data by slave.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] isrFunc
|
||||
* isrFunc is a pointer to the function to be called when the SPI interrupt occurs.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*/
|
||||
int SPISlaveRecvData(SpiNum spiNum, void(*isrFunc)(void*));
|
||||
|
||||
/**
|
||||
* @brief Set slave status by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] data
|
||||
* Data will be write to slave SPI_WR_STATUS.
|
||||
*
|
||||
* @return void.
|
||||
*
|
||||
* @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS.
|
||||
*/
|
||||
void SPIMasterSendStatus(SpiNum spiNum, uint8_t data);
|
||||
|
||||
/**
|
||||
* @brief Get salve status by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
*
|
||||
* @return int, -1: indicates failure; other value in slave status.
|
||||
*
|
||||
* @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS.
|
||||
*/
|
||||
int SPIMasterRecvStatus(SpiNum spiNum);
|
||||
|
||||
/**
|
||||
* @brief Select SPI CS pin.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pinCs
|
||||
* Indicates which SPI pin to choose.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs);
|
||||
|
||||
/**
|
||||
* @brief Enable SPI module interrupt source.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] intSrc
|
||||
* Indicates which interrupt source to enable.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc);
|
||||
|
||||
/**
|
||||
* @brief Disable SPI module interrupt source.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] intSrc
|
||||
* Indicates which interrupt source to disable.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc);
|
||||
|
||||
/**
|
||||
* @brief Clear all of spi interrupt.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIIntClear(SpiNum spiNum);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __SPI_INTERFACE_H__
|
||||
@ -1,290 +0,0 @@
|
||||
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "esp8266/uart_register.h"
|
||||
|
||||
#include "freertos/portmacro.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define ETS_UART_INTR_ENABLE() _xt_isr_unmask(1 << ETS_UART_INUM)
|
||||
#define ETS_UART_INTR_DISABLE() _xt_isr_mask(1 << ETS_UART_INUM)
|
||||
#define UART_INTR_MASK 0x1ff
|
||||
#define UART_LINE_INV_MASK (0x3f<<19)
|
||||
|
||||
typedef enum {
|
||||
UART_WordLength_5b = 0x0,
|
||||
UART_WordLength_6b = 0x1,
|
||||
UART_WordLength_7b = 0x2,
|
||||
UART_WordLength_8b = 0x3
|
||||
} UART_WordLength;
|
||||
|
||||
typedef enum {
|
||||
USART_StopBits_1 = 0x1,
|
||||
USART_StopBits_1_5 = 0x2,
|
||||
USART_StopBits_2 = 0x3,
|
||||
} UART_StopBits;
|
||||
|
||||
typedef enum {
|
||||
UART0 = 0x0,
|
||||
UART1 = 0x1,
|
||||
} UART_Port;
|
||||
|
||||
typedef enum {
|
||||
USART_Parity_None = 0x2,
|
||||
USART_Parity_Even = 0x0,
|
||||
USART_Parity_Odd = 0x1
|
||||
} UART_ParityMode;
|
||||
|
||||
typedef enum {
|
||||
PARITY_DIS = 0x0,
|
||||
PARITY_EN = 0x2
|
||||
} UartExistParity;
|
||||
|
||||
typedef enum {
|
||||
BIT_RATE_300 = 300,
|
||||
BIT_RATE_600 = 600,
|
||||
BIT_RATE_1200 = 1200,
|
||||
BIT_RATE_2400 = 2400,
|
||||
BIT_RATE_4800 = 4800,
|
||||
BIT_RATE_9600 = 9600,
|
||||
BIT_RATE_19200 = 19200,
|
||||
BIT_RATE_38400 = 38400,
|
||||
BIT_RATE_57600 = 57600,
|
||||
BIT_RATE_74880 = 74880,
|
||||
BIT_RATE_115200 = 115200,
|
||||
BIT_RATE_230400 = 230400,
|
||||
BIT_RATE_460800 = 460800,
|
||||
BIT_RATE_921600 = 921600,
|
||||
BIT_RATE_1843200 = 1843200,
|
||||
BIT_RATE_3686400 = 3686400,
|
||||
} UART_BautRate; //you can add any rate you need in this range
|
||||
|
||||
typedef enum {
|
||||
USART_HardwareFlowControl_None = 0x0,
|
||||
USART_HardwareFlowControl_RTS = 0x1,
|
||||
USART_HardwareFlowControl_CTS = 0x2,
|
||||
USART_HardwareFlowControl_CTS_RTS = 0x3
|
||||
} UART_HwFlowCtrl;
|
||||
|
||||
typedef enum {
|
||||
UART_None_Inverse = 0x0,
|
||||
UART_Rxd_Inverse = UART_RXD_INV,
|
||||
UART_CTS_Inverse = UART_CTS_INV,
|
||||
UART_Txd_Inverse = UART_TXD_INV,
|
||||
UART_RTS_Inverse = UART_RTS_INV,
|
||||
} UART_LineLevelInverse;
|
||||
|
||||
typedef struct {
|
||||
UART_BautRate baud_rate;
|
||||
UART_WordLength data_bits;
|
||||
UART_ParityMode parity; // chip size in byte
|
||||
UART_StopBits stop_bits;
|
||||
UART_HwFlowCtrl flow_ctrl;
|
||||
uint8_t UART_RxFlowThresh ;
|
||||
uint32_t UART_InverseMask;
|
||||
} UART_ConfigTypeDef;
|
||||
|
||||
typedef struct {
|
||||
uint32_t UART_IntrEnMask;
|
||||
uint8_t UART_RX_TimeOutIntrThresh;
|
||||
uint8_t UART_TX_FifoEmptyIntrThresh;
|
||||
uint8_t UART_RX_FifoFullIntrThresh;
|
||||
} UART_IntrConfTypeDef;
|
||||
|
||||
//=======================================
|
||||
|
||||
/** \defgroup Driver_APIs Driver APIs
|
||||
* @brief Driver APIs
|
||||
*/
|
||||
|
||||
/** @addtogroup Driver_APIs
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \defgroup UART_Driver_APIs UART Driver APIs
|
||||
* @brief UART driver APIs
|
||||
*/
|
||||
|
||||
/** @addtogroup UART_Driver_APIs
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Wait uart tx fifo empty, do not use it if tx flow control enabled.
|
||||
*
|
||||
* @param UART_Port uart_no:UART0 or UART1
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_WaitTxFifoEmpty(UART_Port uart_no); //do not use if tx flow control enabled
|
||||
|
||||
/**
|
||||
* @brief Clear uart tx fifo and rx fifo.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_ResetFifo(UART_Port uart_no);
|
||||
|
||||
/**
|
||||
* @brief Clear uart interrupt flags.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param uint32_t clr_mask : To clear the interrupt bits
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_ClearIntrStatus(UART_Port uart_no, uint32_t clr_mask);
|
||||
|
||||
/**
|
||||
* @brief Enable uart interrupts .
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param uint32_t ena_mask : To enable the interrupt bits
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetIntrEna(UART_Port uart_no, uint32_t ena_mask);
|
||||
|
||||
/**
|
||||
* @brief Register an application-specific interrupt handler for Uarts interrupts.
|
||||
*
|
||||
* @param void *fn : interrupt handler for Uart interrupts.
|
||||
* @param void *arg : interrupt handler's arg.
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_intr_handler_register(void* fn, void* arg);
|
||||
|
||||
/**
|
||||
* @brief Config from which serial output printf function.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetPrintPort(UART_Port uart_no);
|
||||
|
||||
/**
|
||||
* @brief Config Common parameters of serial ports.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_ConfigTypeDef *pUARTConfig : parameters structure
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef* pUARTConfig);
|
||||
|
||||
/**
|
||||
* @brief Config types of uarts.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_IntrConfTypeDef *pUARTIntrConf : parameters structure
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef* pUARTIntrConf);
|
||||
|
||||
/**
|
||||
* @brief Config the length of the uart communication data bits.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_WordLength len : the length of the uart communication data bits
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetWordLength(UART_Port uart_no, UART_WordLength len);
|
||||
|
||||
/**
|
||||
* @brief Config the length of the uart communication stop bits.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_StopBits bit_num : the length uart communication stop bits
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num);
|
||||
|
||||
/**
|
||||
* @brief Configure whether to open the parity.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_ParityMode Parity_mode : the enum of uart parity configuration
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) ;
|
||||
|
||||
/**
|
||||
* @brief Configure the Baud rate.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param uint32_t baud_rate : the Baud rate
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetBaudrate(UART_Port uart_no, uint32_t baud_rate);
|
||||
|
||||
/**
|
||||
* @brief Configure Hardware flow control.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_HwFlowCtrl flow_ctrl : Hardware flow control mode
|
||||
* @param uint8_t rx_thresh : threshold of Hardware flow control
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8_t rx_thresh);
|
||||
|
||||
/**
|
||||
* @brief Configure trigging signal of uarts.
|
||||
*
|
||||
* @param UART_Port uart_no : UART0 or UART1
|
||||
* @param UART_LineLevelInverse inverse_mask : Choose need to flip the IO
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) ;
|
||||
|
||||
/**
|
||||
* @brief An example illustrates how to configure the serial port.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void uart_init_new(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user