diff --git a/components/esp8266/driver/hw_timer.c b/components/esp8266/driver/hw_timer.c deleted file mode 100644 index e9ad90aa..00000000 --- a/components/esp8266/driver/hw_timer.c +++ /dev/null @@ -1,139 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include - -#include "rom/ets_sys.h" -#include "esp8266/eagle_soc.h" -#include "esp8266/timer_register.h" - -#include "FreeRTOS.h" - -#define US_TO_RTC_TIMER_TICKS(t) \ - ((t) ? \ - (((t) > 0x35A) ? \ - (((t) >> 2) * ((APB_CLK_FREQ >> 4) / 250000) + ((t)&0x3) * ((APB_CLK_FREQ >> 4) / 1000000)) : \ - (((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \ - 0) - -#define FRC1_ENABLE_TIMER BIT7 -#define FRC1_AUTO_LOAD BIT6 - -typedef enum { // timer provided mode - DIVDED_BY_1 = 0, // timer clock - DIVDED_BY_16 = 4, // divided by 16 - DIVDED_BY_256 = 8, // divided by 256 -} TIMER_PREDIVED_MODE; - -typedef enum { // timer interrupt mode - TM_LEVEL_INT = 1, // level interrupt - TM_EDGE_INT = 0, // edge interrupt -} TIMER_INT_MODE; - -#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(addr, val) - -static void (* user_hw_timer_cb)(void) = NULL; - -bool frc1_auto_load = false; - -static void hw_timer_isr_cb(void* arg) -{ - if (frc1_auto_load == false) { - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, - DIVDED_BY_16 | TM_EDGE_INT); - } - - if (user_hw_timer_cb != NULL) { - (*(user_hw_timer_cb))(); - } -} - -void hw_timer_disarm(void) -{ - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, 0); -} - -void hw_timer_arm(uint32_t val, bool req) -{ - frc1_auto_load = req; - - if (frc1_auto_load == true) { - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, - FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); - } else { - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, - DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); - } - - RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val)); -} - -void hw_timer_set_func(void (* user_hw_timer_cb_set)(void)) -{ - user_hw_timer_cb = user_hw_timer_cb_set; -} - -void hw_timer_init(void) -{ -#if 0 - - if (req == 1) { - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, - FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); - } else { - RTC_REG_WRITE(FRC1_CTRL_ADDRESS, - DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); - } - -#endif - _xt_isr_attach(ETS_FRC_TIMER1_INUM, hw_timer_isr_cb, NULL); - - TM1_EDGE_INT_ENABLE(); - _xt_isr_unmask(1 << ETS_FRC_TIMER1_INUM); -} - -//-------------------------------Test Code Below-------------------------------------- -#if 0 -#include "hw_timer.h" - -#define REG_WRITE(_r,_v) (*(volatile uint32_t *)(_r)) = (_v) -#define REG_READ(_r) (*(volatile uint32_t *)(_r)) -#define WDEV_NOW() REG_READ(0x3ff20c00) - -uint32_t tick_now2 = 0; -void hw_test_timer_cb(void) -{ - static uint16 j = 0; - j++; - - if ((WDEV_NOW() - tick_now2) >= 1000000) { - static uint32_t idx = 1; - tick_now2 = WDEV_NOW(); - printf("b%u:%d\n", idx++, j); - j = 0; - } - - //hw_timer_arm(50); -} - -void user_init(void) -{ - hw_timer_init(); - hw_timer_set_func(hw_test_timer_cb, 1); - hw_timer_arm(100); -} -#endif - diff --git a/components/esp8266/driver/i2c_master.c b/components/esp8266/driver/i2c_master.c deleted file mode 100644 index b0488a29..00000000 --- a/components/esp8266/driver/i2c_master.c +++ /dev/null @@ -1,319 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include - -#include "rom/ets_sys.h" -#if 0 -#include "gpio.h" -#include "i2c_master.h" - -#include "FreeRTOS.h" - -static uint8_t m_nLastSDA; -static uint8_t m_nLastSCL; - -/****************************************************************************** - * FunctionName : i2c_master_setDC - * Description : Internal used function - - * set i2c SDA and SCL bit value for half clk cycle - * Parameters : uint8_t SDA - * uint8_t SCL - * Returns : NONE -*******************************************************************************/ -static void i2c_master_setDC(uint8_t SDA, uint8_t SCL) -{ - SDA &= 0x01; - SCL &= 0x01; - m_nLastSDA = SDA; - m_nLastSCL = SCL; - ETS_INTR_LOCK(); - - if ((0 == SDA) && (0 == SCL)) { - I2C_MASTER_SDA_LOW_SCL_LOW(); - } else if ((0 == SDA) && (1 == SCL)) { - I2C_MASTER_SDA_LOW_SCL_HIGH(); - } else if ((1 == SDA) && (0 == SCL)) { - I2C_MASTER_SDA_HIGH_SCL_LOW(); - } else { - I2C_MASTER_SDA_HIGH_SCL_HIGH(); - } - - ETS_INTR_UNLOCK(); -} - -/****************************************************************************** - * FunctionName : i2c_master_getDC - * Description : Internal used function - - * get i2c SDA bit value - * Parameters : NONE - * Returns : uint8_t - SDA bit value -*******************************************************************************/ -static uint8_t i2c_master_getDC(void) -{ - uint8_t sda_out; - ETS_INTR_LOCK(); - sda_out = GPIO_INPUT_GET(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)); - ETS_INTR_UNLOCK(); - return sda_out; -} - -/****************************************************************************** - * FunctionName : i2c_master_init - * Description : initilize I2C bus to enable i2c operations - * Parameters : NONE - * Returns : NONE -*******************************************************************************/ -void i2c_master_init(void) -{ - uint8_t i; - - i2c_master_setDC(1, 0); - i2c_master_wait(5); - - // when SCL = 0, toggle SDA to clear up - i2c_master_setDC(0, 0) ; - i2c_master_wait(5); - i2c_master_setDC(1, 0) ; - i2c_master_wait(5); - - // set data_cnt to max value - for (i = 0; i < 28; i++) { - i2c_master_setDC(1, 0); - i2c_master_wait(5); // sda 1, scl 0 - i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 - } - - // reset all - i2c_master_stop(); - return; -} - -/****************************************************************************** - * FunctionName : i2c_master_gpio_init - * Description : config SDA and SCL gpio to open-drain output mode, - * mux and gpio num defined in i2c_master.h - * Parameters : NONE - * Returns : NONE -*******************************************************************************/ -void i2c_master_gpio_init(void) -{ - ETS_GPIO_INTR_DISABLE() ; -// ETS_INTR_LOCK(); - - PIN_FUNC_SELECT(I2C_MASTER_SDA_MUX, I2C_MASTER_SDA_FUNC); - PIN_FUNC_SELECT(I2C_MASTER_SCL_MUX, I2C_MASTER_SCL_FUNC); - - GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain; - GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SDA_GPIO)); - GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain; - GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SCL_GPIO)); - - I2C_MASTER_SDA_HIGH_SCL_HIGH(); - - ETS_GPIO_INTR_ENABLE() ; -// ETS_INTR_UNLOCK(); - - i2c_master_init(); -} - -/****************************************************************************** - * FunctionName : i2c_master_start - * Description : set i2c to send state - * Parameters : NONE - * Returns : NONE -*******************************************************************************/ -void i2c_master_start(void) -{ - i2c_master_setDC(1, m_nLastSCL); - i2c_master_wait(5); - i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 - i2c_master_setDC(0, 1); - i2c_master_wait(5); // sda 0, scl 1 -} - -/****************************************************************************** - * FunctionName : i2c_master_stop - * Description : set i2c to stop sending state - * Parameters : NONE - * Returns : NONE -*******************************************************************************/ -void i2c_master_stop(void) -{ - i2c_master_wait(5); - - i2c_master_setDC(0, m_nLastSCL); - i2c_master_wait(5); // sda 0 - i2c_master_setDC(0, 1); - i2c_master_wait(5); // sda 0, scl 1 - i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 -} - -/****************************************************************************** - * FunctionName : i2c_master_setAck - * Description : set ack to i2c bus as level value - * Parameters : uint8_t level - 0 or 1 - * Returns : NONE -*******************************************************************************/ -void i2c_master_setAck(uint8_t level) -{ - i2c_master_setDC(m_nLastSDA, 0); - i2c_master_wait(5); - i2c_master_setDC(level, 0); - i2c_master_wait(5); // sda level, scl 0 - i2c_master_setDC(level, 1); - i2c_master_wait(8); // sda level, scl 1 - i2c_master_setDC(level, 0); - i2c_master_wait(5); // sda level, scl 0 - i2c_master_setDC(1, 0); - i2c_master_wait(5); -} - -/****************************************************************************** - * FunctionName : i2c_master_getAck - * Description : confirm if peer send ack - * Parameters : NONE - * Returns : uint8_t - ack value, 0 or 1 -*******************************************************************************/ -uint8_t i2c_master_getAck(void) -{ - uint8_t retVal; - i2c_master_setDC(m_nLastSDA, 0); - i2c_master_wait(5); - i2c_master_setDC(1, 0); - i2c_master_wait(5); - i2c_master_setDC(1, 1); - i2c_master_wait(5); - - retVal = i2c_master_getDC(); - i2c_master_wait(5); - i2c_master_setDC(1, 0); - i2c_master_wait(5); - - return retVal; -} - -/****************************************************************************** -* FunctionName : i2c_master_checkAck -* Description : get dev response -* Parameters : NONE -* Returns : true : get ack ; false : get nack -*******************************************************************************/ -bool i2c_master_checkAck(void) -{ - if (i2c_master_getAck()) { - return false; - } else { - return true; - } -} - -/****************************************************************************** -* FunctionName : i2c_master_send_ack -* Description : response ack -* Parameters : NONE -* Returns : NONE -*******************************************************************************/ -void i2c_master_send_ack(void) -{ - i2c_master_setAck(0x0); -} - -/****************************************************************************** -* FunctionName : i2c_master_send_nack -* Description : response nack -* Parameters : NONE -* Returns : NONE -*******************************************************************************/ -void i2c_master_send_nack(void) -{ - i2c_master_setAck(0x1); -} - -/****************************************************************************** - * FunctionName : i2c_master_readByte - * Description : read Byte from i2c bus - * Parameters : NONE - * Returns : uint8_t - readed value -*******************************************************************************/ -uint8_t i2c_master_readByte(void) -{ - uint8_t retVal = 0; - uint8_t k, i; - - i2c_master_wait(5); - i2c_master_setDC(m_nLastSDA, 0); - i2c_master_wait(5); // sda 1, scl 0 - - for (i = 0; i < 8; i++) { - i2c_master_wait(5); - i2c_master_setDC(1, 0); - i2c_master_wait(5); // sda 1, scl 0 - i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 - - k = i2c_master_getDC(); - i2c_master_wait(5); - - if (i == 7) { - i2c_master_wait(3); //// - } - - k <<= (7 - i); - retVal |= k; - } - - i2c_master_setDC(1, 0); - i2c_master_wait(5); // sda 1, scl 0 - - return retVal; -} - -/****************************************************************************** - * FunctionName : i2c_master_writeByte - * Description : write wrdata value(one byte) into i2c - * Parameters : uint8_t wrdata - write value - * Returns : NONE -*******************************************************************************/ -void i2c_master_writeByte(uint8_t wrdata) -{ - uint8_t dat; - int8_t i; - - i2c_master_wait(5); - - i2c_master_setDC(m_nLastSDA, 0); - i2c_master_wait(5); - - for (i = 7; i >= 0; i--) { - dat = wrdata >> i; - i2c_master_setDC(dat, 0); - i2c_master_wait(5); - i2c_master_setDC(dat, 1); - i2c_master_wait(5); - - if (i == 0) { - i2c_master_wait(3); //// - } - - i2c_master_setDC(dat, 0); - i2c_master_wait(5); - } -} - -#endif diff --git a/components/esp8266/driver/spi_interface.c b/components/esp8266/driver/spi_interface.c deleted file mode 100644 index f044e9db..00000000 --- a/components/esp8266/driver/spi_interface.c +++ /dev/null @@ -1,566 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -/** - * @file spi_interface.c - * @brief Defines and Macros for the SPI. - */ - -#include - -#include "rom/ets_sys.h" -#include "esp8266/pin_mux_register.h" - -#include "spi_interface.h" - -#include "FreeRTOS.h" - -//***************************************************************************** -// -// Make sure all of the definitions in this header have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -// Show the spi registers. -#define SHOWDEBUG - -void __ShowRegValue(const char* func, uint32_t line) -{ -#ifndef SHOWDEBUG - int i; - uint32_t regAddr = 0x60000140; // SPI--0x60000240, HSPI--0x60000140; - printf("\r\n FUNC[%s],line[%d]\r\n", func, line); - printf(" SPI_ADDR [0x%08x]\r\n", READ_PERI_REG(SPI_ADDR(SpiNum_HSPI))); - printf(" SPI_CMD [0x%08x]\r\n", READ_PERI_REG(SPI_CMD(SpiNum_HSPI))); - printf(" SPI_CTRL [0x%08x]\r\n", READ_PERI_REG(SPI_CTRL(SpiNum_HSPI))); - printf(" SPI_CTRL2 [0x%08x]\r\n", READ_PERI_REG(SPI_CTRL2(SpiNum_HSPI))); - printf(" SPI_CLOCK [0x%08x]\r\n", READ_PERI_REG(SPI_CLOCK(SpiNum_HSPI))); - printf(" SPI_RD_STATUS [0x%08x]\r\n", READ_PERI_REG(SPI_RD_STATUS(SpiNum_HSPI))); - printf(" SPI_WR_STATUS [0x%08x]\r\n", READ_PERI_REG(SPI_WR_STATUS(SpiNum_HSPI))); - printf(" SPI_USER [0x%08x]\r\n", READ_PERI_REG(SPI_USER(SpiNum_HSPI))); - printf(" SPI_USER1 [0x%08x]\r\n", READ_PERI_REG(SPI_USER1(SpiNum_HSPI))); - printf(" SPI_USER2 [0x%08x]\r\n", READ_PERI_REG(SPI_USER2(SpiNum_HSPI))); - printf(" SPI_PIN [0x%08x]\r\n", READ_PERI_REG(SPI_PIN(SpiNum_HSPI))); - printf(" SPI_SLAVE [0x%08x]\r\n", READ_PERI_REG(SPI_SLAVE(SpiNum_HSPI))); - printf(" SPI_SLAVE1 [0x%08x]\r\n", READ_PERI_REG(SPI_SLAVE1(SpiNum_HSPI))); - printf(" SPI_SLAVE2 [0x%08x]\r\n", READ_PERI_REG(SPI_SLAVE2(SpiNum_HSPI))); - - for (i = 0; i < 16; ++i) { - printf(" ADDR[0x%08x],Value[0x%08x]\r\n", regAddr, READ_PERI_REG(regAddr)); - regAddr += 4; - } - -#endif -} - -// Define SPI interrupt enable macro -#define ETS_SPI_INTR_ENABLE() _xt_isr_unmask(1 << ETS_SPI_INUM) - -/** - * @brief Based on pAttr initialize SPI module. - * - */ -void SPIInit(SpiNum spiNum, SpiAttr* pAttr) -{ - if ((spiNum > SpiNum_HSPI) - || (NULL == pAttr)) { - return; - } - - // SPI_CPOL & SPI_CPHA - switch (pAttr->subMode) { - case SpiSubMode_1: - CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE - break; - - case SpiSubMode_2: - SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE - break; - - case SpiSubMode_3: - SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); - break; - - case SpiSubMode_0: - default: - CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); - // To do nothing - break; - } - - // SPI bit order - if (SpiBitOrder_MSBFirst == pAttr->bitOrder) { - CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_WR_BIT_ORDER); - CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_RD_BIT_ORDER); - } else if (SpiBitOrder_LSBFirst == pAttr->bitOrder) { - SET_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_WR_BIT_ORDER); - SET_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_RD_BIT_ORDER); - } else { - // To do nothing - } - - // Disable flash operation mode - // As earlier as better, if not SPI_CTRL2 can not to be set delay cycles. - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_FLASH_MODE); - - // SPI mode type - if (SpiMode_Master == pAttr->mode) { - // SPI mode type - CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SPI_SLAVE_MODE); - // SPI Send buffer - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO_HIGHPART); // By default slave send buffer C0-C7 - - // SPI Speed - if (1 < (pAttr->speed)) { - CLEAR_PERI_REG_MASK(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); - - if (spiNum == SpiNum_HSPI) { - CLEAR_PERI_REG_MASK(PERIPHS_IO_MUX_CONF_U, SPI1_CLK_EQU_SYS_CLK); - } - - WRITE_PERI_REG(SPI_CLOCK(spiNum), - ((pAttr->speed & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) | - ((((pAttr->speed + 1) / 2 - 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) | - ((pAttr->speed & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div - } else { - WRITE_PERI_REG(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); // 80Mhz speed - } - - // By default format:CMD+ADDR+DATA - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CS_SETUP | SPI_CS_HOLD | SPI_USR_MOSI); - - //delay num - SET_PERI_REG_MASK(SPI_CTRL2(spiNum), ((0x1 & SPI_MISO_DELAY_NUM) << SPI_MISO_DELAY_NUM_S)); - } else if (SpiMode_Slave == pAttr->mode) { - // BIT19 must do - SET_PERI_REG_MASK(SPI_PIN(spiNum), BIT19); - - // SPI mode type - SET_PERI_REG_MASK(SPI_SLAVE(spiNum), SPI_SLAVE_MODE); - // SPI Send buffer - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO_HIGHPART);// By default slave send buffer C8-C15 - - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); - - // If do not set delay cycles, slave not working,master cann't get the data. - SET_PERI_REG_MASK(SPI_CTRL2(spiNum), ((0x1 & SPI_MOSI_DELAY_NUM) << SPI_MOSI_DELAY_NUM_S)); //delay num - // SPI Speed - WRITE_PERI_REG(SPI_CLOCK(spiNum), 0); - - // By default format::CMD(8bits)+ADDR(8bits)+DATA(32bytes). - SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, - 7, SPI_USR_COMMAND_BITLEN_S); - SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_WR_ADDR_BITLEN, - 7, SPI_SLV_WR_ADDR_BITLEN_S); - SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_RD_ADDR_BITLEN, - 7, SPI_SLV_RD_ADDR_BITLEN_S); - SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_BUF_BITLEN, - (32 * 8 - 1), SPI_SLV_BUF_BITLEN_S); - // For 8266 work on slave mode. - SET_PERI_REG_BITS(SPI_SLAVE1(spiNum), SPI_SLV_STATUS_BITLEN, - 7, SPI_SLV_STATUS_BITLEN_S); - } else { - // To do nothing - } - - //clear Daul or Quad lines transmission mode - CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_QIO_MODE | SPI_DIO_MODE | SPI_DOUT_MODE | SPI_QOUT_MODE); - SET_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_FASTRD_MODE); - -} - -/** - * @brief Set address value by master mode. - * - */ -void SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - // Set address - WRITE_PERI_REG(SPI_ADDR(spiNum), addr); -} - -/** - * @brief Set command value by master mode. - * - */ -void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - // SPI_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1, - // bit15-0 is cmd value. - SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_VALUE, cmd, SPI_USR_COMMAND_VALUE_S); -} - -/** - * @brief Send data to slave. - * - */ -int SPIMasterSendData(SpiNum spiNum, SpiData* pInData) -{ - char idx = 0; - - if ((spiNum > SpiNum_HSPI) - || (NULL == pInData) - || (64 < pInData->dataLen)) { - return -1; - } - - uint32_t* value = pInData->data; - - while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); - - // Set command by user. - if (pInData->cmdLen != 0) { - // Max command length 16 bits. - SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, - ((pInData->cmdLen << 3) - 1), SPI_USR_COMMAND_BITLEN_S); - // Enable command - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); - // Load command - SPIMasterCfgCmd(spiNum, pInData->cmd); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); - SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, - 0, SPI_USR_COMMAND_BITLEN_S); - } - - // Set Address by user. - if (pInData->addrLen == 0) { - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, - 0, SPI_USR_ADDR_BITLEN_S); - } else { - if (NULL == pInData->addr) { - return -1; - } - - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, - ((pInData->addrLen << 3) - 1), SPI_USR_ADDR_BITLEN_S); - // Enable address - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); - // Load address - SPIMasterCfgAddr(spiNum, *pInData->addr); - } - - // Set data by user. - if (pInData->dataLen != 0) { - if (NULL == value) { - return -1; - } - - // Enable MOSI - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); - - // Load send buffer - do { - WRITE_PERI_REG((SPI_W0(spiNum) + (idx << 2)), *value++); - } while (++idx < (pInData->dataLen / 4)); - - // Set data send buffer length.Max data length 64 bytes. - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, ((pInData->dataLen << 3) - 1), SPI_USR_MOSI_BITLEN_S); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, - 0, SPI_USR_MOSI_BITLEN_S); - } - - // Start send data - SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); - - SHOWREG(); - return 0; -} - -/** - * @brief Receive data from slave. - * - */ -int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) -{ - char idx = 0; - - if ((spiNum > SpiNum_HSPI) - || (NULL == pOutData)) { - return -1; - } - - uint32_t* value = pOutData->data; - - while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); - - // Set command by user. - if (pOutData->cmdLen != 0) { - // Max command length 16 bits. - SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, - ((pOutData->cmdLen << 3) - 1), SPI_USR_COMMAND_BITLEN_S); - // Enable command - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); - // Load command - SPIMasterCfgCmd(spiNum, pOutData->cmd); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_COMMAND); - SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, - 0, SPI_USR_COMMAND_BITLEN_S); - } - - // Set Address by user. - if (pOutData->addrLen == 0) { - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, - 0, SPI_USR_ADDR_BITLEN_S); - } else { - if (NULL == pOutData->addr) { - return -1; - } - - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, - ((pOutData->addrLen << 3) - 1), SPI_USR_ADDR_BITLEN_S); - // Enable address - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); - // Load address - SPIMasterCfgAddr(spiNum, *pOutData->addr); - } - - // Set data by user. - if (pOutData->dataLen != 0) { - if (NULL == value) { - return -1; - } - - // Clear MOSI enable - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); - // Enable MOSI - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); - // Set data send buffer length.Max data length 64 bytes. - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, ((pOutData->dataLen << 3) - 1), SPI_USR_MISO_BITLEN_S); - } else { - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, - 0, SPI_USR_MISO_BITLEN_S); - } - - //CLEAR FIFO DATA - int fifo_idx = 0; - - do { - WRITE_PERI_REG(SPI_W0(spiNum) + (fifo_idx << 2), 0); - } while (++fifo_idx < (pOutData->dataLen / 4)); - - // Start send data - SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); - - while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); - - // Read data out - do { - *pOutData->data++ = READ_PERI_REG(SPI_W0(spiNum) + (idx << 2)); - } while (++idx < (pOutData->dataLen / 4)); - - SHOWREG(); - return 0; -} - -/** - * @brief Load data to send buffer by slave mode. - * - */ -int SPISlaveSendData(SpiNum spiNum, uint32_t* pInData, uint8_t outLen) -{ - if (NULL == pInData) { - return -1; - } - - char i; - - for (i = 0; i < outLen; ++i) { - WRITE_PERI_REG((SPI_W8(spiNum) + (i << 2)), *pInData++); - } - - return 0; -} - -/** - * @brief Configurate slave prepare for receive data. - * - */ -int SPISlaveRecvData(SpiNum spiNum, void(*isrFunc)(void*)) -{ - if ((spiNum > SpiNum_HSPI)) { - return -1; - } - - SPIIntEnable(SpiNum_HSPI, SpiIntSrc_WrStaDoneEn - | SpiIntSrc_RdStaDoneEn | SpiIntSrc_WrBufDoneEn | SpiIntSrc_RdBufDoneEn); - SPIIntDisable(SpiNum_HSPI, SpiIntSrc_TransDoneEn); - - // Maybe enable slave transmission liston - SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); - // - _xt_isr_attach(ETS_SPI_INUM, isrFunc, NULL); - // ETS_SPI_INTR_ATTACH(isrFunc, NULL); - // Enable isr - ETS_SPI_INTR_ENABLE(); - - - SHOWREG(); - - return 0; -} - -/** - * @brief Send data to slave(ESP8266 register of RD_STATUS or WR_STATUS). - * - */ -void SPIMasterSendStatus(SpiNum spiNum, uint8_t data) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); - - // Enable MOSI - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR); - - // 8bits cmd, 0x04 is eps8266 slave write cmd value - WRITE_PERI_REG(SPI_USER2(spiNum), - ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) - | MASTER_WRITE_STATUS_TO_SLAVE_CMD); - // Set data send buffer length. - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, - ((sizeof(data) << 3) - 1), SPI_USR_MOSI_BITLEN_S); - - WRITE_PERI_REG(SPI_W0(spiNum), (uint32_t)(data)); - // Start SPI - SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); - - SHOWREG(); -} - -/** - * @brief Receive status register from slave(ESP8266). - * - */ -int SPIMasterRecvStatus(SpiNum spiNum) -{ - if (spiNum > SpiNum_HSPI) { - return -1; - } - - while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); - - // Enable MISO - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI | SPI_USR_DUMMY | SPI_USR_ADDR); - - // 8bits cmd, 0x06 is eps8266 slave read status cmd value - WRITE_PERI_REG(SPI_USER2(spiNum), - ((7 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) - | MASTER_READ_STATUS_FROM_SLAVE_CMD); - // Set revcive buffer length. - SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, - 7, SPI_USR_MISO_BITLEN_S); - - // start spi module. - SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); - - while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); - - (void)(READ_PERI_REG(SPI_W0(spiNum)) & 0xff); - SHOWREG(); - - return (uint8_t)(READ_PERI_REG(SPI_W0(spiNum)) & 0xff); -} - -/** - * @brief Select SPI CS pin. - * - */ -void SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - // clear select - SET_PERI_REG_BITS(SPI_PIN(spiNum), 3, 0, 0); - SET_PERI_REG_MASK(SPI_PIN(spiNum), pinCs); -} - -/** - * @brief Enable SPI interrupt source. - * - */ -void SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - SET_PERI_REG_MASK(SPI_SLAVE(spiNum), intSrc); -} - -/** - * @brief Disable SPI interrupt source. - * - */ -void SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), intSrc); -} - -/** - * @brief Clear all of SPI interrupt source. - * - */ -void SPIIntClear(SpiNum spiNum) -{ - if (spiNum > SpiNum_HSPI) { - return; - } - - CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SpiIntSrc_TransDoneEn - | SpiIntSrc_WrStaDoneEn - | SpiIntSrc_RdStaDoneEn - | SpiIntSrc_WrBufDoneEn - | SpiIntSrc_RdBufDoneEn); -} - - -#ifdef __cplusplus -} -#endif diff --git a/components/esp8266/driver/uart.c b/components/esp8266/driver/uart.c deleted file mode 100644 index f4b4f333..00000000 --- a/components/esp8266/driver/uart.c +++ /dev/null @@ -1,406 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include -#include -#include -#include - -#include "esp8266/pin_mux_register.h" -#include "esp8266/uart_register.h" -#include "esp8266/rom_functions.h" -#include "rom/ets_sys.h" - -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "freertos/queue.h" - -#include "uart.h" - -enum { - UART_EVENT_RX_CHAR, - UART_EVENT_MAX -}; - -typedef struct _os_event_ { - uint32_t event; - uint32_t param; -} os_event_t; - -xTaskHandle xUartTaskHandle; -xQueueHandle xQueueUart; - -static void uart_tx_one_char(uint8_t uart, uint8_t TxChar) -{ - while (true) { - uint32_t fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S); - - if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { - break; - } - } - - WRITE_PERI_REG(UART_FIFO(uart), TxChar); -} - -static void uart1_write_char(char c) -{ - if (c == '\n') { - uart_tx_one_char(UART1, '\r'); - uart_tx_one_char(UART1, '\n'); - } else if (c == '\r') { - } else { - uart_tx_one_char(UART1, c); - } -} - -static void uart0_write_char(char c) -{ - if (c == '\n') { - uart_tx_one_char(UART0, '\r'); - uart_tx_one_char(UART0, '\n'); - } else if (c == '\r') { - } else { - uart_tx_one_char(UART0, c); - } -} - -#if 0 -static void uart_rx_intr_handler_ssc(void *arg) -{ - /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents - * uart1 and uart0 respectively - */ - os_event_t e; - portBASE_TYPE xHigherPriorityTaskWoken; - - uint8_t RcvChar; - uint8_t uart_no = 0; - - if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) { - return; - } - - RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF; - - WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR); - - e.event = UART_EVENT_RX_CHAR; - e.param = RcvChar; - - xQueueSendFromISR(xQueueUart, (void*)&e, &xHigherPriorityTaskWoken); - portEND_SWITCHING_ISR(xHigherPriorityTaskWoken); -} - -static void uart_config(uint8_t uart_no, UartDevice *uart) -{ - if (uart_no == UART1) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); - } else { - /* rcv_buff size if 0x100 */ - _xt_isr_attach(ETS_UART_INUM, uart_rx_intr_handler_ssc, NULL); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); - } - - uart_div_modify(uart_no, UART_CLK_FREQ / (uart->baut_rate)); - - WRITE_PERI_REG(UART_CONF0(uart_no), uart->exist_parity - | uart->parity - | (uart->stop_bits << UART_STOP_BIT_NUM_S) - | (uart->data_bits << UART_BIT_NUM_S)); - - //clear rx and tx fifo,not ready - SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - - if (uart_no == UART0) { - //set rx fifo trigger - WRITE_PERI_REG(UART_CONF1(uart_no), - ((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); - } else { - WRITE_PERI_REG(UART_CONF1(uart_no), - ((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)); - } - - //clear all interrupt - WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); - //enable rx_interrupt - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA); -} -#endif - -#if 0 -static void uart_task(void *pvParameters) -{ - os_event_t e; - - for (;;) { - if (xQueueReceive(xQueueUart, (void*)&e, (portTickType)portMAX_DELAY)) { - switch (e.event) { - case UART_EVENT_RX_CHAR: - printf("%c", e.param); - break; - - default: - break; - } - } - } - - vTaskDelete(NULL); -} - -void uart_init(void) -{ - while (READ_PERI_REG(UART_STATUS(0)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)); - - while (READ_PERI_REG(UART_STATUS(1)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)); - - UART_ConfigTypeDef uart; - - uart.baut_rate = BIT_RATE_74880; - uart.data_bits = UART_WordLength_8b; - uart.flow_ctrl = USART_HardwareFlowControl_None; - // uart.exist_parity = PARITY_DIS; - uart.parity = USART_Parity_None; - uart.stop_bits = USART_StopBits_1; - - uart_config(UART0, &uart); - uart_config(UART1, &uart); - - os_install_putc1(uart1_write_char); - - _xt_isr_unmask(1 << ETS_UART_INUM); - - xQueueUart = xQueueCreate(32, sizeof(os_event_t)); - - xTaskCreate(uart_task, (uint8_t const*)"uTask", 2048, NULL, tskIDLE_PRIORITY + 2, &xUartTaskHandle); -} -#endif - -//================================================================= - -void UART_SetWordLength(UART_Port uart_no, UART_WordLength len) -{ - SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_BIT_NUM, len, UART_BIT_NUM_S); -} - -void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num) -{ - SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_STOP_BIT_NUM, bit_num, UART_STOP_BIT_NUM_S); -} - -void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) -{ - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK); - SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask); -} - -void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) -{ - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY | UART_PARITY_EN); - - if (Parity_mode == USART_Parity_None) { - } else { - SET_PERI_REG_MASK(UART_CONF0(uart_no), Parity_mode | UART_PARITY_EN); - } -} - -void UART_SetBaudrate(UART_Port uart_no, uint32_t baud_rate) -{ - uart_div_modify(uart_no, UART_CLK_FREQ / baud_rate); -} - -//only when USART_HardwareFlowControl_RTS is set , will the rx_thresh value be set. -void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8_t rx_thresh) -{ - if (flow_ctrl & USART_HardwareFlowControl_RTS) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); - SET_PERI_REG_BITS(UART_CONF1(uart_no), UART_RX_FLOW_THRHD, rx_thresh, UART_RX_FLOW_THRHD_S); - SET_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); - } else { - CLEAR_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); - } - - if (flow_ctrl & USART_HardwareFlowControl_CTS) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_UART0_CTS); - SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); - } else { - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); - } -} - -void UART_WaitTxFifoEmpty(UART_Port uart_no) //do not use if tx flow control enabled -{ - while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)); -} - -void UART_ResetFifo(UART_Port uart_no) -{ - SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); - CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); -} - -void UART_ClearIntrStatus(UART_Port uart_no, uint32_t clr_mask) -{ - WRITE_PERI_REG(UART_INT_CLR(uart_no), clr_mask); -} - -void UART_SetIntrEna(UART_Port uart_no, uint32_t ena_mask) -{ - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), ena_mask); -} - -void UART_intr_handler_register(void* fn, void* arg) -{ - _xt_isr_attach(ETS_UART_INUM, fn, arg); -} - -void UART_SetPrintPort(UART_Port uart_no) -{ - if (uart_no == 1) { - os_install_putc1(uart1_write_char); - } else { - os_install_putc1(uart0_write_char); - } -} - -void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef* pUARTConfig) -{ - if (uart_no == UART1) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); - } else { - PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); - } - - UART_SetFlowCtrl(uart_no, pUARTConfig->flow_ctrl, pUARTConfig->UART_RxFlowThresh); - UART_SetBaudrate(uart_no, pUARTConfig->baud_rate); - - WRITE_PERI_REG(UART_CONF0(uart_no), - ((pUARTConfig->parity == USART_Parity_None) ? 0x0 : (UART_PARITY_EN | pUARTConfig->parity)) - | (pUARTConfig->stop_bits << UART_STOP_BIT_NUM_S) - | (pUARTConfig->data_bits << UART_BIT_NUM_S) - | ((pUARTConfig->flow_ctrl & USART_HardwareFlowControl_CTS) ? UART_TX_FLOW_EN : 0x0) - | pUARTConfig->UART_InverseMask); - - UART_ResetFifo(uart_no); -} - -void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef* pUARTIntrConf) -{ - - uint32_t reg_val = 0; - UART_ClearIntrStatus(uart_no, UART_INTR_MASK); - reg_val = READ_PERI_REG(UART_CONF1(uart_no)) & ((UART_RX_FLOW_THRHD << UART_RX_FLOW_THRHD_S) | UART_RX_FLOW_EN) ; - - reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_RXFIFO_TOUT_INT_ENA) ? - ((((pUARTIntrConf->UART_RX_TimeOutIntrThresh)&UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S) | UART_RX_TOUT_EN) : 0); - - reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_RXFIFO_FULL_INT_ENA) ? - (((pUARTIntrConf->UART_RX_FifoFullIntrThresh)&UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) : 0); - - reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_TXFIFO_EMPTY_INT_ENA) ? - (((pUARTIntrConf->UART_TX_FifoEmptyIntrThresh)&UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) : 0); - - WRITE_PERI_REG(UART_CONF1(uart_no), reg_val); - CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_INTR_MASK); - SET_PERI_REG_MASK(UART_INT_ENA(uart_no), pUARTIntrConf->UART_IntrEnMask); -} - -static void uart0_rx_intr_handler(void* para) -{ - /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents - * uart1 and uart0 respectively - */ - uint8_t uart_no = UART0;//UartDev.buff_uart_no; - uint8_t fifo_len = 0; - uint8_t buf_idx = 0; - - uint32_t uart_intr_status = READ_PERI_REG(UART_INT_ST(uart_no)) ; - - while (uart_intr_status != 0x0) { - if (UART_FRM_ERR_INT_ST == (uart_intr_status & UART_FRM_ERR_INT_ST)) { - //printf("FRM_ERR\r\n"); - WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR); - } else if (UART_RXFIFO_FULL_INT_ST == (uart_intr_status & UART_RXFIFO_FULL_INT_ST)) { - printf("full\r\n"); - fifo_len = (READ_PERI_REG(UART_STATUS(UART0)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; - buf_idx = 0; - - while (buf_idx < fifo_len) { - uart_tx_one_char(UART0, READ_PERI_REG(UART_FIFO(UART0)) & 0xFF); - buf_idx++; - } - - WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR); - } else if (UART_RXFIFO_TOUT_INT_ST == (uart_intr_status & UART_RXFIFO_TOUT_INT_ST)) { - printf("tout\r\n"); - fifo_len = (READ_PERI_REG(UART_STATUS(UART0)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; - buf_idx = 0; - - while (buf_idx < fifo_len) { - uart_tx_one_char(UART0, READ_PERI_REG(UART_FIFO(UART0)) & 0xFF); - buf_idx++; - } - - WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR); - } else if (UART_TXFIFO_EMPTY_INT_ST == (uart_intr_status & UART_TXFIFO_EMPTY_INT_ST)) { - printf("empty\n\r"); - WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_TXFIFO_EMPTY_INT_CLR); - CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); - } else { - //skip - } - - uart_intr_status = READ_PERI_REG(UART_INT_ST(uart_no)) ; - } -} - -void uart_init_new(void) -{ - UART_WaitTxFifoEmpty(UART0); - UART_WaitTxFifoEmpty(UART1); - - UART_ConfigTypeDef uart_config; - uart_config.baud_rate = BIT_RATE_74880; - uart_config.data_bits = UART_WordLength_8b; - uart_config.parity = USART_Parity_None; - uart_config.stop_bits = USART_StopBits_1; - uart_config.flow_ctrl = USART_HardwareFlowControl_None; - uart_config.UART_RxFlowThresh = 120; - uart_config.UART_InverseMask = UART_None_Inverse; - UART_ParamConfig(UART0, &uart_config); - - UART_IntrConfTypeDef uart_intr; - uart_intr.UART_IntrEnMask = UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA | UART_RXFIFO_FULL_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA; - uart_intr.UART_RX_FifoFullIntrThresh = 10; - uart_intr.UART_RX_TimeOutIntrThresh = 2; - uart_intr.UART_TX_FifoEmptyIntrThresh = 20; - UART_IntrConfig(UART0, &uart_intr); - - UART_SetPrintPort(UART0); - UART_intr_handler_register(uart0_rx_intr_handler, NULL); - ETS_UART_INTR_ENABLE(); - - /* - UART_SetWordLength(UART0,UART_WordLength_8b); - UART_SetStopBits(UART0,USART_StopBits_1); - UART_SetParity(UART0,USART_Parity_None); - UART_SetBaudrate(UART0,74880); - UART_SetFlowCtrl(UART0,USART_HardwareFlowControl_None,0); - */ -} diff --git a/components/esp8266/include/driver/hw_timer.h b/components/esp8266/include/driver/hw_timer.h deleted file mode 100644 index 7fa7e14a..00000000 --- a/components/esp8266/include/driver/hw_timer.h +++ /dev/null @@ -1,88 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef __HW_TIMER_H__ -#define __HW_TIMER_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** \defgroup HW_Timer_APIs Hardware timer APIs - * @brief Hardware timer APIs - * - * @attention Hardware timer can not interrupt other ISRs. - * - */ - -/** @addtogroup HW_Timer_APIs - * @{ - */ - - -/** - * @brief Initialize the hardware ISR timer. - * - * @param null - * - * @return null - */ -void hw_timer_init(void); - -/** - * @brief Set a trigger timer delay to enable this timer. - * - * @param uint32_t val : Timing - * - In autoload mode, range : 50 ~ 0x7fffff - * - In non-autoload mode, range : 10 ~ 0x7fffff - * - * @param uint8_t req : 0, not autoload; 1, autoload mode. - * - * @return null - */ -void hw_timer_arm(uint32_t val, bool req); - -/** - * @brief disable this timer. - * - * @param null - * - * @return null - */ -void hw_timer_disarm(void); - -/** - * @brief Set timer callback function. - * - * For enabled timer, timer callback has to be set. - * - * @param uint32_t val : Timing - * - In autoload mode, range : 50 ~ 0x7fffff - * - In non-autoload mode, range : 10 ~ 0x7fffff - * - * @return null - */ -void hw_timer_set_func(void (* user_hw_timer_cb_set)(void)); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/components/esp8266/include/driver/i2c_master.h b/components/esp8266/include/driver/i2c_master.h deleted file mode 100644 index 63b3381b..00000000 --- a/components/esp8266/include/driver/i2c_master.h +++ /dev/null @@ -1,189 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef __I2C_MASTER_H__ -#define __I2C_MASTER_H__ - -#include - -#include "rom/ets_sys.h" - -#include "esp8266/pin_mux_register.h" -#include "gpio.h" - -#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U -#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO4_U -#define I2C_MASTER_SDA_GPIO 2 -#define I2C_MASTER_SCL_GPIO 4 -#define I2C_MASTER_SDA_FUNC FUNC_GPIO2 -#define I2C_MASTER_SCL_FUNC FUNC_GPIO4 - -//#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U -//#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO0_U -//#define I2C_MASTER_SDA_GPIO 2 -//#define I2C_MASTER_SCL_GPIO 0 -//#define I2C_MASTER_SDA_FUNC FUNC_GPIO2 -//#define I2C_MASTER_SCL_FUNC FUNC_GPIO0 - -#if 0 -#define I2C_MASTER_GPIO_SET(pin) \ - gpio_output_set(1< - -#include "spi_register.h" - -//***************************************************************************** -// -// Make sure all of the definitions in this header have a C binding. -// -//***************************************************************************** - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/** - * @brief Defines slave commands. Default value based on slave ESP8266. - */ -#define MASTER_WRITE_DATA_TO_SLAVE_CMD 2 -#define MASTER_READ_DATA_FROM_SLAVE_CMD 3 - -#define MASTER_WRITE_STATUS_TO_SLAVE_CMD 1 -#define MASTER_READ_STATUS_FROM_SLAVE_CMD 4 - -/** - * @brief Support HSPI and SPI module. - * - */ -typedef enum { - SpiNum_SPI = 0, - SpiNum_HSPI = 1, -} SpiNum; - -/** - * @brief The SPI module can work in either master or slave mode. - * - */ -typedef enum { - SpiMode_Master = 0, - SpiMode_Slave = 1, -} SpiMode; - -/** - * @brief SPI sub mode - * - * Support 4 sub modes based on SPI clock polarity and phase. - * SPI_CPOL SPI_CPHA SubMode - * 0 0 0 - * 0 1 1 - * 1 0 2 - * 1 1 3 - */ -typedef enum { - SpiSubMode_0 = 0, - SpiSubMode_1 = 1, - SpiSubMode_2 = 2, - SpiSubMode_3 = 3, -} SpiSubMode; - -/** - * @brief The SPI module working speed. - * - * @attention Max speed 80MHz - * - */ -typedef enum { - SpiSpeed_2MHz = 40 - 1, - SpiSpeed_5MHz = 16 - 1, - SpiSpeed_10MHz = 8 - 1, - SpiSpeed_16MHz = 5 - 1, - SpiSpeed_20MHz = 4 - 1, -} SpiSpeed; - -/** - * @brief The SPI mode working speed. - * - */ -typedef enum { - SpiBitOrder_MSBFirst = 0, - SpiBitOrder_LSBFirst = 1, -} SpiBitOrder; - -// @brief SPI interrupt soource defined. -typedef enum { - SpiIntSrc_TransDoneEn = SPI_TRANS_DONE_EN, - SpiIntSrc_WrStaDoneEn = SPI_SLV_WR_STA_DONE_EN, - SpiIntSrc_RdStaDoneEn = SPI_SLV_RD_STA_DONE_EN, - SpiIntSrc_WrBufDoneEn = SPI_SLV_WR_BUF_DONE_EN, - SpiIntSrc_RdBufDoneEn = SPI_SLV_RD_BUF_DONE_EN, -} SpiIntSrc; - -// @brief SPI CS pin. -typedef enum { - SpiPinCS_0 = 0, - SpiPinCS_1 = 1, - SpiPinCS_2 = 2, -} SpiPinCS; - -/** - * @brief SPI attribute - */ -typedef struct { - SpiMode mode; ///< Master or slave mode - SpiSubMode subMode; ///< SPI SPI_CPOL SPI_CPHA mode - SpiSpeed speed; ///< SPI Clock - SpiBitOrder bitOrder; ///< SPI bit order -} SpiAttr; - -/** - * @brief SPI attribute - */ -typedef struct { - uint16_t cmd; ///< Command value - uint8_t cmdLen; ///< Command byte length - uint32_t* addr; ///< Point to address value - uint8_t addrLen; ///< Address byte length - uint32_t* data; ///< Point to data buffer - uint8_t dataLen; ///< Data byte length. -} SpiData; - -#define SHOWREG() __ShowRegValue(__func__, __LINE__); - -/** - * @brief Print debug information. - * - */ -void __ShowRegValue(const char* func, uint32_t line); - -/** - * @brief Initialize SPI module. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] pAttr - * Pointer to a struct SpiAttr that indicates SPI working attribution. - * - * @return void. - */ -void SPIInit(SpiNum spiNum, SpiAttr* pAttr); - -/** - * @brief Set slave address value by master. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] addr - * Slave address to be set. - * - * @return void. - */ -void SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr); - -/** - * @brief Set command value by master. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] cmd - * Command will be send to slave. - * - * @return void. - */ -void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd); - -/** - * @brief Send data to slave from master. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] pInData - * Pointer to a strcuture that will be send. - * - * @return int, -1:indicates failure,others indicates success. - */ -int SPIMasterSendData(SpiNum spiNum, SpiData* pInData); - -/** - * @brief Receive data from slave by master. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] pOutData - * Point to data buffer. - * - * @return int, -1:indicates failure,others indicates success. - * - */ -int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData); - -/** - * @brief Load data to slave send buffer. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] pInData - * Point to data buffer. - * @param [in] outLen - * The number of bytes to be set. - * - * @return int, -1:indicates failure,others indicates success. - */ -int SPISlaveSendData(SpiNum spiNum, uint32_t* pInData, uint8_t outLen); - -/** - * @brief Receive data by slave. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] isrFunc - * isrFunc is a pointer to the function to be called when the SPI interrupt occurs. - * - * @return int, -1:indicates failure,others indicates success. - */ -int SPISlaveRecvData(SpiNum spiNum, void(*isrFunc)(void*)); - -/** - * @brief Set slave status by master. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] data - * Data will be write to slave SPI_WR_STATUS. - * - * @return void. - * - * @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS. - */ -void SPIMasterSendStatus(SpiNum spiNum, uint8_t data); - -/** - * @brief Get salve status by master. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * - * @return int, -1: indicates failure; other value in slave status. - * - * @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS. - */ -int SPIMasterRecvStatus(SpiNum spiNum); - -/** - * @brief Select SPI CS pin. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] pinCs - * Indicates which SPI pin to choose. - * - * @return void. - */ -void SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs); - -/** - * @brief Enable SPI module interrupt source. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] intSrc - * Indicates which interrupt source to enable. - * - * @return void. - */ -void SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc); - -/** - * @brief Disable SPI module interrupt source. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * @param [in] intSrc - * Indicates which interrupt source to disable. - * - * @return void. - */ -void SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc); - -/** - * @brief Clear all of spi interrupt. - * - * @param [in] spiNum - * Indicates which submode to be used, SPI or HSPI. - * - * @return void. - */ -void SPIIntClear(SpiNum spiNum); - -#ifdef __cplusplus -} -#endif - -#endif // __SPI_INTERFACE_H__ diff --git a/components/esp8266/include/driver/uart.h b/components/esp8266/include/driver/uart.h deleted file mode 100644 index 263ae20a..00000000 --- a/components/esp8266/include/driver/uart.h +++ /dev/null @@ -1,290 +0,0 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef __UART_H__ -#define __UART_H__ - -#include - -#include "esp8266/uart_register.h" - -#include "freertos/portmacro.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define ETS_UART_INTR_ENABLE() _xt_isr_unmask(1 << ETS_UART_INUM) -#define ETS_UART_INTR_DISABLE() _xt_isr_mask(1 << ETS_UART_INUM) -#define UART_INTR_MASK 0x1ff -#define UART_LINE_INV_MASK (0x3f<<19) - -typedef enum { - UART_WordLength_5b = 0x0, - UART_WordLength_6b = 0x1, - UART_WordLength_7b = 0x2, - UART_WordLength_8b = 0x3 -} UART_WordLength; - -typedef enum { - USART_StopBits_1 = 0x1, - USART_StopBits_1_5 = 0x2, - USART_StopBits_2 = 0x3, -} UART_StopBits; - -typedef enum { - UART0 = 0x0, - UART1 = 0x1, -} UART_Port; - -typedef enum { - USART_Parity_None = 0x2, - USART_Parity_Even = 0x0, - USART_Parity_Odd = 0x1 -} UART_ParityMode; - -typedef enum { - PARITY_DIS = 0x0, - PARITY_EN = 0x2 -} UartExistParity; - -typedef enum { - BIT_RATE_300 = 300, - BIT_RATE_600 = 600, - BIT_RATE_1200 = 1200, - BIT_RATE_2400 = 2400, - BIT_RATE_4800 = 4800, - BIT_RATE_9600 = 9600, - BIT_RATE_19200 = 19200, - BIT_RATE_38400 = 38400, - BIT_RATE_57600 = 57600, - BIT_RATE_74880 = 74880, - BIT_RATE_115200 = 115200, - BIT_RATE_230400 = 230400, - BIT_RATE_460800 = 460800, - BIT_RATE_921600 = 921600, - BIT_RATE_1843200 = 1843200, - BIT_RATE_3686400 = 3686400, -} UART_BautRate; //you can add any rate you need in this range - -typedef enum { - USART_HardwareFlowControl_None = 0x0, - USART_HardwareFlowControl_RTS = 0x1, - USART_HardwareFlowControl_CTS = 0x2, - USART_HardwareFlowControl_CTS_RTS = 0x3 -} UART_HwFlowCtrl; - -typedef enum { - UART_None_Inverse = 0x0, - UART_Rxd_Inverse = UART_RXD_INV, - UART_CTS_Inverse = UART_CTS_INV, - UART_Txd_Inverse = UART_TXD_INV, - UART_RTS_Inverse = UART_RTS_INV, -} UART_LineLevelInverse; - -typedef struct { - UART_BautRate baud_rate; - UART_WordLength data_bits; - UART_ParityMode parity; // chip size in byte - UART_StopBits stop_bits; - UART_HwFlowCtrl flow_ctrl; - uint8_t UART_RxFlowThresh ; - uint32_t UART_InverseMask; -} UART_ConfigTypeDef; - -typedef struct { - uint32_t UART_IntrEnMask; - uint8_t UART_RX_TimeOutIntrThresh; - uint8_t UART_TX_FifoEmptyIntrThresh; - uint8_t UART_RX_FifoFullIntrThresh; -} UART_IntrConfTypeDef; - -//======================================= - -/** \defgroup Driver_APIs Driver APIs - * @brief Driver APIs - */ - -/** @addtogroup Driver_APIs - * @{ - */ - -/** \defgroup UART_Driver_APIs UART Driver APIs - * @brief UART driver APIs - */ - -/** @addtogroup UART_Driver_APIs - * @{ - */ - -/** - * @brief Wait uart tx fifo empty, do not use it if tx flow control enabled. - * - * @param UART_Port uart_no:UART0 or UART1 - * - * @return null - */ -void UART_WaitTxFifoEmpty(UART_Port uart_no); //do not use if tx flow control enabled - -/** - * @brief Clear uart tx fifo and rx fifo. - * - * @param UART_Port uart_no : UART0 or UART1 - * - * @return null - */ -void UART_ResetFifo(UART_Port uart_no); - -/** - * @brief Clear uart interrupt flags. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param uint32_t clr_mask : To clear the interrupt bits - * - * @return null - */ -void UART_ClearIntrStatus(UART_Port uart_no, uint32_t clr_mask); - -/** - * @brief Enable uart interrupts . - * - * @param UART_Port uart_no : UART0 or UART1 - * @param uint32_t ena_mask : To enable the interrupt bits - * - * @return null - */ -void UART_SetIntrEna(UART_Port uart_no, uint32_t ena_mask); - -/** - * @brief Register an application-specific interrupt handler for Uarts interrupts. - * - * @param void *fn : interrupt handler for Uart interrupts. - * @param void *arg : interrupt handler's arg. - * - * @return null - */ -void UART_intr_handler_register(void* fn, void* arg); - -/** - * @brief Config from which serial output printf function. - * - * @param UART_Port uart_no : UART0 or UART1 - * - * @return null - */ -void UART_SetPrintPort(UART_Port uart_no); - -/** - * @brief Config Common parameters of serial ports. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_ConfigTypeDef *pUARTConfig : parameters structure - * - * @return null - */ -void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef* pUARTConfig); - -/** - * @brief Config types of uarts. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_IntrConfTypeDef *pUARTIntrConf : parameters structure - * - * @return null - */ -void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef* pUARTIntrConf); - -/** - * @brief Config the length of the uart communication data bits. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_WordLength len : the length of the uart communication data bits - * - * @return null - */ -void UART_SetWordLength(UART_Port uart_no, UART_WordLength len); - -/** - * @brief Config the length of the uart communication stop bits. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_StopBits bit_num : the length uart communication stop bits - * - * @return null - */ -void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num); - -/** - * @brief Configure whether to open the parity. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_ParityMode Parity_mode : the enum of uart parity configuration - * - * @return null - */ -void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) ; - -/** - * @brief Configure the Baud rate. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param uint32_t baud_rate : the Baud rate - * - * @return null - */ -void UART_SetBaudrate(UART_Port uart_no, uint32_t baud_rate); - -/** - * @brief Configure Hardware flow control. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_HwFlowCtrl flow_ctrl : Hardware flow control mode - * @param uint8_t rx_thresh : threshold of Hardware flow control - * - * @return null - */ -void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8_t rx_thresh); - -/** - * @brief Configure trigging signal of uarts. - * - * @param UART_Port uart_no : UART0 or UART1 - * @param UART_LineLevelInverse inverse_mask : Choose need to flip the IO - * - * @return null - */ -void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) ; - -/** - * @brief An example illustrates how to configure the serial port. - * - * @param null - * - * @return null - */ -void uart_init_new(void); - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif