espressif/ESP8266_RTOS_SDK
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fix(esp8266): fix that WDEV time is larger than normal

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This commit is contained in:
Dong Heng
2019-11-25 17:05:14 +08:00
parent 4cae8a580b
commit 0cdff9dbf1
2 changed files with 15 additions and 1 deletions
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2
components/esp8266/include/esp8266/eagle_soc.h
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@ -143,6 +143,8 @@
#define INT_ENA_WDEV 0x3ff20c18 #define INT_ENA_WDEV 0x3ff20c18
#define WDEV_TSF0_REACH_INT (BIT(27)) #define WDEV_TSF0_REACH_INT (BIT(27))
#define WDEV_COUNT_REG (0x3ff20c00)
//Watch dog reg {{ //Watch dog reg {{
#define PERIPHS_WDT_BASEADDR 0x60000900 #define PERIPHS_WDT_BASEADDR 0x60000900

14
components/esp8266/source/esp_sleep.c
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@ -49,6 +49,8 @@ typedef struct pm_soc_clk {
uint32_t frc2_enable; uint32_t frc2_enable;
uint32_t frc2_cnt; uint32_t frc2_cnt;
uint32_t wdev_cnt;
} pm_soc_clk_t; } pm_soc_clk_t;
static uint16_t s_lock_cnt = 1; static uint16_t s_lock_cnt = 1;
@ -79,6 +81,8 @@ static inline void save_soc_clk(pm_soc_clk_t *clk)
clk->frc2_enable = REG_READ(FRC2_CTL) & FRC2_CNTL_ENABLE; clk->frc2_enable = REG_READ(FRC2_CTL) & FRC2_CNTL_ENABLE;
if (clk->frc2_enable) if (clk->frc2_enable)
clk->frc2_cnt = REG_READ(FRC2_COUNT); clk->frc2_cnt = REG_READ(FRC2_COUNT);
clk->wdev_cnt = REG_READ(WDEV_COUNT_REG);
} }
static inline uint32_t min_sleep_us(pm_soc_clk_t *clk) static inline uint32_t min_sleep_us(pm_soc_clk_t *clk)
@ -114,7 +118,15 @@ static inline void update_soc_clk(pm_soc_clk_t *clk, uint32_t us)
REG_WRITE(FRC2_LOAD, frc2_cnt); REG_WRITE(FRC2_LOAD, frc2_cnt);
} }
WdevTimOffSet += us; uint32_t wdev_us;
uint32_t wdev_cnt = REG_READ(WDEV_COUNT_REG);
if (clk->wdev_cnt < wdev_cnt)
wdev_us = us - (wdev_cnt - clk->wdev_cnt);
else
wdev_us = us - (UINT32_MAX - clk->wdev_cnt + wdev_cnt);
WdevTimOffSet += wdev_us;
} }
static int cpu_is_wait_mode(void) static int cpu_is_wait_mode(void)